Assignee profile:

ADVANCED CHIP ENGINEERING TECHNOLOGY INC.

City:

Hsinchu County

Country:

Taiwan

Published Applications:

35

Last publication date:

2011-05-12

Patent Grants:

32

Last grant date:

2011-11-15

Top Inventors for applications by ADVANCED CHIP ENGINEERING TECHNOLOGY INC.

These are the the leading inventors for applications assigned to ADVANCED CHIP ENGINEERING TECHNOLOGY INC.:

Recent patent applications by ADVANCED CHIP ENGINEERING TECHNOLOGY INC.

ADVANCED CHIP ENGINEERING TECHNOLOGY INC. based in Hsinchu County, TW has been assigned the rights to these inventions. The list includes both Pending Applications and Patent Grants:

#1 | 2011-05-12 ✅ Patent 8,058,102 granted on 2011-11-15
US20110108977A1
Electricity

Package structure and manufacturing method thereof

#2 | 2009-02-26 ✅ Patent 7,667,318 granted on 2010-02-23
US20090051025A1
Electricity

Fan out type wafer level package structure and method of the same

#3 | 2009-02-12 ✅ Patent 7,687,923 granted on 2010-03-30
US20090039497A1
Electricity

Semiconductor device package having a back side protective scheme

#4 | 2008-12-18
US20080308307A1
Electricity

TRACE STRUCTURE AND METHOD FOR FABRICATING THE SAME

#5 | 2008-10-23
US20080258293A1
Electricity

SEMICONDUCTOR DEVICE PACKAGE TO IMPROVE FUNCTIONS OF HEAT SINK AND GROUND SHIELD

#6 | 2008-10-09 ✅ Patent 7,655,501 granted on 2010-02-02
US20080248614A1
Electricity

Wafer level package with good CTE performance

#7 | 2008-10-02 ✅ Patent 8,178,964 granted on 2012-05-15
US20080237879A1
Electricity

Semiconductor device package with die receiving through-hole and dual build-up layers over both side-surfaces for WLP and method of the same

#8 | 2008-10-02 ✅ Patent 8,304,923 granted on 2012-11-06
US20080237834A1
Electricity

Chip packaging structure

#9 | 2008-09-25 ✅ Patent 7,525,185 granted on 2009-04-28
US20080230884A1
Electricity

Semiconductor device package having multi-chips with side-by-side configuration and method of the same

#10 | 2008-08-28 ✅ Patent 7,863,105 granted on 2011-01-04
US20080206918A1
Electricity

Image sensor package and forming method of the same

#11 | 2008-08-21 ✅ Patent 7,534,632 granted on 2009-05-19
US20080199391A1
Electricity

Method for circuits inspection and method of the same

#12 | 2008-07-03 ✅ Patent 7,812,434 granted on 2010-10-12
US20080157396A1
Electricity

Wafer level package with die receiving through-hole and method of the same

#13 | 2008-07-03 ✅ Patent 8,178,963 granted on 2012-05-15
US20080157336A1
Electricity

Wafer level package with die receiving through-hole and method of the same

#14 | 2008-07-03 ✅ Patent 7,459,729 granted on 2008-12-02
US20080157312A1
Electricity

Semiconductor image device package with die receiving through-hole and method of the same

#15 | 2008-07-03 ✅ Patent 7,423,335 granted on 2008-09-09
US20080157250A1
Electricity

Sensor module package structure and method of the same

#16 | 2008-06-26 ✅ Patent 7,453,148 granted on 2008-11-18
US20080150130A1
Electricity

Structure of dielectric layers in built-up layers of wafer level package

#17 | 2008-06-12 ✅ Patent 7,468,544 granted on 2008-12-23
US20080136026A1
Electricity

Structure and process for WL-CSP with metal cover

#18 | 2008-06-12 ✅ Patent 7,566,854 granted on 2009-07-28
US20080135728A1
Electricity

Image sensor module

#19 | 2008-05-08 ✅ Patent 7,501,310 granted on 2009-03-10
US20080108168A1
Electricity

Structure of image sensor module and method for manufacturing of wafer level package

#20 | 2008-05-08 ✅ Patent 7,557,437 granted on 2009-07-07
US20080105967A1
Electricity

Fan out type wafer level package structure and method of the same

#21 | 2008-03-27
US20080073774A1
Electricity

CHIP PACKAGE AND CHIP PACKAGE ARRAY

#22 | 2008-02-26 ✅ Patent 7,335,870 granted on 2008-02-26
US11539215
-

Method for image sensor protection

#23 | 2008-02-21 ✅ Patent 7,476,565 granted on 2009-01-13
US20080044945A1
Electricity

Method for forming filling paste structure of WL package

#24 | 2008-01-24 ✅ Patent 7,498,646 granted on 2009-03-03
US20080017941A1
Electricity

Structure of image sensor module and a method for manufacturing of wafer level package

#25 | 2007-09-06 ✅ Patent 7,339,279 granted on 2008-03-04
US20070205494A1
Electricity

Chip-size package structure and method of the same

#26 | 2007-07-05 ✅ Patent 7,446,546 granted on 2008-11-04
US20070152693A1
Physics

Method and system of trace pull test

#27 | 2007-06-07 ✅ Patent 7,342,296 granted on 2008-03-11
US20070128835A1
Electricity

Wafer street buffer layer

#28 | 2007-04-12 ✅ Patent 7,416,920 granted on 2008-08-26
US20070082428A1
Electricity

Semiconductor device protective structure and method for fabricating the same

#29 | 2007-03-29 ✅ Patent 7,319,043 granted on 2008-01-15
US20070069207A1
Physics

Method and system of trace pull test

#30 | 2007-01-11 ✅ Patent 7,176,567 granted on 2007-02-13
US20070007648A1
Electricity

Semiconductor device protective structure and method for fabricating the same

#31 | 2006-10-19 ✅ Patent 7,514,767 granted on 2009-04-07
US20060231958A1
Electricity

Fan out type wafer level package structure and method of the same

#32 | 2006-07-06 ✅ Patent 7,279,782 granted on 2007-10-09
US20060145325A1
Electricity

FBGA and COB package structure for image sensor

#33 | 2006-04-27 ✅ Patent 7,238,602 granted on 2007-07-03
US20060087036A1
Electricity

Chip-size package structure and method of the same

#34 | 2005-11-03 ✅ Patent 7,259,468 granted on 2007-08-21
US20050242418A1
Electricity

Structure of package

#35 | 2005-11-03 ✅ Patent 7,525,139 granted on 2009-04-28
US20050242409A1
Electricity

Image sensor with a protection layer

AssigneeID:

262452 ⎘