Santa Clara, California
United States
76
2025-12-09
76
2025-12-09
These are the the leading inventors for applications assigned to Ampere Computing LLC:
Ampere Computing LLC based in Santa Clara, US has been assigned the rights to these inventions. The list includes both Pending Applications and Patent Grants:
Performing snoop filter replacement based on history-augmented victimization priority values of snoop filter entries in processor-based devices
#2 | 2025-08-12 ✅ Patent 12,385,975 granted on 2025-08-12Integrated circuits including error protection of fields in transferred information and field-based error signals and related methods
#3 | 2025-07-31 ✅ Patent 12,613,803 granted on 2026-04-28CACHE MEMORY SYSTEM EMPLOYING A MULTIPLE-LEVEL HIERARCHY CACHE COHERENCY ARCHITECTURE
#4 | 2025-04-24 ✅ Patent 12,549,479 granted on 2026-02-10APPARATUS AND METHOD OF ROUTING A REQUEST IN A MESH NETWORK
#5 | 2025-04-24 ✅ Patent 12,451,206 granted on 2025-10-21EXTENDING FUNCTIONALITY OF MEMORY CONTROLLERS USING A LOOPBACK MODE FOR TESTING IN A PROCESSOR-BASED DEVICE
#6 | 2025-04-24 ✅ Patent 12,346,264 granted on 2025-07-01PERFORMING INSTRUCTION FETCH PIPELINE SYNCHRONIZATION (IFPS) IN PROCESSOR-BASED DEVICES
#7 | 2025-04-24 ✅ Patent 12,379,931 granted on 2025-08-05MECHANISM FOR INSTRUCTION FUSION
#8 | 2025-04-24 ✅ Patent 12,639,069 granted on 2026-05-26PROVIDING ADDITIONAL OPERATIONS FOR A FUNCTIONAL UNIT OF A PROCESSOR CORE
#9 | 2025-04-24 ✅ Patent 12,474,848 granted on 2025-11-18TECHNIQUES FOR MEMORY RESOURCE CONTROL USING MEMORY RESOURCE PARTITIONING AND MONITORING
#10 | 2024-09-26 ✅ Patent 12,411,778 granted on 2025-09-09ADVANCED INITIALIZATION BUS (AIB)
#11 | 2024-08-06 ✅ Patent 12,058,044 granted on 2024-08-06Apparatus and method of routing a request in a mesh network
#12 | 2024-07-25 ✅ Patent 12,554,640 granted on 2026-02-17APPARATUSES, SYSTEMS, AND METHODS FOR CONTROLLING CACHE ALLOCATIONS IN A CONFIGURABLE COMBINED PRIVATE AND SHARED CACHE IN A PROCESSOR-BASED SYSTEM
#13 | 2024-07-04 ✅ Patent 12,314,130 granted on 2025-05-27Parity protected memory blocks merged with error correction code (ECC) protected blocks in a codeword for increased memory utilization
#14 | 2024-04-25 ✅ Patent 12,423,108 granted on 2025-09-23DEVICES TRANSFERRING CACHE LINES, INCLUDING METADATA ON EXTERNAL LINKS
#15 | 2024-03-21 ✅ Patent 12,093,212 granted on 2024-09-17External quiesce of a core in a multi-core system
#16 | 2024-01-04 ✅ Patent 12,087,383 granted on 2024-09-10Virtualized scan chain testing in a random access memory (RAM) array
#17 | 2024-01-04 ✅ Patent 12,645,800 granted on 2026-06-02METHOD AND SYSTEM FOR PATCHING A BOOT PROCESS
#18 | 2024-01-04 ✅ Patent 11,977,638 granted on 2024-05-07Low-impact firmware update
#19 | 2024-01-04 ✅ Patent 12,019,565 granted on 2024-06-25Advanced initialization bus (AIB)
#20 | 2024-01-04 ✅ Patent 12,056,052 granted on 2024-08-06Data L2 cache with split access
#21 | 2024-01-04 ✅ Patent 11,966,750 granted on 2024-04-23System-on-chip management controller
#22 | 2024-01-04 ✅ Patent 12,159,056 granted on 2024-12-03Extending functionality of memory controllers in a processor-based device
#23 | 2024-01-04 ✅ Patent 12,282,064 granted on 2025-04-22Component die validation built-in self-test (VBIST) engine
#24 | 2024-01-04 ✅ Patent 12,241,932 granted on 2025-03-04Method and system for testing semiconductor circuits
#25 | 2024-01-04 ✅ Patent 11,879,936 granted on 2024-01-23On-die clock period jitter and duty cycle analyzer
#26 | 2023-12-28 ✅ Patent 12,141,587 granted on 2024-11-12Generalized boot operation for disaggregated, multiple (multi-) die computing systems, and related methods
#27 | 2023-12-21 ✅ Patent 11,880,686 granted on 2024-01-23Devices transferring cache lines, including metadata on external links
#28 | 2023-10-05 ✅ Patent 12,204,410 granted on 2025-01-21Integrated error correction code (ECC) and parity protection in memory control circuits for increased memory utilization
#29 | 2023-10-05 ✅ Patent 11,934,263 granted on 2024-03-19Parity protected memory blocks merged with error correction code (ECC) protected blocks in a codeword for increased memory utilization
#30 | 2023-06-08 ✅ Patent 12,182,417 granted on 2024-12-31Address-range memory mirroring in a computer system, and related methods
#31 | 2023-04-20 ✅ Patent 11,934,834 granted on 2024-03-19Instruction scheduling in a processor using operation source parent tracking
#32 | 2023-03-16 ✅ Patent 12,228,994 granted on 2025-02-18Method, apparatus, and system for calibrating a processor power level estimate
#33 | 2023-03-16 ✅ Patent 12,399,998 granted on 2025-08-26COMPUTING SYSTEMS EMPLOYING MEASUREMENT OF BOOT COMPONENTS, SUCH AS PRIOR TO TRUSTED PLATFORM MODULE (TPM) AVAILABILITY, FOR ENHANCED BOOT SECURITY, AND RELATED METHODS
#34 | 2023-02-23 ✅ Patent 11,868,209 granted on 2024-01-09Method and system for sequencing data checks in a packet
#35 | 2022-12-22 ✅ Patent 12,645,628 granted on 2026-06-02METHOD AND SYSTEM FOR DATA TRANSACTIONS ON A COMMUNICATIONS INTERFACE
#36 | 2022-12-15 ✅ Patent 12,007,896 granted on 2024-06-11Apparatuses, systems, and methods for configuring combined private and shared cache levels in a processor-based system
#37 | 2022-12-15 ✅ Patent 11,880,306 granted on 2024-01-23Apparatus, system, and method for configuring a configurable combined private and shared cache
#38 | 2022-12-15 ✅ Patent 11,947,454 granted on 2024-04-02Apparatuses, systems, and methods for controlling cache allocations in a configurable combined private and shared cache in a processor-based system
#39 | 2022-11-29 ✅ Patent 11,513,798 granted on 2022-11-29Implementation of load acquire/store release instructions using load/store operation with DMB operation
#40 | 2022-10-25 ✅ Patent 11,481,270 granted on 2022-10-25Method and system for sequencing data checks in a packet
#41 | 2022-08-04 ✅ Patent 12,056,497 granted on 2024-08-06Multi-socket computing system employing a parallelized boot architecture with partially concurrent processor boot-up operations, and related methods
#42 | 2022-08-04 ✅ Patent 11,507,130 granted on 2022-11-22Distributing a global counter value in a multi-socket system-on-chip complex
#43 | 2022-06-30 ✅ Patent 11,972,288 granted on 2024-04-30Apparatus, system, and method for multi-level instruction scheduling in a microprocessor
#44 | 2022-03-24 ✅ Patent 11,822,487 granted on 2023-11-21Flexible storage and optimized search for multiple page sizes in a translation lookaside buffer
#45 | 2022-02-10 ✅ Patent 12,333,001 granted on 2025-06-17MITIGATION OF RETURN STACK BUFFER SIDE CHANNEL ATTACKS IN A PROCESSOR
#46 | 2022-02-10 ✅ Patent 11,586,537 granted on 2023-02-21Method, apparatus, and system for run-time checking of memory tags in a processor-based system
#47 | 2021-12-23 ✅ Patent 11,762,660 granted on 2023-09-19Virtual 3-way decoupled prediction and fetch
#48 | 2021-06-24 ✅ Patent 11,386,016 granted on 2022-07-12Flexible storage and optimized search for multiple page sizes in a translation lookaside buffer
#49 | 2021-06-24 ✅ Patent 12,175,243 granted on 2024-12-24Hardware micro-fused memory operations
#50 | 2020-10-27 ✅ Patent 10,819,783 granted on 2020-10-27Managing a data packet for an operating system associated with a multi-node system
#51 | 2019-10-08 ✅ Patent 10,439,960 granted on 2019-10-08Memory page request for optimizing memory page latency associated with network nodes
#52 | 2019-08-06 ✅ Patent 10,372,615 granted on 2019-08-06Data management for cache memory
#53 | 2019-07-09 ✅ Patent 10,348,281 granted on 2019-07-09Clock control based on voltage associated with a microprocessor
#54 | 2019-06-11 ✅ Patent 10,318,696 granted on 2019-06-11Efficient techniques for process variation reduction for static timing analysis
#55 | 2018-12-25 ✅ Patent 10,162,373 granted on 2018-12-25Variation immune on-die voltage droop detector
#56 | 2018-09-13 ✅ Patent 10,109,345 granted on 2018-10-23Write assist for memories with resistive bit lines
#57 | 2018-08-23 ✅ Patent 10,613,984 granted on 2020-04-07Prefetch tag for eviction promotion
#58 | 2018-08-09 ✅ Patent 10,102,164 granted on 2018-10-16Multiple-queue integer coalescing mapping algorithm with shared based time
#59 | 2018-07-26 ✅ Patent 10,318,676 granted on 2019-06-11Techniques for statistical frequency enhancement of statically timed designs
#60 | 2018-07-19 ✅ Patent 10,191,868 granted on 2019-01-29Priority framework for a computing device
#61 | 2018-06-21 ✅ Patent 10,204,698 granted on 2019-02-12Method to dynamically inject errors in a repairable memory on silicon and a method to validate built-in-self-repair logic
#62 | 2018-06-14 ✅ Patent 10,049,725 granted on 2018-08-14Write assist for memories with resistive bit lines
#63 | 2018-06-07 ✅ Patent 10,339,065 granted on 2019-07-02Optimizing memory mapping(s) associated with network nodes
#64 | 2018-05-08 ✅ Patent 9,965,419 granted on 2018-05-08Multiple-queue integer coalescing mapping algorithm with shared based time
#65 | 2017-09-14 ✅ Patent 10,145,868 granted on 2018-12-04Self-referenced on-die voltage droop detector
#66 | 2017-04-06 ✅ Patent 9,971,617 granted on 2018-05-15Virtual appliance on a chip
#67 | 2017-03-02 ✅ Patent 9,998,100 granted on 2018-06-12Package programmable decoupling capacitor array
#68 | 2016-11-17 ✅ Patent 9,971,693 granted on 2018-05-15Prefetch tag for eviction promotion
#69 | 2016-06-16 ✅ Patent 10,083,131 granted on 2018-09-25Generating and/or employing a descriptor associated with a memory translation table
#70 | 2016-03-31 ✅ Patent 9,928,183 granted on 2018-03-27Priority framework for a computing device
#71 | 2015-12-17 ✅ Patent 10,031,867 granted on 2018-07-24Pulse-latch based bus design for increased bandwidth
#72 | 2015-11-12 ✅ Patent 11,093,401 granted on 2021-08-17Hazard prediction for a group of memory access instructions using a buffer associated with branch prediction
#73 | 2015-11-12 ✅ Patent 10,310,857 granted on 2019-06-04Systems and methods facilitating multi-word atomic operation support for system on chip environments
#74 | 2015-04-09 ✅ Patent 10,972,390 granted on 2021-04-06TCP segmentation offload in a server on a chip
#75 | 2015-04-02 ✅ Patent 10,210,096 granted on 2019-02-19Multi-stage address translation for a computing device
#76 | 2015-01-29 ✅ Patent 10,205,666 granted on 2019-02-12End-to-end flow control in system on chip interconnects
Also check out Ampere Computing LLC's (Santa Clara, United States) applicant profile with 103 patent applications submitted.
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