Joining method and device produced by this method and joining unit

Methods for forming circuit pattern forming region in an insulating substrate

METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE INCLUDING THROUGH ELECTRODE

METHOD FOR PACKAGING A SEMICONDUCTOR CHIP, AND SEMICONDUCTOR PACKAGE

Hybrid bonding techniques for multi-layer semiconductor stacks

Integrated circuits with backside metalization and production method thereof

Power/ground layout for chips

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR

Integrated circuit package and physical layer interface arrangement

SEMICONDUCTOR DEVICE HAVING UNDER-BUMP METALLIZATION (UBM) STRUCTURE AND METHOD OF FORMING THE SAME

Wafer level packaging of micro-electro-mechanical systems (MEMS) and complementary metal-oxide-semiconductor (CMOS) substrates

Semiconductor component having a second passivation layer having a first opening exposing a bond pad and a plurality of second openings exposing a top surface of an underlying first passivation layer

CENTRIPETAL LAYOUT FOR LOW STRESS CHIP PACKAGE

Chip package and manufacturing method thereof

Shielding techniques for an integrated circuit

Chip package

Light emitting device and method for manufacturing same

Test structures for through silicon vias (TSVs) of three dimensional integrated circuit (3DIC)

Bonding process and bonded structures

Method of forming through silicon via of semiconductor device using low-k dielectric material

WAFER LEVEL LED PACKAGE STRUCTURE FOR INCREASING LIGHT-EMITTING EFFICIENCY AND HEAT-DISSIPATING EFFECT AND METHOD FOR MANUFACTURING THE SAME

MEMS microphone

Stacked semiconductor package having electrical connections or varying heights between substrates, and semiconductor device including the stacked semiconductor package

LASER RELEASE PROCESS FOR VERY THIN SI-CARRIER BUILD

Bump for semiconductor package, semiconductor package having bump, and stacked semiconductor package

Semiconductor device and method of manufacturing the same

Microelectronic assemblies having compliancy and methods therefor

Semiconductor device for semiconductor package having through silicon vias of different heights

Semiconductor packages and methods of fabricating the same

Semiconductor chip having different pad width to UBM width ratios and method of manufacturing the same

Copper pillar bump with cobalt-containing sidewall protection

Under-bump metallization (UBM) structure and method of forming the same

Semiconductor Package And Method For Making The Same

Conductive pillar structure

Semiconductor die and method of forming noise absorbing regions between THVs in peripheral region of the die

Semiconductor package

Semiconductor device and method of manufacturing the same

SEMICONDUCTOR DEVICE, METHOD FOR FORMING THE SAME, AND DATA PROCESSING SYSTEM

Semiconductor device with interposer and method manufacturing same

Bonding apparatus and bonding method

Bonding apparatus

Method and system for forming conductive bumping with copper interconnection

Vertical semiconductor device with thinned substrate

Integrated circuit tampering protection and reverse engineering prevention coatings and methods

SEMICONDUCTOR PACKAGE HAVING AN IMPROVED CONNECTION STRUCTURE AND METHOD FOR MANUFACTURING THE SAME

Method of fabricating stacked chips in a semiconductor package

Wafer level stack die package

Semiconductor element having conductive vias and semiconductor package having a semiconductor element with conductive vias and method for making the same

Layered chip package and method of manufacturing same

Manufacturing of a device including a semiconductor chip

Semiconductor having chip stack, semiconductor system, and method of fabricating the semiconductor apparatus

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

Semiconductor assembly and semiconductor package including a solder channel

Semiconductor device and semiconductor package having the same

Method for manufacturing semiconductor device, and semiconductor device

STACKED SEMICONDUCTOR PACKAGE HAVING CONDUCTIVE VIAS AND METHOD FOR MAKING THE SAME

CHIP STACKED STRUCTURE

PACKAGE WITH EMBEDDED CHIP AND METHOD OF FABRICATING THE SAME

Electronic component device, method of manufacturing the same and wiring substrate

Integrated circuit packaging system with interposer interconnections and method of manufacture thereof

MILLIMETER DEVICES ON AN INTEGRATED CIRCUIT

Semiconductor device including shielding layer and fabrication method thereof

Vertical semiconductor device with thinned substrate

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

Cost-effective TSV formation

Dimensionally decoupled ball limiting metalurgy

Method of manufacturing semiconductor device

Flexible packaging for chip-on-chip and package-on-package technologies

Metal wiring structures for uniform current density in C4 balls

Method for producing a metallization having two multiple alternating metallization layers for at least one contact pad and semiconductor wafer having said metallization for at least one contact pad

Thin flip chip package structure

Sheet-molded chip-scale package

Transferring an antenna to an RFID inlay substrate

Method of Contacting a Semiconductor Substrate

SEMICONDUCTOR DEVICE MANUFACTURING METHOD

FLIP-CHIP BONDING METHOD TO REDUCE VOIDS IN UNDERFILL MATERIAL

Manufacturing method of semiconductor device

Bonding process and bonded structures

Set of resin compositions for preparing system-in-package type semiconductor device

Semiconductor device and manufacturing method thereof

Semiconductor device and method of bonding different size semiconductor die at the wafer level

Semiconductor device and method of forming TSV interposer with semiconductor die and build-up interconnect structure on opposing surfaces of the interposer

Methods of forming fully embedded bumpless build-up layer packages and structures formed thereby

Semiconductor structure and method for making same

Semiconductor device and method of forming vertical interconnect structure between non-linear portions of conductive layers

Package for semiconductor device including guide rings and manufacturing method of the same

SEMICONDUCTOR DEVICE PROVIDED WITH REAR PROTECTIVE FILM ON OTHER SIDE OF SEMICONDUCTOR SUBSTRATE AND MANUFACTURING METHOD OF THE SAME

Semiconductor device and manufacturing method of the same

Method and system for improving reliability of a semiconductor device

Semiconductor device and a method of manufacturing the same

Semiconductor device and method of forming protective structure around semiconductor die for localized planarization of insulating layer

Semiconductor package with integrated metal pillars and manufacturing methods thereof

Communication device

Power conversion module

Device and method for manufacturing a device

Stacked semiconductor device assembly

Semiconductor device manufacture in which minimum wiring pitch of connecting portion wiring layer is less than minimum wiring pitch of any other wiring layer

Component having a via

Semiconductor device and method for manufacturing the same

SEMICONDUCTOR PACKAGES, ELECTRONIC DEVICES AND ELECTRONIC SYSTEMS EMPLOYING THE SAME

VLSI Package for High Performance Integrated Circuit

Semiconductor device and method of forming composite bump-on-lead interconnection

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

Integrated circuit packaging system with post and method of manufacture thereof

Staged via formation from both sides of chip

Integrated circuit packaging system with active surface heat removal and method of manufacture thereof

Package substrate, module and electric/electronic devices using the same

SEMICONDUCTOR PACKAGE INCLUDING DECOUPLING SEMICONDUCTOR CAPACITOR

Massively parallel interconnect fabric for complex semiconductor devices

Interposer-embedded printed circuit board

Method for reducing UBM undercut in metal bump structures

Method for producing chip elements equipped with wire insertion grooves

Apparatus for restricting moisture ingress

Semiconductor component and device provided with heat dissipation means

Chip assembly with a coreless substrate employing a patterned adhesive layer

Semiconductor device and manufacturing method thereof

STACK PACKAGE AND METHOD FOR MANUFACTURING THE SAME

SEMICONDUCTOR CHIP, STACKED CHIP SEMICONDUCTOR PACKAGE INCLUDING THE SAME, AND FABRICATING METHOD THEREOF

Collar structure around solder balls that connect semiconductor die to semiconductor chip package substrate

BACK SIDE PROTECTIVE STRUCTURE FOR A SEMICONDUCTOR PACKAGE

Semiconductor device having metal posts non-overlapping with other devices and layout method of semiconductor device

Semiconductor device

Semiconductor device having pad structure with stress buffer layer

Semiconductor device and method of forming base substrate with cavities formed through etch-resistant conductive layer for bump locking

Semiconductor chip with redundant thru-silicon-vias

Semiconductor module and method for production thereof

3-D integrated semiconductor device comprising intermediate heat spreading capabilities

Semiconductor device and method of forming leadframe interposer over semiconductor die and TSV substrate for vertical electrical interconnect

Systems and methods for enabling ESD protection on 3-D stacked devices

Liquid electrical interconnect and devices using same

Memory card package structure and method for fabricating the same

COOLING MECHANISM FOR STACKED DIE PACKAGE AND METHOD OF MANUFACTURING THE SAME

Method for manufacturing semiconductor device

RFIC chip mounting structure

Layered chip package and method of manufacturing same

Compliant printed circuit wafer level semiconductor package

Semiconductor device and method of forming interposer frame over semiconductor die to provide vertical interconnect

Die edge contacts for semiconductor devices

Ramp-stack chip package with static bends

Semiconductor device with pads of enhanced moisture blocking ability

Semiconductor device and method of forming WLP with semiconductor die embedded within penetrable encapsulant between TSV interposers

Semiconductor device and manufacturing method of semiconductor device

Embedded package and method for manufacturing the same

SEMICONDUCTOR DEVICE

Semiconductor device and method of forming different height conductive pillars to electrically interconnect stacked laterally offset semiconductor die

Alignment marks in substrate having through-substrate via (TSV)

Semiconductor device and method of forming base leads from base substrate as standoff for stacking semiconductor die

Semiconductor device and method of forming TSV semiconductor wafer with embedded semiconductor die

Method for Forming Lead-Free Solder Balls with a Stable Oxide Layer Based on a Plasma Process

METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE INCLUDING EXPOSING A DICING LINE ON A WAFER

Method of manufacturing semiconductor device

Interposer chip, multi-chip package including the interposer chip, and method of manufacturing the same

Stretchable electronic device

SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME

Wafer level chip scale package having an enhanced heat exchange efficiency with an EMF shield and a method for fabricating the same

Bumpless build-up layer package with pre-stacked microelectronic devices

Semiconductor device and method for manufacturing the same

Substrate dicing technique for separating semiconductor dies with reduced area consumption

Manufacturing fixture for a ramp-stack chip package using solder for coupling a ramp component

Method and system for routing electrical connections of semiconductor chips

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE

PACKAGE STRUCTURE HAVING THROUGH-SILICON-VIA (TSV) CHIP EMBEDDED THEREIN AND FABRICATION METHOD THEREOF

BALL GRID ARRAY PACKAGE

Bump structure with underbump metallization structure and integrated redistribution layer

Semiconductor apparatus

SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME

Multi-chip package and method of manufacturing the same

Package substrate having main dummy pattern located in path of stress

Stress reduction in chip packaging by using a low-temperature chip-package connection regime

Helical springs electrical connecting a plurality of packages

Pillar bumps and process for making same

Semiconductor device and method of forming FO-WLCSP with discrete semiconductor components mounted under and over semiconductor die

Conductive connection structure with stress reduction arrangement for a semiconductor device, and related fabrication method

Semiconductor package structure and manufacturing process thereof

STACKABLE SEMICONDUCTOR DEVICE PACKAGES

Hybrid multilayer substrate

Cylindrical embedded capacitors

Processes of forming an electronic device including a feature in a trench

Semiconductor device and method of manufacturing the same, and power supply apparatus

Structure and process for electrical interconnect and thermal management

Multilevel interconnection system

Authentication device, authentication method, and an information storage medium storing a program

Semiconductor device and method of forming vertically offset conductive pillars over first substrate aligned to vertically offset BOT interconnect sites formed over second substrate

Semiconductor module system having stacked components with encapsulated through wire interconnects (TWI)

Stacked semiconductor chip device with thermal management circuit board

Semiconductor device and electronic apparatus including the same

IMPLEMENTING MULTIPLE DIFFERENT TYPES OF DIES FOR MEMORY STACKING

Semiconductor device, manufacturing method thereof, and manufacturing method of semiconductor module

WAFER-LEVEL PACKAGE USING STUD BUMP COATED WITH SOLDER

Mechanisms for forming copper pillar bumps using patterned anodes

Electronic component having an authentication pattern

Device-embedded flexible printed circuit board and manufacturing method thereof

Process for making conductive post with footing profile

DEVICE MOUNTING STRUCTURE AND DEVICE MOUNTING METHOD

Composite electronic circuit assembly

High-frequency switch

Semiconductor device and method of forming wafer-level multi-row etched leadframe with base leads and embedded semiconductor die

Thermal enhancement for multi-layer semiconductor stacks

Semiconductor device and method of forming Fo-WLCSP having conductive layers and conductive vias separated by polymer layers

Semiconductor device and method of forming B-stage conductive polymer over contact pads of semiconductor die in Fo-WLCSP

Semi-conductor chip with compressible contact structure and electronic package utilizing same

Integrated circuit packaging system with stacked lead and method of manufacture thereof

Semiconductor device and method of forming vertical interconnect in FO-WLCSP using leadframe disposed between semiconductor die

Semiconductor device and method of manufacturing the same

Through hole vias at saw streets including protrusions or recesses for interconnection

Process for Preparing Conductive Films and Articles Prepared Using the Process

Process for Preparing Conductive Films and Articles Prepared Using the Process

Cooling device, electronic substrate and electronic device

Chip scale package and fabrication method thereof

Package substrate for bump on trace interconnection

Semiconductor die and method of forming Fo-WLCSP vertical interconnect using TSV and TMV

SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME

Electronic component and method for manufacturing the same

Semiconductor integrated circuit device

Package structure with underfilling material and packaging method thereof

Air through-silicon via structure

Semiconductor device

Semiconductor device having a conductive layer reliably formed under an electrode pad

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

Flip chip package utilizing trace bump trace interconnection

Optoelectronic semiconductor device

Method of manufacturing component embedded printed circuit board

Manufacturing method of semiconductor apparatus and semiconductor apparatus

Alpha particle blocking wire structure and method fabricating same

Semiconductor device and manufacturing method thereof

Semiconductor apparatus, method of manufacturing the same, and method of manufacturing semiconductor package

Embedded wafer-level bonding approaches

Integrated circuit package with voltage distributor

Integrated circuit structure incorporating a conductor layer with both top surface and sidewall passivation and a method of forming the integrated circuit structure

Semiconductor device and method of designing a wiring of a semiconductor device

Semiconductor device and method of forming vertically offset bond on trace interconnects on different height traces

Semiconductor device

SEMICONDUCTOR PACKAGE

Method for manufacturing semiconductor device

Microelectronic packages with nanoparticle joining

Wafer level chip scale package

RFID INLET AND RFID TAG, AND METHOD FOR MANUFACTURING RFID INLET AND RFID TAG

Substrate bonding system and method of modifying the same

Method and apparatus for manufacturing three-dimensional integrated circuit

Forming low stress joints using thermal compress bonding

Electronic module with vertical connector between conductor patterns

Stacked interconnect heat sink

Tiered integrated circuit assembly and a method for manufacturing the same

Semiconductor device and method of forming RDL wider than contact pad along first axis and narrower than contact pad along second axis

SEMICONDUCTOR MODULE AND METHOD OF MANUFACTURING THE SAME

Active chip on carrier or laminated chip having microelectronic element embedded therein

SEMICONDUCTOR DEVICE WITH INDUCTOR AND FLIP-CHIP

Semiconductor apparatus having through vias configured to isolate power supplied to a memory chip from data signals supplied to the memory chip

CONDUCTIVE STRUCTURE FOR A SEMICONDUCTOR INTEGRATED CIRCUIT

Semiconductor device and method of forming stress relief layer between die and interconnect structure

SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF

Doping minor elements into metal bumps

Multi-die stacking using bumps with different sizes

Reducing delamination between an underfill and a buffer layer in a bond structure

Semiconductor device and method of forming RDL over contact pad with high alignment tolerance or reduced interconnect pitch

Stack package and semiconductor package including the same

Mold design and semiconductor package

Microelectronic elements having metallic pads overlying vias

Microelectronic elements with rear contacts connected with via first or via middle structures

Metal-contamination-free through-substrate via structure

COATING AND ELECTRONIC COMPONENT

Method of manufacturing wafer level package

Isolated stacked die semiconductor packages

System and method for multi-chip module die extraction and replacement

Method of fabricating semiconductor package

PCB-mounted integrated circuits

Layered chip package and method of manufacturing same

Layered chip package and method of manufacturing same

Method for forming 3D-interconnect structures with airgaps

Die package structure

Methods of forming bonded semiconductor structures using a temporary carrier having a weakened ion implant region for subsequent separation along the weakened region

CHIP SCALE PACKAGE AND FABRICATION METHOD THEREOF

Semiconductor device having an interconnect structure with TSV using encapsulant for structural support

Conductive sidewall for microbumps

Recessed pillar structure

Integrated shielding for a package-on-package system

Semiconductor device and method of forming protective layer over exposed surfaces of semiconductor die

Methods of forming semiconductor chip underfill anchors

Substrate stand-offs for semiconductor devices

INTERCONNECTIONS FOR FLIP-CHIP USING LEAD-FREE SOLDERS AND HAVING REACTION BARRIER LAYERS

THERMAL FLEX CONTACT CARRIERS #2

UBM Etching Methods

Semiconductor package with a reduced volume and thickness and capable of high speed operation and method for fabricating the same

Misalignment correction for embedded microelectronic die applications

Method of manufacturing semiconductor device

Wiring board and method for manufacturing the same

Multi-layer via structure

Semiconductor chip and stack package having the same

Backside processing of semiconductor devices

Methods, devices, and materials for metallization

Method of manufacturing a semiconductor device

SEMICONDUCTOR ELEMENT AND FABRICATION METHOD THEREOF

Microelectronic packages with dual or multiple-etched flip-chip connectors

Method of forming Cu pillar capped by barrier layer

Method of forming semiconductor die

Enhanced thermal management of 3-D stacked die packaging

Conductive pillar for semiconductor substrate and method of manufacture

Integrated circuit packaging system with a component in an encapsulant cavity and method of fabrication thereof

IN-STREET DIE-TO-DIE INTERCONNECTS

Conductive bumps, wire loops, and methods of forming the same