GOLD BONDING IN SEMICONDUCTOR DEVICES USING POROUS GOLD

SEMICONDUCTOR DEVICE STRUCTURES AND METHODS FOR COPPER BOND PADS

Semiconductor package with improved redistribution layer design and fabricating method thereof

Metal pads with openings in integrated circuits

Bump structures for semiconductor package

Die underfill structure and method

Heat spreader for use within a packaged semiconductor device

Three dimensional (3D) fan-out packaging mechanisms

Stacked die power converter

Multilayer packaged semiconductor device and method of packaging

Integrated circuits and a method for manufacturing an integrated circuit

Semiconductor chip and semiconductor package having the same

High voltage solid-state transducers and solid-state transducer arrays having electrical cross-connections and associated systems and methods

Chip package and a method for manufacturing a chip package

Semiconductor device

Method and apparatus for routing die signals using external interconnects

Method for manufacturing a circuit board structure

Method of manufacturing a component comprising cutting a carrier

METHOD FOR MAKING A DOUBLE-SIDED FANOUT SEMICONDUCTOR PACKAGE WITH EMBEDDED SURFACE MOUNT DEVICES, AND PRODUCT MADE

Semiconductor device package and methods of packaging thereof

Copper post solder bumps on substrates

Method for manufacturing a metal pad structure of a die, a method for manufacturing a bond pad of a chip, a die arrangement and a chip arrangement

Stacked microelectronic packages having patterned sidewall conductors and methods for the fabrication thereof

Stacked microelectronic packages having sidewall conductors and methods for the fabrication thereof

Copper ball bond features and structure

Devices for metallization

Terminal structure, and semiconductor element and module substrate comprising the same

Terminal structure and semiconductor device

Terminal structure and semiconductor device

Semiconductor package having protective layer with curved surface and method of manufacturing same

LED package structure having a light-projecting angle adjusting function

LED ILLUMINATION DEVICE

Method of manufacturing electronic component module and electronic component module

INTEGRATED CIRCUIT PACKAGE HAVING MEDIUM-INDEPENDENT SIGNALING INTERFACE COUPLED TO CONNECTOR ASSEMBLY

Multi-chip semiconductor apparatus

Microelectronic package having non-coplanar, encapsulated microelectronic devices and a bumpless build-up layer

Pad sidewall spacers and method of making pad sidewall spacers

Thermally enhanced interconnect substrate with embedded semiconductor device and built-in stopper and method of making the same

SENSOR PACKAGES AND METHOD OF PACKAGING DIES OF VARIOUS SIZES

Mounted structure

Contact pads with sidewall spacers and method of making contact pads with sidewall spacers

High temperature interconnect assemblies for high temperature electronics utilizing transition pads

Bonded structures for package and substrate

Multi-chip module with multiple interposers

Semiconductor package having a recess filled with a molding compound

INTEGRATED CIRCUIT

Integrated circuit packaging system with array contacts and method of manufacture thereof

Semiconductor device and method of forming a fan-out PoP device with PWB vertical interconnect units

METHOD FOR FABRICATING LIGHT EMITTING DIODE (LED) DICE USING BOND PAD DAM AND WAVELENGTH CONVERSION LAYERS

Package assembly and methods for forming the same

Interposer system and method

Apparatus, system, and method for wireless connection in integrated circuit packages

SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME

Controlled collapse chip connection (C4) structure and methods of forming

Fine Pitch Package-on-Package Structure

Package on package devices and methods of forming same

Integrated circuit with a thermally conductive underfill and methods of forming same

Multi-chip module power clip

Semiconductor device including a trench in a semiconductor substrate and method of manufacturing a semiconductor device

Method and system for gallium nitride electronic devices using engineered substrates

PACKAGE CARRIER AND MANUFACTURING METHOD THEREOF

Looped interconnect structure

Panelized process for SMT sensor devices

Method for plating a semiconductor package lead

Thin leadframe QFN package design of RF front-ends for mobile wireless communication

Integrated system and method of making the integrated system

Multiple surface integrated devices on low resistivity substrates

Semiconductor device and programming method

Pierced Substrate on Chip Module Structure

Chip package and a method for manufacturing a chip package

Reconstituted wafer-level package DRAM

Metal cored solder decal structure and process

Bump on pad (BOP) bonding structure

Embedded package security tamper mesh

Semiconductor devices having stacked solder bumps with intervening metal layers to provide electrical interconnections

Method of fabricating a chip package

SEMICONDUCTOR MANUFACTURING METHOD AND SEMICONDUCTOR STRUCTURE THEREOF

SEMICONDUCTOR MANUFACTURING METHOD, SEMICONDUCTOR STRUCTURE AND PACKAGE STRUCTURE THEREOF

Packaging and methods for packaging

Method and structure of forming backside through silicon via connections

Semiconductor package having an antenna and manufacturing method thereof

Substrate inside type module structure

Window Type Camera Module Structure

Substrate connection type module structure

Power device integration on a common substrate

Capacitive pressure sensor in an overmolded package

OPTICAL SYSTEM WITH INTEGRATED PHOTODETECTORS

Reliable surface mount integrated power module

Diffusion barrier for surface mount modules

Measuring current in a power regulator system

Field emission devices and methods of making thereof

Production of adhesion structures in dielectric layers using photoprocess technology and devices incorporating adhesion structures

Repairing anomalous stiff pillar bumps

Bump structure for yield improvement

Electric device package comprising a laminate and method of making an electric device package comprising a laminate

Reconstituted wafer package with high voltage discrete active dice and integrated field plate for high temperature leakage current stability

Three-dimensional integrated circuit laminate, and interlayer filler for three-dimensional integrated circuit laminate

CIS chips and methods for forming the same

Packages and methods for 3D integration including two stacked dies with a portion of one die extending into a hole of the other die

Monolithic bidirectional silicon carbide switching devices

Warpage control in the packaging of integrated circuits

Detecting anomalous weak BEOL sites in a metallization system

Detecting anomalous stiff pillar bumps formed above a metallization system

Vertically integrated systems

Microelectric package utilizing multiple bumpless build-up structures and through-silicon vias

Semiconductor package and method of fabricating the same

Optimization metallization for prevention of dielectric cracking under controlled collapse chip connections

Packaged semiconductor die with power rail pads

Semiconductor device and manufacturing method of same

Solder volume compensation with C4 process

Control of silver in C4 metallurgy with plating process

Semiconductor manufacturing method and semiconductor structure thereof

Redistribution layer (RDL) with variable offset bumps

Three-dimensional integrated circuits and fabrication thereof

Wafer-level device packaging

Packaging structures and methods for semiconductor devices

Configurable passive components

Solid state lighting component package with reflective polymer matrix layer

GaN power device with solderable back metal

Chip card module

Methods for flip chip stacking

Interposer and semiconductor module using the same

Semiconductor device packages including thermally insulating materials and methods of making and using such semiconductor packages

Chip stack packages, system in packages including the same, and methods of operating the same

Stacked fan-out semiconductor chip

SEMICONDUCTOR PACKAGE AND STACKED SEMICONDUCTOR PACKAGE USING THE SAME

Semiconductor package and method of fabricating the same

Pillar on pad interconnect structures, semiconductor dice and die assemblies including such interconnect structures, and related methods

Sensor package and method of forming same

Method of forming post passivation interconnects

Chip package comprising alignment mark and method for forming the same

Lead frame support plate and window clamp for wire bonding machines

Embedded secure element for authentication, storage and transaction within a mobile terminal

Semiconductor device and method of manufacturing the same

Hybrid bonding systems and methods for semiconductor wafers

Copper or copper alloy, bonding wire, method of producing the copper, method of producing the copper alloy, and method of producing the bonding wire

Light emitting device package

Methods for receiving and transmitting voltage through the use of supply voltage or ground connections including bond pad interconnects for integrated circuit devices

Differential return loss supporting high speed bus interfaces

Substrate, method of manufacturing substrate, semiconductor device, and electronic apparatus

Component and method of manufacturing a component using an ultrathin carrier

Submicron connection layer and method for using the same to connect wafers

Semiconductor device

Semiconductor packages and methods of forming the same

Bump-on-trace packaging structure and method for forming the same

Semiconductor device housing package, and semiconductor apparatus and electronic apparatus including the same

Photonic semiconductor devices in LLC assembly with controlled molding boundary and method for forming same

Thermal leadless array package with die attach pad locking feature

Chip package and method of manufacturing the same

Semiconductor device and method of forming cavity adjacent to sensitive region of semiconductor die using wafer-level underfill material

Semiconductor packages having multiple lead frames and methods of formation thereof

Method of manufacturing semiconductor packaging

System and method for forming uniform rigid interconnect structures

Waveguide integration on laser for alignment-tolerant assembly

Gate driver circuit for inductive load, inverter module, and inverter apparatus having the same

Power transistor with heat dissipation and method therefor

3DIC stacking device and method of manufacture

Package structures and methods for forming the same

Interposers including fluidic microchannels and related structures and methods

Methods and structures for reducing heat exposure of thermally sensitive semiconductor devices

Semiconductor device having silicon interposer on which semiconductor chip is mounted

Method for manufacturing a chip package

Semiconductor package structure having an air gap and method for forming

Integrated WLUF and SOD process

CHIP PACKAGES, CHIP ARRANGEMENTS, A CIRCUIT BOARD, AND METHODS FOR MANUFACTURING CHIP PACKAGES

Solder flow impeding feature on a lead frame

Package-in-packages and methods of formation thereof

SEMICONDUCTOR PACKAGE

SEMICONDUCTOR PACKAGE

Semiconductor structures including fluidic microchannels for cooling and related methods

Film-assist molded gel-fill cavity package with overflow reservoir

FET TRANSISTOR ON HIGH-RESISTIVITY SUBSTRATE

Electronic device including silicon carbide diode dies

Lead Frame Packages and Methods of Formation Thereof

Optical-electric conversion connector

Single layer low cost wafer level packaging for SFF SiP

SOLID STATE LIGHTING LUMINAIRE AND A FABRICATION METHOD THEREOF

SEMICONDUCTOR PACKAGE STRUCTURE

Substrate structure and semiconductor package using the same

Method to enable controlled side chip interconnection for 3D integrated packaging system

Integrated circuit package having offset vias

Integrated circuit packages and methods for forming the same

Semiconductor device and method of manufacturing the same, and wiring substrate and method of manufacturing the same

Carbon nanotube-solder composite structures for interconnects, process of making same, packages containing same, and systems containing same

SEMICONDUCTOR CHIP WITH EXPANSIVE UNDERBUMP METALLIZATION STRUCTURES

Semiconductor device and method of forming an embedded SOP fan-out package

Interposer with identification system

Device contact, electric device package and method of manufacturing an electric device package

Electro-thermal cooling devices and methods of fabrication thereof

Semiconductor device apparatus and assembly with opposite die orientations

Method for forming fuse pad and bond pad of integrated circuit

Package structure having micro-electro-mechanical system element and method of fabrication the same

Photosensor chip package structure

SYSTEM AND METHOD FOR INSPECTING FREE AIR BALL

Wedge bonder and a method of cleaning a wedge bonder

Method for manufacturing light-emitting devices

Apparatus, system, and method for wireless connection in integrated circuit packages

Integrated circuit package and method of making same

Integrated circuit packaging system with through silicon via and method of manufacture thereof

Bumpless build-up layer package design with an interposer

Packaging substrate and semiconductor package

Bonding package components through plating

EMBEDDED PACKAGES AND METHODS OF MANUFACTURING THE SAME

SUBSTRATE STRUCTURE AND PACKAGE STRUCTURE

Electronic device packages having bumps and methods of manufacturing the same

Semiconductor package structure and method for making the same

Wafer level packages of high voltage units for implantable medical devices

Semiconductor modules and methods of formation thereof

Methods, circuits and systems for a package structure having wireless lateral connections

Integrated circuit packaging system with tiebar-less design and method of manufacture thereof

Integrated circuit packaging system with an encapsulation and method of manufacture thereof

LED having vertical contacts redistruted for flip chip mounting

METHOD FOR BONDING LED WAFER, METHOD FOR MANUFACTURING LED CHIP AND BONDING STRUCTURE

Multilayer electronic support structure with cofabricated metal core

Calibration kits for RF passive devices

Three dimensional flip chip system and method

TEST VEHICLES FOR ENCAPSULATED SEMICONDUCTOR DEVICE PACKAGES

PACKAGE CARRIER AND MANUFACTURING METHOD THEREOF

Pre-molded Cavity 3D Packaging Module with Layout

Electric device package and method of making an electric device package

Die edge contacts for semiconductor devices

Chip arrangement and method for producing a chip arrangement

Solderless die attach to a direct bonded aluminum substrate

CTE ADAPTION IN A SEMICONDUCTOR PACKAGE

Methods and apparatus of packaging semiconductor devices

Reduced stress TSV and interposer structures

EMI-shielded semiconductor devices and methods of making

SMALL-SIZE LED PACKAGING STRUCTURE FOR ENHANCING LIGHT EMITTING ANGLE

LED MODULE

Process for electric bonding of an aluminum wire

Bond pad assessment for wire bonding

THREE DIMENSIONAL FLIP CHIP SYSTEM AND METHOD

Via density and placement in radio frequency shielding applications

Three dimensional microelectronic components and fabrication methods for same

Fixture for shaping a laminate substrate

MEMS MICROPHONE MODULE

Isolator and isolator manufacturing method

Semiconductor apparatus comprised of two types of transistors

Semiconductor device, inverter device provided with semiconductor device, and in-vehicle rotating electrical machine provided with semiconductor device and inverter device

Integrated circuit packaging system with substrate and method of manufacture thereof

Semiconductor device

Semiconductor package having reliable electrical connection and assembling method

Three dimensional integrated circuit structures and hybrid bonding methods for semiconductor wafers

Integrated circuit die assembly with heat spreader

Integrated circuit including wire structure, related method and design structure

Reactive bonding of a flip chip package

Scheme for connector site spacing and resulting structures

Semiconductor device and method of reflow soldering for conductive column structure in flip chip package

Re-distribution Layer Via Structure and Method of Making Same

Semiconductor device and method of backgrinding and singulation of semiconductor wafer while reducing kerf shifting and protecting wafer surfaces

Semiconductor package and method of manufacturing the same

System, method and apparatus for leadless surface mounted semiconductor package

Package-in-Package for High Heat Dissipation Having Leadframes and Wire Bonds

Semiconductor package and fabrication method thereof

Methods and structures for reducing heat exposure of thermally sensitive semiconductor devices

PACKAGE STRUCTURE HAVING MEMS ELEMENT AND FABRICATION METHOD THEREOF

HETEROGENEOUS STACK STRUCTURES WITH OPTICAL TO ELECTRICAL TIMING REFERENCE DISTRIBUTION

FINE-PITCH FLEXIBLE WIRING

MULTI-CORE WIRE

Mold compound compatibility test system and methods thereof

Interface for communication between voltage domains

THREE DIMENSIONAL MICROELECTRONIC COMPONENTS AND FABRICATION METHODS FOR SAME

Chip package and method for forming the same

Premolded cavity for optoelectronic device

Light emitting semiconductor element and method of manufacturing the same

Direct Heat Sink Technology for LEDs and Driving Circuits

Circuit module such as a high-density lead frame array (HDA) power module, and method of making same

Low-temperature flip chip die attach

Chip packages and methods for manufacturing a chip package

Substrate-less stackable package with wire-bond interconnect

Multi-chip package and method of manufacturing thereof

Semiconductor Constructions and Methods of Forming Semiconductor Constructions

Implementing decoupling devices inside a TSV DRAM stack

Cavity-type semiconductor package and method of packaging same

Capacitance structure

Method of forming interconnects for three dimensional integrated circuit

Manufacturing method of substrate for a semiconductor package, manufacturing method of semiconductor package, substrate for a semiconductor package and semiconductor package

Multi-chip package with offset die stacking and method of making same

Wafer-level process for fabricating photoelectric modules

Stacked through-silicon via (TSV) transformer structure

Semiconductor device packages with solder joint enhancement elements

Reliable area joints for power semiconductors

Semiconductor package and fabrication method thereof

Three-dimensional chip stack and method of forming the same

Selective solder bump formation on wafer

Wire-based methodology of widening the pitch of semiconductor chip terminals

Packaging with interposer frame

Semiconductor device

Semiconductor packages with thermal dissipation structures and EMI shielding

Package with metal-insulator-metal capacitor and method of manufacturing the same

Structure and Method for Inductors Integrated into Semiconductor Device Packages

IMAGE-SENSING MODULE FOR REDUCING ITS WHOLE THICKNESS

SEMICONDUCTOR LIGHT EMITTING DEVICE

LIGHT EMITTING DEVICE WITH DARK LAYER

Flip light emitting diode chip and method of fabricating the same

Bonding wire for semiconductor

ILLUMINANT DEVICE

Light emitting devices including multiple anodes and cathodes

Compliant micro device transfer head

Semiconductor device and method of controlling warpage in semiconductor package