Philip Ng

Distributed direct memory operations having DMA engine with frontend and selected backend according to affinity identified based on selected physical address space

DEVICES AND SYSTEMS FOR ENFORCING CONFIDENTIAL COMPUTING

Apparatus and methods for translating transactions between one or more requesting units and a target unit

I/O HARDWARE POWER MANAGEMENT

Apparatus and methods for managing outstanding transactions between one or more requesting units and a target unit

MULTI-ADDRESS SPACE COLLECTIVES ENGINE

MEMORY ACCESS ENGINE

Method, system, and apparatus for supporting multiple address spaces to facilitate data movement

Peripheral device protocols in confidential compute architectures

ALLOCATING PERIPHERAL COMPONENT INTERFACE EXPRESS (PCIE) STREAMS IN A CONFIGURABLE MULTIPORT PCIE CONTROLLER

Secure and power efficient audio data processing

System and method for providing page migration

Method, system, and apparatus for supporting multiple address spaces to facilitate data movement

Method and system for recording and logging error handling information

Secure and power efficient audio data processing

Networked input/output memory management unit

Secured input/output resource protection

Virtualized input/output device local memory management

Management component transport protocol (MCTP) support for multiple bus segment groups

SECURITY FOR VIRTUALIZED DEVICE

Steering tag support in virtualized environments

Configurable peripherals

External memory based translation lookaside buffer

I/O writes with cache steering

Input/output memory map unit and northbridge

Direct memory access authorization in a processing system

Back-off mechanism for a peripheral page request log