Pompano Beach, Florida
United States
34
2016-07-28
The entities that hold a legal rights for patent applications filed by inventor Stengel Robert E.:
Robert E. Stengel from Pompano Beach, US has applied for patents for these inventions. The list has both pending applications and granted patents:
Method and apparatus for in-channel interference cancellation
#2 | 2016-06-23Systems and methods for generating injection-locked, frequency-multiplied output signals
#3 | 2015-07-02Method and apparatus for transmitting a signal by a radio frequency identification reader
#4 | 2014-07-03Method and apparatus for single port modulation using a fractional-N modulator
#5 | 2014-03-06METHOD AND APPARATUS FOR A SYNTHESIZER ARCHITECTURE
#6 | 2013-05-09Method and apparatus for a multi-antenna device that uses a single baseband filter and analog-to-digital converter
#7 | 2013-04-23Method and apparatus for fast frequency locking in a closed loop based frequency synthesizer
#8 | 2011-06-30Device and method for phase compensation
#9 | 2010-04-01Method and apparatus for processing radio frequency signals
#10 | 2009-11-19Spectrally constrained local oscillator switching
#11 | 2009-02-05Method and system for managing digital to time conversion
#12 | 2008-10-23Direct digital synthesizer with variable reference for improved spurious performance
#13 | 2008-04-24Clock data recovery systems and methods for direct digital synthesizers
#14 | 2008-04-03Amplifier containing programmable impedance for harmonic termination
#15 | 2008-01-15Method for subscribing to a wireless service
#16 | 2007-12-06Digital-to-time converter using cycle selection windowing
#17 | 2007-09-27Direct digital synthesizer with variable reference for improved spurious performance
#18 | 2007-08-07Delay line based multiple frequency generator circuits for CDMA processing
#19 | 2007-05-17Method and apparatus for vector signal processing
#20 | 2007-01-09Delay locked loop synthesizer with multiple outputs and digital modulation
#21 | 2006-12-26Cascaded delay locked loop circuit
#22 | 2006-11-09System and method for providing an input to a distributed power amplifying system
#23 | 2006-09-26Reconfigurable processing circuit including a delay locked loop multiple frequency generator for generating a plurality of clock signals which are configured in frequency by a control processor
#24 | 2006-09-05RF amplifier with enhanced efficiency
#25 | 2006-05-11Method and apparatus for a digital-to-phase converter
#26 | 2006-03-30System and method for introducing dither for reducing spurs in digital-to-time converter direct digital synthesis
#27 | 2006-02-14Digital pulse width modulation
#28 | 2006-01-19Dynamically matched mixer system with improved in-phase and quadrature (I/Q) balance and second order intercept point (IP2) performance
#29 | 2005-10-27Adjustable frequency delay-locked loop
#30 | 2005-10-25Programmable skew clock signal generator selecting one of a plurality of delayed reference clock signals in response to a phase accumulator output
#31 | 2005-08-04Configurable delay line circuit
#32 | 2005-05-10Method and apparatus for digital frequency synthesis
#33 | 2005-03-24Multiple user reconfigurable CDMA processor
#34 | 2005-03-15Multi-band antennas
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