Dresden
Germany
20
2012-11-08
The entities that hold a legal rights for patent applications filed by inventor Press Patrick:
Patrick Press from Dresden, DE has applied for patents for these inventions. The list has both pending applications and granted patents:
Technique for exposing a placeholder material in a replacement gate approach by modifying a removal rate of stressed dielectric overlayers
#2 | 2011-11-03Maintaining Integrity of a High-K Gate Stack After Embedding a Stressor Material by Using a Liner
#3 | 2011-05-05Semiconductor device comprising NMOS and PMOS transistors with embedded Si/Ge material for creating tensile and compressive strain
#4 | 2010-12-30Technique for exposing a placeholder material in a replacement gate approach by modifying a removal rate of stressed dielectric overlayers
#5 | 2010-07-29Semiconductor device comprising NMOS and PMOS transistors with embedded Si/Ge material for creating tensile and compressive strain
#6 | 2010-06-03Multiple gate transistor having homogenously silicided fin end portions
#7 | 2010-02-04Drive current adjustment for transistors by local gate engineering
#8 | 2009-09-03Semiconductor device comprising a metal gate stack of reduced height and method of forming the same
#9 | 2009-02-05METHOD FOR FORMING A DEEP TRENCH IN AN SOI DEVICE BY REDUCING THE SHIELDING EFFECT OF THE ACTIVE LAYER DURING THE DEEP TRENCH ETCH PROCESS
#10 | 2008-12-04METHOD OF FORMING A SEMICONDUCTOR STRUCTURE COMPRISING AN IMPLANTATION OF IONS IN A MATERIAL LAYER TO BE ETCHED
#11 | 2008-07-31Methods for fabricating low contact resistance CMOS circuits
#12 | 2008-05-01Semiconductor device comprising NMOS and PMOS transistors with embedded Si/Ge material for creating tensile and compressive strain
#13 | 2008-04-03Technique for locally adapting transistor characteristics by using advanced laser/flash anneal techniques
#14 | 2008-03-06Transistor having a locally provided metal silicide region in contact areas and a method of forming the transistor
#15 | 2008-01-17Field effect transistors and methods for fabricating the same
#16 | 2007-12-06METHOD OF INCREASING TRANSISTOR PERFORMANCE BY DOPANT ACTIVATION AFTER SILICIDATION
#17 | 2007-08-30FORMATION OF SILICIDED SURFACES FOR SILICON/CARBON SOURCE/DRAIN REGIONS
#18 | 2007-07-05Technique for forming an isolation trench as a stress source for strain engineering
#19 | 2007-03-01Technique for reducing silicide defects by reducing deleterious effects of particle bombardment prior to silicidation
#20 | 2006-11-30TECHNIQUE FOR REDUCING SILICIDE NON-UNIFORMITIES BY ADAPTING A VERTICAL DOPANT PROFILE
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