Michael Specht

Integrated circuit with an active area line having at least one form-supporting element and corresponding method of making an integrated circuit

Method for forming trenches on a surface of a semiconductor substrate

Integrated circuit with floating-gate electrodes including a transition metal and corresponding manufacturing method

DRAM memory cell

Production method for a FinFET transistor arrangement, and corresponding FinFET transistor arrangement

Semiconductor memory device

Semiconductor memory component with body region of memory cell having a depression and a graded dopant concentration

Semiconductor memory device

Semiconductor memory device and method of production

Nonvolatile memory cell arrangement

Integrated circuit arrangement with low-resistance contacts and method for production thereof

Vertically integrated field-effect transistor having a nanostructure therein

Charge-trapping memory cell and method for production

NROM semiconductor memory device and fabrication method

Non-volatile memory cell, memory cell arrangement and method for production of a non-volatile memory cell

Semiconductor substrate and semiconductor circuit formed therein and fabrication methods

Semiconductor memory with vertical memory transistors and method for fabricating it

Word and bit line arrangement for a FinFET semiconductor memory

Semiconductor memory with vertical memory transistors in a cell array arrangement with 1-2Fcells

Floating gate field-effect transistor

Floating gate memory cell with a metallic source/drain and gate, and method for manufacturing such a floating gate memory gate cell

Semiconductor memory element, semiconductor memory arrangement, method for fabricating a semiconductor memory element and method for operating a semiconductor memory element