Inventor profile of:

Vivek Chickermane

City:

Ithaca, New York

Country:

United States

Published Applications:

25

Last publication date:

2020-08-11

Top Assignees for applications by Vivek Chickermane

The entities that hold a legal rights for patent applications filed by inventor Chickermane Vivek:

Recent patent applications by Chickermane Vivek

Vivek Chickermane from Ithaca, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2020-08-11
US16224592
Physics

Devices and methods for test point insertion coverage

#2 | 2016-11-22
US14639014
Physics

Systems and methods for testing integrated circuit designs

#3 | 2016-10-11
US14639029
Physics

Systems and methods for testing integrated circuit designs

#4 | 2014-12-02
US13673522
Physics

Method and apparatus for low-pin count testing of integrated circuits

#5 | 2014-05-20
US13835871
-

Method and apparatus for automated extraction of a design for test boundary model from embedded IP cores for hierarchical and three-dimensional interconnect test

#6 | 2013-12-24
US12637935
-

Method and system for analyzing test vectors to determine toggle counts

#7 | 2013-11-26
US13717419
-

Method and apparatus to use physical design information to detect IR drop prone test patterns

#8 | 2013-11-12
US12987348
-

Testing to prescribe state capture by, and state retrieval from scan registers

#9 | 2013-08-20
US12815239
Physics

Method and mechanism for implementing electronic designs having power information specifications background

#10 | 2013-06-18
US12823586
-

Method and system for reducing switching activity during scan-load operations

#11 | 2013-05-07
US13445779
-

Method and apparatus to use physical design information to detect IR drop prone test patterns

#12 | 2013-03-05
US13012070
-

Method and apparatus to use physical design information to detect IR drop prone test patterns

#13 | 2012-12-18
US13012087
-

Method and apparatus to use physical design information to detect IR drop prone test patterns

#14 | 2012-10-23
US12649816
-

System and method for automated synthesis of circuit wrappers

#15 | 2012-10-23
US12339958
-

Fault modeling for state retention logic

#16 | 2012-10-09
US13012079
-

Method and apparatus to use physical design information to detect IR drop prone test patterns

#17 | 2011-08-16
US12345950
-

Scan testing architectures for power-shutoff aware systems

#18 | 2011-05-17
US12100197
-

Method and apparatus to detect manufacturing faults in power switches

#19 | 2011-02-08
US11953227
-

Testing to prescribe state capture by, and state retrieval from scan registers

#20 | 2011-01-25
US12058134
-

Method and apparatus to use physical design information to detect IR drop prone test patterns

#21 | 2010-04-06
US11704443
-

Low power scan test for integrated circuits

#22 | 2009-12-31
US20090326854A1
Physics

Testing state retention logic in low power systems

#23 | 2009-05-07
US20090119559A1
Physics

Distributed test compression for integrated circuits

#24 | 2008-03-20
US20080071513A1
Physics

Test generation for low power circuits

#25 | 2007-10-18
US20070245285A1
Physics

Method and mechanism for implementing electronic designs having power information specifications background

InventorID:

3941707 ⎘