Underhill, Vermont
United States
100
2020-09-17
The entities that hold a legal rights for patent applications filed by inventor FIFIELD John A.:
John A. FIFIELD from Underhill, US has applied for patents for these inventions. The list has both pending applications and granted patents:
Charge pump circuit with internal pre-charge configuration
#2 | 2019-10-31Voltage boost circuit
#3 | 2019-10-15Memory array including distributed reference cells for current sensing
#4 | 2019-08-29On-chip reliability monitor and method
#5 | 2019-08-13On-chip calibration circuit and method with half-step resolution
#6 | 2019-05-30Charge pump circuit with built-in-retry
#7 | 2019-05-16High speed level translator
#8 | 2019-01-29Differential voltage generator
#9 | 2018-12-06Voltage boost circuit
#10 | 2018-04-05Electrostatic discharge power clamp with fail-safe design
#11 | 2018-04-05Electrostatic discharge device with fail-safe design
#12 | 2018-02-08High speed level translator
#13 | 2017-09-21Static random access memory (SRAM) write assist circuit with improved boost
#14 | 2017-07-06Voltage boost circuit
#15 | 2017-05-16Operational amplifier with current-controlled up or down hysteresis
#16 | 2016-12-22Latching current sensing amplifier for memory array
#17 | 2016-12-15High speed level translator
#18 | 2016-06-23REGULATION FOR MULTI-PHASE VOLTAGE PUMP SYSTEM
#19 | 2016-06-23Electrostatic discharge power clamp with fail-safe design
#20 | 2016-02-25High speed level translator
#21 | 2016-01-14Voltage boost circuit
#22 | 2015-04-07Adjustable reference voltage generator for single-ended DRAM sensing devices
#23 | 2015-04-02Distributed current clock for nano-magnetic element array
#24 | 2014-10-02Signal margin centering for single-ended eDRAM sense amplifier
#25 | 2014-09-11Method for conversion of commercial microprocessor to radiation-hardened processor and resulting processor
#26 | 2014-01-23Protection of one-time programmable (OTP) memory
#27 | 2014-01-02Memory array with on and off-state wordline voltages having different temperature coefficients
#28 | 2013-12-05Electronically programmable fuse security encryption
#29 | 2013-11-28Multi-bank random access memory structure with global and local signal buffering for improved performance
#30 | 2013-08-22Reference generator with programmable M and B parameters and methods of use
#31 | 2013-08-22VOLTAGE PUMP USING HIGH-PERFORMANCE, THIN-OXIDE DEVICES AND METHODS OF USE
#32 | 2012-07-12Programmable semiconductor device
#33 | 2012-05-24Thermal sensor for semiconductor circuits
#34 | 2012-03-29SRAM having wordline up-level voltage adjustable to assist bitcell stability and design structure for same
#35 | 2011-07-14Charge pump system and method utilizing adjustable output charge and compilation system and method for use by the charge pump
#36 | 2011-04-14METHOD FOR CONVERSION OF COMMERCIAL MICROPROCESSOR TO RADIATION-HARDENED PROCESSOR AND RESULTING PROCESSOR
#37 | 2011-02-10Programmable semiconductor device
#38 | 2010-01-21Regulating electrical fuse programming current
#39 | 2010-01-07SYSTEM TO EVALUATE CHARGE PUMP OUTPUTS AND ASSOCIATED METHODS
#40 | 2009-10-22Regulated voltage boost charge pump for an integrated circuit device
#41 | 2009-10-01Structure for transforming an input voltage to obtain linearity between input and output functions and system and method thereof
#42 | 2009-08-20Two stage voltage boost circuit with precharge circuit preventing leakage, IC and design structure
#43 | 2009-08-20Voltage boost system, IC and design structure
#44 | 2009-08-20Two stage voltage boost circuit, IC and design structure
#45 | 2009-07-16PERFORMANCE INVERSION DETECTION CIRCUIT AND A DESIGN STRUCTURE FOR THE SAME
#46 | 2009-06-18System and method for indicating status of an on-chip power supply system
#47 | 2009-06-18Structure for indicating status of an on-chip power supply system
#48 | 2009-06-04Structure for a voltage detection circuit in an integrated circuit and method of generating a trigger flag signal
#49 | 2009-06-04Voltage Controlled Static Random Access Memory
#50 | 2009-03-05Threshold voltage compensation for pixel design of CMOS image sensors
#51 | 2009-02-05Voltage Pump Circuit with an Oxide Stress Control Mechanism for use in High-Voltage Applications in an Integrated Circuit
#52 | 2009-01-22Voltage detection circuit in an integrated circuit and method of generating a trigger flag signal
#53 | 2009-01-01Error correcting logic system
#54 | 2008-11-06Programmable heavy-ion sensing device for accelerated DRAM soft error detection
#55 | 2008-10-30Programmable heavy-ion sensing device for accelerated DRAM soft error detection
#56 | 2008-07-17Voltage reference circuit for low voltage applications in an integrated circuit
#57 | 2008-07-17Voltage detection circuit and circuit for generating a trigger flag signal
#58 | 2008-07-17Design structure for a current control mechanism for power networks and dynamic logic keeper circuits
#59 | 2008-07-17Current control mechanism for dynamic logic keeper circuits in an integrated circuit and method of regulating same
#60 | 2008-06-26Programmable Locking Mechanism For Secure Applications In An Integrated Circuit
#61 | 2008-06-26Stress control mechanism for use in high-voltage applications in an integrated circuit
#62 | 2008-06-19Using electrically programmable fuses to hide architecture, prevent reverse engineering, and make a device inoperable
#63 | 2008-06-05Low Voltage Reference System
#64 | 2008-04-24Non volatile memory RAD-hard (NVM-rh) system
#65 | 2008-03-13Voltage controlled static random access memory
#66 | 2008-03-13Changing Chip Function Based on Fuse States
#67 | 2008-02-28Voltage controlled static random access memory
#68 | 2008-02-28Error correcting logic system
#69 | 2008-02-14Structure for power-efficient cache memory
#70 | 2008-01-03System and method for differential eFUSE sensing without reference fuses
#71 | 2007-12-04Performance optimizing compiler for building a compiled DRAM
#72 | 2007-10-18Programmable semiconductor device
#73 | 2007-10-18Changing chip function based on fuse states
#74 | 2007-10-04Apparatus for implementing dynamic data path with interlocked keeper and restore devices
#75 | 2007-05-31POWER-EFFICIENT CACHE MEMORY SYSTEM AND METHOD THEREFOR
#76 | 2007-05-31Electronically programmable antifuse and circuits made therewith
#77 | 2007-03-29Circuit and method for controlling a standby voltage level of a memory
#78 | 2007-02-15Voltage controlled static random access memory
#79 | 2006-12-28Method of forming a high impedance antifuse
#80 | 2006-08-29High impedance antifuse
#81 | 2006-08-03SRAM cell using tunnel current loading devices
#82 | 2006-08-03A VOLTAGE REFERENCE CIRCUIT FOR ULTRA-THIN OXIDE TECHNOLOGY AND LOW VOLTAGE APPLICATIONS
#83 | 2006-08-01ECC based system and method for repairing failed memory elements
#84 | 2006-06-22Utilizing fuses to store control parameters for external system components
#85 | 2006-06-22Using electrically programmable fuses to hide architecture, prevent reverse engineering, and make a device inoperable
#86 | 2006-06-22Changing chip function based on fuse states
#87 | 2006-05-04Integrated circuit amplifier device and method using FET tunneling gate current
#88 | 2006-02-02Error correcting logic system
#89 | 2006-01-24Method and system for maintaining uniform module junction temperature during burn-in
#90 | 2005-07-28Fuse latch with compensated programmable resistive trip point
#91 | 2005-07-12Digital to analog converter using tunneling current element
#92 | 2005-06-28Automatic timing analyzer
#93 | 2005-06-23Electronically programmable antifuse and circuits made therewith
#94 | 2005-06-09Method and circuit for compensating for tunneling current
#95 | 2005-05-26Leakage compensation circuit
#96 | 2005-04-12Method and apparatus for providing communication between electronic devices
#97 | 2005-04-07Voltage divider for integrated circuits
#98 | 2005-04-07Electronically programmable antifuse and circuits made therewith
#99 | 2005-01-20Detector for alpha particle or cosmic ray
#100 | 2005-01-13Method and circuit for precise timing of signals in an embedded DRAM array
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