Campbell, California
United States
36
2008-11-27
The entities that hold a legal rights for patent applications filed by inventor Cornell Michael E.:
Michael E. Cornell from Campbell, US has applied for patents for these inventions. The list has both pending applications and granted patents:
Method of fabricating trench-constrained isolation diffusion for semiconductor devices
#2 | 2008-11-27Trench-constrained isolation diffusion for integrated circuit die
#3 | 2008-05-29Modular bipolar-CMOS-DMOS analog integrated circuit and power transistor technology
#4 | 2008-05-22Modular bipolar-CMOS-DMOS analog integrated circuit and power transistor technology
#5 | 2008-03-13Modular bipolar-CMOS-DMOS analog integrated circuit and power transistor technology
#6 | 2008-03-13Modular bipolar-CMOS-DMOS analog integrated circuit and power transistor technology
#7 | 2008-03-13Modular bipolar-CMOS-DMOS analog integrated circuit and power transistor technology
#8 | 2008-01-31Modular bipolar-CMOS-DMOS analog integrated circuit and power transistor technology
#9 | 2007-11-29Modular CMOS analog integrated circuit and power technology
#10 | 2007-10-09Method of forming isolated pocket in a semiconductor substrate
#11 | 2007-04-10Modular bipolar-CMOS-DMOS analog integrated circuit and power transistor technology
#12 | 2006-11-02Recessed clamping diode fabrication in trench devices
#13 | 2006-10-05Method of fabricating isolated semiconductor devices in epi-less substrate
#14 | 2006-07-20Modular bipolar-CMOS-DMOS analog integrated circuit and power transistor technology
#15 | 2006-07-11Poly-sealed silicide trench gate
#16 | 2006-01-19Planarized and silicided trench contact
#17 | 2005-12-08Method of fabricating trench-constrained isolation diffusion for semiconductor devices
#18 | 2005-12-08Trench-constrained isolation diffusion for integrated circuit die
#19 | 2005-12-08Complementary analog bipolar transistors with trench-constrained isolation diffusion
#20 | 2005-11-29Planarized and silicided trench contact
#21 | 2005-09-15Manufacturing and testing of electrostatic discharge protection circuits
#22 | 2005-09-13Complementary analog bipolar transistors with trench-constrained isolation diffusion
#23 | 2005-09-08Testable electrostatic discharge protection circuits
#24 | 2005-07-21Method of fabricating isolated semiconductor devices in epi-less substrate
#25 | 2005-06-30Method of fabricating isolated semiconductor devices in epi-less substrate
#26 | 2005-06-30Method of fabricating isolated semiconductor devices in epi-less substrate
#27 | 2005-06-30Method of fabricating isolated semiconductor devices in epi-less substrate
#28 | 2005-06-14Testable electrostatic discharge protection circuits
#29 | 2005-05-31Isolated complementary MOS devices in epi-less substrate
#30 | 2005-03-01Trench power MOSFET with planarized gate bus
#31 | 2005-02-24Modular bipolar-CMOS-DMOS analog integrated circuit and power transistor technology
#32 | 2005-02-17Trench MOSFET with recessed clamping diode using graded doping
#33 | 2005-02-15Modular bipolar-CMOS-DMOS analog integrated circuit & power transistor technology
#34 | 2005-02-03Modular bipolar-CMOS-DMOS analog integrated circuit and power transistor technology
#35 | 2005-01-20Method of fabricating isolated semiconductor devices in epi-less substrate
#36 | 2005-01-20Methods of fabricating isolation structures in epi-less substrate
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