John Halbert

Memory refresh operation with page open

Row hammer monitoring based on stored row hammer threshold value

Stacked memory with interface providing offset interconnects

Row hammer refresh command

Stacked memory with interface providing offset interconnects

Common memory device for variable device width and scalable pre-fetch and page size

Common memory device for variable device width and scalable pre-fetch and page size

Systems, methods, and apparatuses to save memory self-refresh power

Memory transfer with early access to critical portion

Memory device with read data from different banks

Temperature determination and communication for multiple devices of a memory module

Memory having swizzled signal lines

Training sequence for deswizzling signals

Temperature determination and communication for multiple devices of a memory module

High speed DRAM cache architecture

High speed DRAM cache architecture

Techniques to map cache data to memory arrays

Memory module and memory component built-in self test