Temperature compensated bandgap voltage reference

Description

CROSS REFERENCE TO RELATED APPLICATIONS

This application is based on and claims priority of U.S. provisional patent application Ser. No. 60/441,063, filed Jan. 17, 2003, entitled TEMPERATURE COMPENSATED BANDGAP VOLTAGE REFERENCE, the entire disclosure of which is incorporated herein by reference.

BACKGROUND OF THE INVENTION

The present invention is directed to a temperature compensated bandgap voltage reference.

FIG. 1 shows how a reference voltage based upon V_be of a bipolar transistor can be obtained. The current source I is provided in the emitter path of a bipolar transistor. A plurality of current sources can be provided each coupled to an FET of varying size to provide current sources of different magnitude, e.g., I, 10I, etc. as shown.

V_be of a bipolar transistor decreases with increasing temperature in a well-known fashion. See FIG. 3. It is also known that a current mirror can be used to obtain a voltage representative of ΔV_be i.e., the difference between the V_be of two bipolar transistors. FIG. 2 shows such a current mirror circuit. ΔV_be is equal to V_be2 minus V_be1 and ΔV_be is equal to kt/q ln NI/I. ΔV_be depends upon the ratio of the currents of the current sources as well as the temperature. In particular, ΔV_be increases with temperature. See FIG. 3. By combining the two circuits, it is possible to compensate V_be of a first transistor with ΔV_be obtained via two other transistors Q1 and Q2, to obtain a substantially constant reference voltage Vref as shown in FIG. 3. In particular, Vref is equal to a constant A times V_be plus a constant B times ΔV_be.

SUMMARY OF THE INVENTION

The invention provides a new implementation of a V_be bandgap voltage reference that sums V_be and ΔV_be to obtain a substantially constant temperature independent voltage reference. The circuit uses a current mirror for ΔV_be and a bipolar transistor to provide V_be. A comparator is implemented as a differential amplifier and receives inputs proportional to V_be and ΔV_be. The output of the comparator is coupled back to the input of the bipolar transistor that provides V_be.

According to one aspect, the invention comprises a bandgap voltage reference circuit comprising a first circuit providing a first voltage representative of V_be of a first bipolar transistor, a second circuit providing a second voltage ΔV_be representative of the difference of two V_be voltages of two bipolar transistors; and a comparator having respective inputs which receive voltages representative of V_be and ΔV_be and an output coupled to the base of the first bipolar transistor whereby a voltage representative of the sum of respective constants multiplying V_be and ΔV_be is provided at the output of the comparator.

According to another aspect, the invention comprises a bandgap voltage reference circuit comprising a first bipolar transistor providing substantially a reference voltage V_be, a current mirror circuit comprising two bipolar transistors coupled in a current mirror arrangement for providing a voltage difference ΔV_be comprising substantially a difference signal between the respective V_be voltages of the two bipolar transistors; and a comparator having respective inputs which receive voltages representative of V_be and ΔV_be and an output coupled to the base of the first bipolar transistor whereby a voltage representative of the sum of respective constants multiplying V_be and ΔV_be is provided at the output of the comparator.

According to yet another aspect, the invention comprises a bandgap voltage reference circuit comprising a first circuit providing a first voltage representative of V_be of a first bipolar transistor, a second circuit providing a second voltage ΔV_be representative of the difference of two V_be voltages of two bipolar transistors, and a comparator having respective inputs which receive voltages representative of V_be and ΔV_be and an output coupled to the base of the first bipolar transistor whereby a substantially temperature independent voltage reference is provided at the output of the comparator.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 shows a prior art circuit for generating a reference voltage based on V_be of a bipolar transistor;

FIG. 2 shows a prior art circuit mirror circuit for generating a voltage proportional to ΔV_be;

FIG. 3 is a graph showing the relationship of V_be and ΔV_be and a reference voltage comprising weighted sums of V_be and ΔV_be;

FIG. 4 shows the reference voltage generating circuit according to the invention;

FIGS. 5A and 5B shows waveforms of the circuit of FIG. 4; and

FIG. 6 shows a schematic diagram of an implementation of the circuit of the invention.

DETAILED DESCRIPTION OF THE INVENTION

According to the invention, a new implementation for deriving the voltage bandgap reference Vref is provided. As shown in FIG. 4, a bipolar transistor Q1 provides V_be. The emitter of the bipolar transistor Q1 is coupled to a resistor divider comprising resistors R1 and R2. The output of the divider is provided to a comparator UI inverting input. The non-inverting input of the comparator UI is provided to the voltage source comprising ΔV_be, which may be generated by the circuit of FIG. 2. The output of the comparator is provided back to the input IN′. This results in the following equations:

IN -= ( IN ′ - V be ) ⁢ x ⁢ ⁢ R 2 R 1 + R 2 Δ ⁢ ⁢ V be = ( IN Δ ⁢ ⁢ V ⁢ ⁢ be ′ - V be ) ⁢ x ⁢ ⁢ R 2 R 1 + R 2
IN′=OUT
OUT=IN′_ΔVbe (from FIG. 5B)

IN Δ ⁢ ⁢ V ⁢ ⁢ be ′ = V be + R 1 + R 2 R 2 ⁢ Δ ⁢ ⁢ V be IN Δ ⁢ ⁢ V ⁢ ⁢ be ′ = OUT = V be + R 1 + R 2 R ( 1 ) 2 ⁢ Δ ⁢ ⁢ V be

The output of the comparator is shown in FIGS. 5A and 5B versus IN− and IN′, respectively. FIG. 5A shows the output versus IN− i.e., versus the input at the inverting input of the comparator. FIG. 5B shows the output versus IN′, i.e., versus the input to the transistor Q1 providing the V_be reference voltage. Since the output of the comparator is coupled to the input IN′, the output equals V_be+(R₁+R2)/R1 ΔV_be. Accordingly, the output voltage is a constant voltage equal to V_be plus a constant times ΔV_be. With the appropriate selection of resistors R1 and R2, the output can remain constant.

FIG. 6 shows a complete circuit implementation where a current mirror circuit has been substituted for ΔV_be in FIG. 4. In addition, the comparator has been implemented by FETs Q2, Q3 and Q4 serving as a differential amplifier. The inputs IN− and IN+ are provided respectively at the sources of transistors Q2 and Q3 and the output OUT=VREF is provided at the source of transistor Q4. ΔV_be is provided by the current mirror across the gates of the transistors Q2 and Q3. In FIG. 6, a voltage divider comprising resistors R3 and R4 is provided.

V out ′ = V out ⁡ ( R 3 + R 4 R 3 )

In this way, the circuit can generate a reference voltage Vout′ that is a multiple of Vout. This is important in applications where a 1.25 V reference voltage is too low.

Although the present invention has been described in relation to particular embodiments thereof, many other variations and modifications and other uses will become apparent to those skilled in the art. Therefore, the present invention should be limited not by the specific disclosure herein, but only by the appended claims.