Patent application title:

Gap count analysis for a high speed serialized bus

Publication number:

-

Publication date:
Application number:

10/749,791

Filed date:

2003-12-29

✅ Patent granted

Patent number:

US 7,308,517 B1

Grant date:

2007-12-11

PCT filing:

-

PCT publication:

-

Examiner:

Paul R. Myers | Brian Misiura

Adjusted expiration:

2024-07-11

Abstract:

A method of optimizing communication over a high-speed serial bus by minimizing the delay between packets transmitted over the bus is disclosed. The method comprises: calculating the round trip delay between PHYs connected on the bus by pinging; a bus manager sending a configuration packet to all PHYs connected on the bus, the configuration packet containing a minimum gap_count parameter value; and all PHYs connected on the bus sending packets over the bus using the minimum gap_count parameter value as a delay between packets.

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Classification:

G06F13/36 IPC

Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units; Handling requests for interconnection or transfer for access to common bus or bus system

H04L12/28 IPC

Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]

Description

FIELD OF THE INVENTION

The present invention relates broadly to serial bus performance. Specifically, the present invention relates to improving bus performance by calculating the optimal gap_count parameter for a given topology utilizing a high-speed serial bus to connect devices.

BACKGROUND OF THE INVENTION

The Institute of Electrical and Electronic Engineers (IEEE) has promulgated a number of versions of a high-speed serial bus protocol falling under the IEEE 1394 family of standards (referred to herein collectively as “1394”). A typical serial bus having a1394 architecture interconnects multiple node devices via point-to-point links, such as cables, each connecting a single node on the serial bus to another node on the serial bus. Data packets are propagated throughout the serial bus using a number of point-to-point transactions, such that a node that receives a packet from another node via a first point-to-point link retransmits the received packet via other point-to-point links. A tree network configuration and associated packet handling protocol ensures that each node receives every packet once. The 1394-compliant serial bus may be used as an alternate bus for the parallel backplane of a computer system, as a low cost peripheral bus, or as a bus bridge between architecturally compatible buses. Bus performance is gauged by throughput, or the amount of data that can be transmitted over the bus during a period of time.

There are several ways to improve bus performance. Devices connected to the bus can be arranged to minimize the longest round-trip delay between any two leaf nodes. This may involve either minimizing the number of cable connections between the farthest devices, reducing cable lengths, or both. Another way to improve bus performance is to group devices with identical speed capabilities next to one another. This avoids the creation of a “speed trap” when a slower device lies along the path between the two faster devices. Finally, bus performance can be improved by setting the PHY gap count parameter to the lowest workable value for a particular topology. However, determining this lowest workable value is problematic in that all of the variables affecting this value are unknown. Gap count parameters have been configured in the past using a subset of all possible variables, and the result is that the gap count is not optimal.

SUMMARY OF THE INVENTION

The present invention provides an optimal gap count that allows a high-speed serial bus to run faster and thus realize superior performance over prior buses. In an embodiment, bus management software sends a special PHY configuration packet that is recognized by all PHYs on the bus. The configuration packet contains a gap count value that all PHYs on the bus can use. As this gap count value decreases the time interval between packets that are transmitted, more real data can be transmitted over the bus per unit of time.

In an embodiment, the bus manager pings a PHY. The PHY sends a response to the ping, and a flight time value of the response from the PHY to the bus manager is added to calculate a round trip delay value. The ping command runs at the link layer level, from the link layer of one node to the link layer of another node. All flight time between link layer and PHY is ignored, and just the flight time from one PHY to another PHY is calculated. The ping time measured shows the link-to-link delay. The delay between the bus and the link is specified in the bus standard with minimum and maximum values. The PHY and link layer of a node is designed to be within that range specified by the standard. The round trip delay between nodes can be calculated as:

Round_Trip ⁢ _Delay max [ P X ⁢ O ⁢ ⁢ P Y ] ⁢ < _ ⁢ ( Round_Trip ⁢ _Delay Ping , max [ P BM ⁢ O ⁢ ⁢ P X ] + ∑ n ( BM , X ) ⁢ ⁢ 2 · Jitter n + Round_Trip ⁢ _Delay Ping , max [ P BM ⁢ O ⁢ ⁢ P Y ] + ∑ n ( BM , Y ) ⁢ ⁢ 2 · Jitter n + PHY_DELAY N , max P N ′ -> P N + ARB_RESPONSE ⁢ _DELAY N , max P N -> P N ′ ) - ( 2 · Round_Trip ⁢ _Delay Ping , min [ P BM ⁢ O ⁢ ⁢ P N ] + 4 · Jitter N + PHY_DELAY N , min P N BM -> P N ′ + ARB_RESPONSE ⁢ _DELAY N , min P N ′ -> P N BM + PHY_DELAY N , min P N BM -> P N + ARB_RESPONSE ⁢ _DELAY N , min P N -> P N BM )

This value can be communicated as the gap count parameter contained in the configuration packet, thus setting the gap between packets to an optimal value and increasing bus performance.

Many other features and advantages of the present application will become apparent from the following detailed description considered in conjunction with the accompanying drawings, in which:

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 illustrates an intervening path model between two nodes, X & Y, and denotes the reference points required for a full analysis;

FIG. 2 illustrates ack/iso gap preservation, in the case where PHY X originated the most recent packet and PHY Y is responding (either with an ack or the next isochronous arbitration/packet).

FIG. 3 illustrates the sequence PHY Y will follow in responding to a received packet.

FIG. 4 illustrates subaction gap preservation, in the case where PHY X originated the most recent packet and PHY Y is responding after a subaction gap with arbitration for the current fairness interval.

FIG. 5 illustrates consistent subaction gap detection, in the case where PHY X originates an isochronous packet, observes a subaction_gap, and begins to drive an arbitration indication.

FIG. 6 illustrates an internal gap detection sequence, by showing the timing reference for relating the external gap detection times to the internal gap detection times.

FIG. 7 illustrates consistent arbitration reset gap detection, in the case where PHY X originates an asynchronous packet, observes an arbitration reset gap, and begins to drive an arbitration indication.

FIG. 8 illustrates a ping subaction issued by the link in Node X and directed to Node Y.

FIG. 9 illustrates a Bus Manager Leaf to Leaf topology.

FIG. 10 illustrates a topology where the bus manager is not a leaf but is part of the connecting path between the two leaves.

FIG. 11 illustrates a topology where the bus manager is not a leaf but is not part of the connecting path between the two leaves.

DETAILED DESCRIPTION

Four well known limiting corner cases for gap count are examined in an effort to find the minimum allowable gap count for a given topology. Both the table method and pinging method of determining the optimal gap count are explored.

It is important to note that this analysis assumes that PHY_DELAY can never exceed the maximum published in the PHY register set. However, corner conditions have been identified in which it is theoretically possible to have PHY_DELAY temporarily exceed the maximum published delay when repeating minimally spaced packets. Although not a rigorous proof, this phenomena is ignored for this analysis on the basis that it is presumed to be statistically insignificant.

The path between any two given PHYs can be represented as a daisy chain connection of the two devices with zero or more intervening, or repeating, PHYs. FIG. 1 illustrates such a path between two nodes, X & Y, and denotes the reference points required for a full analysis.

TABLE 1
Variable Definitions
ARB_RE- Delay in propagating arbitration indication
SPONSE_DE- received from port Pn of PHY n to port
LAYnPn→P′n P′n of PHY n.
BASERATEn Fundamental operating frequency of PHY n.
cable_delayn One-way flight time of arbitration and data
signals through cablen. The flight-time is
assumed to be constant from one transmission
to the next and symmetric.
DATA_END_TIMEnPn Length of DATA_END transmitted on port
Pn of PHY n.
PHY_DELAYnP′n→Pn Time from receipt of first data bit at port P′n of
PHY n to re-transmission of same bit at port
Pn of PHY n.
RESPONSE_TIME PnP′n Idle time at port P′n of PHY n between the
reception of a inbound packet and the
associated outbound arbitration indication
for the subsequent packet intended to occur
within the same isochronous interval or
asynchronous subaction.

For any given topology, the gap count must be set such that an iso or ack gap observed/generated at one PHY isn't falsely interpreted as a subaction gap by another PHY in the network. Ack/Iso gaps are known to be at their largest nearest the PHY that originated the last packet. To ensure that the most recent originating PHY doesn't interrupt a subaction or isochronous interval with asynchronous arbitration, its subaction_gap timeout must be greater than the largest IDLE which can legally occur within a subaction or isochronous interval. FIG. 2 illustrates the case in which PHY X originated the most recent packet and PHY Y is responding (either with an ack or the next isochronous arbitration/packet).

For all topologies, the idle time observed at point Px must not exceed the subaction gap detection time:

Idle max P X < subaction_gap min P X ( 1 )

The idle time at point Px can be determined by examining the sequence of time events in the network. All timing events are referenced to the external bus (as opposed to some internal point in the PHY).

t0 First bit of packet sent at point PX
t1 Last bit of packet sent at point Px, DATA_END begins. t1 follows t0
by the length of the packet timed in PHY X's clock domain.
t2 DATA_END concludes at point PX, IDLE begins. t2 follows t1 by
DATA_END_TIMEXPX
t3 First bit of packet received at point P′Y. t3 follows tO by all
intervening cable_delay and PHY_DELAY instances.
t4 Last bit of packet received at point P′Y. t4 follows t3 by the length of
the packet timed in PHY Y-1's clock domain.
t5 DATA_END concludes at point P′Y, gap begins. t5 follows t4 by
DATA_END_TIMEY−1PY−1
t6 PHY Y responds with ack packet, isoch packet, or isoch arbitration
within RESPONSE_TIMEYPY following t5
t7 Arbitration indication arrives at point PX. t7 follows t6 by the all
intervening cable_delay and ARB_RESPONSE_DELAY instances.

    t 1 = t 0 + packet_length packet_speed · BASERATE X ( 2 ) t 2 = t 1 + DATA_END ⁢ _TIME X P X = t 0 + packet_length packet_speed · BASERATE X + DATA_END ⁢ _TIME X Px ( 3 ) t 3 = t 0 + cable_delay x + ∑ n = X + 1 Y - 1 ⁢ ( cable_delay n + PHY_DELAY n P n ′ → P n ( 4 ) t 4 = t 3 + packet_length packet_speed · BASERATE Y - 1 = t 0 + cable_delay X + ∑ n = X + 1 Y - 1 ⁢ ( cable_delay n + PHY_DELAY n P n ′ → P n ) + packet_lenght packet_speed · BASERATE Y - 1 ( 5 ) t 5 = t 4 + DATA_END ⁢ _TIME Y - 1 P y - 1 = t 0 + cable_delay X + ∑ n = X + 1 Y - 1 ⁢ ( cable_delay n + PHY_DELAY n P n ′ → P n ) + packet_length packet_speed · BASERATE Y - 1 + DATA_END ⁢ _TIME Y - 1 P y - 1 ( 6 ) t 6 = t 5 + RESPONSE_TIME Y P Y ′ = t 0 + cable_delay X + ∑ n = X + 1 Y - 1 ⁢ ( cable_delay n + PHY_DELAY n P n ′ → P n ) + packet_length packet_speed · BASERATE Y - 1 + DATA_END ⁢ _TIME Y - 1 P y - 1 + RESPONSE_TIME Y P Y ′ ( 7 ) t 7 = t 6 + ∑ n = X + 1 Y - 1 ⁢ ( cable_delay n + ARB_RESPONSE ⁢ _DELAY n P n ′ → P n ) + cable_delay X = t 0 ⁢ ∑ n = X + 1 Y - 1 ⁢ ( 2 · cable_delay n + PHY_DELAY n P n ′ → P n + ARB_RESPONSE ⁢ _DELAY n P n ′ → P n ) + 2 · cable_delay X + packet_length packet_speed · BASERATE Y - 1 + DATA_END ⁢ _TIME Y - 1 P y - 1 + RESPONSE_TIME Y P Y ′ ( 8 )
Given t0 through t7 above, the Idle time seen at point Px is given as:

  Idle P x = t 7 - t 2 = ∑ n = X + 1 Y - 1 ⁢ ( 2 · cable_delay n + ⁢ PHY_DELAY n P n ′ → P n + ARB_RESPONSE ⁢ _ ⁢ ⁢ DELAY n P n → P ′ n ) + ⁢ ⁢ 2 · cable_delay X + RESPONSE_TIME y P Y ′ + ⁢ DATA_END ⁢ _TIME Y - 1 P y - 1 - DATA_END ⁢ _TIME X P x + packet_length packet_speed · ( 1 BASERATE Y - 1 - 1 BASERATE X ) ( 9 ) Let ⁢ : DE_delta [ P y - 1 , P x ] = DATA_END ⁢ _TIME Y - 1 P y - 1 - DATA_END ⁢ _TIME X P x ( 10 ) PPM_delta [ Y - 1 , X ] = packet_length packet_speed · ( 1 BASERATE Y - 1 - 1 BASERATE X ) ( 11 ) Round_Trip ⁢ _Delay [ P X ⁢ OP Y ] = ∑ n = X + 1 Y - 1 ⁢ ( 2 · cable_delay n + PHY_DELAY n P n ′ → P n + ARB_RESPONSE ⁢ _DELAY n P n → P ′ n ) ⁢ 2 · cable_delay X ( 12 ) Then , Idle P x = Round_Trip ⁢ _Delay [ P X ⁢ OP Y ] + RESPONSE_TIME Y P Y ′ + DE_delta [ P y - 1 , P x ] + PPM_delta [ Y - 1 , X ] ( 13 )
Substituting into Equation (1), Ack and Iso gaps are preserved network-wide if and only if:

[ Round_Trip ⁢ _Delay [ P X ⁢ OP Y ] + RESPONSE_TIME Y P Y ′ + DE_delta [ P y - 1 , P x ] + PPM_delta [ Y - 1 , X ] ] max < subaction_gap min P x ( 14 )

The minimum subaction_gap at point Px isn't well known. IEEE1394-1995, in Table 4-33, defines the minimum subaction_gap timeout used at a PHY's internal state machines, not at the external interface. It has been argued that the internal and external representations of time may differ by as much as ARB_RESPONSE_DELAY when a PHY is counting elapsed time between an internally generated event and an externally received event. However, the ARB_RESPONSE_DELAY value for a particular PHY isn't generally known externally. Fortunately, the ARB_RESPONSE_DELAY value for a PHY whose FIFO is known to be empty is bounded by the worst case PHY_DELAY reported within the PHY register map. This suggests a realistic bound for the minimum subaction_gap referenced at point Px:

subaction_gap min P X ≥ subaction_gap min i x - PHY_DELAY X , max P x ( 15 )
where

subaction_gap min i x = 27 + gap_count · 16 BASERATE X , max ( 16 )
Combing Equations (14), (15), and (16):

[ Round_Trip ⁢ _Delay [ P X ⁢ OP Y ] + RESPONSE_TIME Y P Y ′ + DE_delta [ P y - 1 , P x ] + PPM_delta [ Y - 1 , X ] ] max < [ ⁢ 27 + gap_count · 16 BASERATE X , max - PHY_DELAY X , max P x ] ( 17 )
Solving for gap_count:

gap_count > BASERATE X , max · [ Round_Trip ⁢ _Delay max [ P x ⁢ OP y ] + [ RESPONSE_TIME Y P Y ′ + DE_delta [ P y - 1 , P x ] + PPM_delta [ Y - 1 , X ] ] max + PHY_DELAY X , max P x ] - 27 16 ( 18 )

Since RESPONSE_TIME, DE_delta, and PPM_delta are not independent parameters, the maximum of their sum is not accurately represented by the sum of their maximas. Finding a more accurate maximum for the combined quantity requires the identification of components of RESPONSE_TIME.

As specified in p1394a, RESPONSE_TIME includes the time a responding node takes to repeat the received packet and then drive a subsequent arbitration indication. (Note that by examination of the C code, RESPONSE_TIME is defined to include the time it takes to repeat a packet even if the PHY in question is a leaf node.) FIG. 3 illustrates the sequence PHY Y will follow in responding to a received packet. iY denotes the timings as seen/interpreted by the PHY state machine. Note that PY can be any repeating port on PHY Y. Consequently, the timing constraints referenced to PY in the following analysis must hold worst case for any and all repeating ports.

Beginning with the first arrival of data at P′Y (t3), the elaborated timing sequence for RESPONSE_TIME is:

t3 First bit of packet received at point P′Y
t3 First bit of packet repeated at point PY. t3′ lags t3 by PHY_DELAY
t4 Last bit of packet received at point P′Y. t4 follows t3 by the length of
the packet timed in PHY N's clock domain. DATA_END begins
t4 Last bit of packet repeated at point PY. t4′ lags t3′ by the length of the
packet timed in PHY Y's clock domain. The PHY begins “repeating”
DATA_END
t5 DATA_END concludes at point P′Y. t5 follows t4 by
DATA_END_TIMEY−1PY−1
t5a stop_tx_packet( ) concludes at point iY and the state machines
command the PHY ports to stop repeating DATA_END. t5a leads t5
by any transceiver delay.
t5 DATA_END concludes at point PY. t5′ follows t4′ by
DATA_END_TIMEYPY
t5b start_tx_packet( ) commences at point iY and the state machines
command the PHY ports to begin driving the first arbitration
indication of any response. t5b lags t5a by an IDLE_GAP and an
unspecified state machine delay herein called SM_DELAY.
t6 PHY Y drives arbitration at points P′Y. t6 follows t5b by any
transceiver delay.

  t 3 ′ = t 3 + PHY_DELAY Y P Y ′ → P Y ( 19 ) t 4 ′ = t 3 ′ + packet_length packet_speed · BASERATE Y = t 3 + PHY_DELAY Y P Y ′ → P Y + packet_length packet_speed · BASERATE Y ( 20 ) t 5 ′ = t 4 ′ + DATA_END ⁢ _TIME Y P Y = t 3 + PHY_DELAY Y P Y ′ → P Y + packet_length packet_speed · BASERATE Y + DATA_END ⁢ _TIME Y P Y ( 21 ) t 5 ⁢ a = t 5 ′ - transceiver_delay Y P Y = t 3 + PHY_DELAY Y P Y ′ → P Y + packet_length packet_speed · BASERATE Y + DATA_END ⁢ _TIME Y P Y - transceiver_delay Y P Y ( 22 ) t 5 ⁢ b = t 5 ⁢ a + IDLE_GAP Y + SM_DELAY Y = t 3 + PHY_DELAY Y P Y ′ → P Y + packet_length packet_speed · BASERATE Y + DATA_END ⁢ _TIME Y P Y + IDLE_GAP Y + SM_DELAY Y - transceiver_delay Y P Y ( 23 ) t 6 = t 5 ⁢ b + transceiver_delay Y P Y = t 3 + PHY_DELAY Y P Y ′ → P Y + packet_length packet_speed · BASERATE Y + DATA_END ⁢ _TIME Y P Y + IDLE_GAP Y + SM_DELAY Y + transceiver_delay Y P Y - transceiver_delay Y P Y ( 24 )
By definition,

RESPONSE_TIME Y P Y ′ = t 6 - t 5 ( 25 )
and through substitution:

RESPONSE_TIME Y P Y ′ = PHY_DELAY Y P Y ′ → P Y + DE_delta [ P y , P y - 1 ] + PPM_delta [ Y , Y ] + IDLE_GAP Y + SM_DELAY Y + transceiver_delay Y P Y - transceiver_delay Y P Y ( 26 )
As such, the combination of RESPONSE_TIME, DE_delta, and PPM_delta from equation (18) can be represented as:

[ RESPONSE_TIME Y P Y ′ + DE_delta [ P y - 1 , P x ] + PPM_delta [ Y - 1 , X ] ] = [ ⁢ PHY_DELAY Y P Y ′ → P Y + DE_delta [ P y , P y - 1 ] + PPM_delta [ Y , Y - 1 ] + IDLE_GAP Y + SM_DELAY Y + transceiver_delay Y P Y - transceiver_delay Y P Y + DE_delta [ P y - 1 , P x ] + PPM_delta [ Y - 1 , X ] ] [ PHY_DELAY Y P Y ′ → P Y + DE_delta [ P y , , P x ] + PPM_delta [ Y , X ] + IDLE_GAP Y + SM_DELAY Y + transceiver_delay Y P Y - transceiver_delay Y P Y ] = ( 27 )
Noting that if PHYs X and Y−1 both adhere to the same minimum timing requirement for DATA_END_TIME and maximum timing requirement for BASE_RATE, then

  DE_delta max [ P Y , , P X ] = DE_delta [ P Y , , P Y - 1 ] PPM_delta max [ Y , X ] = PPM_delta max [ Y , Y - 1 ] ( 28 )
The combined maximum can be rewritten as:

[ RESPONSE_TIME Y P Y ′ + DE_delta [ P Y - 1 , P X ] + PPM_delta [ Y - 1 , X ] ] max = ⁢ [ ⁢ PHY_DELAY Y , max P Y ′ → P Y + DE_delta max [ P Y , , P Y - 1 ] + PPM_delta [ Y , Y - 1 ] + IDLE_GAP Y , max + SM_DELAY Y , max + transceiver_delay Y , max P Y - transceiver_delay Y , min P Y ] ( 29 )
Comparing to equation (26) allows

[ RESPONSE - ⁢ TIME Y P Y ′ + DE_delta [ P Y - 1 , ⁢ P X ] + PPM_delta [ Y - 1 , X ] ] max ⁢ = RESPONSE_TIME Y , max P Y ′ ( 30 )
Finally:

gap_count > BASERATE X , max · [ Round_Trip ⁢ _Delay max [ P X ⁢ O ⁢ ⁢ P Y ] + RESPONSE_TIME Y , max P Y ′ + PHY_DELAY X , max P X ] - 27 16 ( 31 )

For any given topology, the gap count must be set such that subaction gaps observed/generated at one PHY aren't falsely interpreted as arb_reset gaps by another PHY in the network. Subaction gaps are known to be at their largest nearest the PHY that originated the last packet. To ensure that the most recent originating PHY doesn't begin a new fairness interval before all PHYs exit the current one, its arb_reset_gap timeout must be greater than the largest subaction_gap which can legally occur. FIG. 4 illustrates the case in which PHY X originated the most recent packet and PHY Y is responding after a subaction gap with arbitration for the current fairness interval.

For all topologies, the idle time observed at point Px must not exceed the arbitration reset gap detection time:

Idle max P X < arb_reset ⁢ _gap min P X ( 32 )

The analysis is identical to the case in which Ack and Iso gaps are preserved with the exception that PHY Y takes longer to respond to the trailing edge of DATA_END. Let PHY Y have a response time of subaction_response_time. Then,

Idle P X ⁢ = Round_Trip ⁢ _Delay [ P X ⁢ O ⁢ ⁢ P Y ] + subaction_response ⁢ _time Y P Y ′ + DE_delta [ P Y - 1 , ⁢ P X ] + PPM_delta [ Y - 1 , X ] ( 33 )

Substituting into Equation (32), subaction gaps are preserved network-wide if and only if:

[ Round_Trip ⁢ _Delay [ P X ⁢ O ⁢ ⁢ P Y ] + subaction_response ⁢ _time Y P Y ′ + DE_delta [ P Y - 1 , ⁢ P X ] + PPM_delta [ Y - 1 , X ] ] max < arb_reset ⁢ _gap min P X ( 34 )

The minimum arb_reset_gap at point Px isn't well known. IEEE1394-1995, in Table 4-33, defines the minimum arb_reset_gap timeout used at a PHY's internal state machines, not at the external interface. It has been argued that the internal and external representations of time may differ by as much as ARB_RESPONSE_DELAY when a PHY is counting elapsed time between an internally generated event and an externally received event. However, the ARB_RESPONSE_DELAY value for a particular PHY isn't generally known externally. Fortunately, the ARB_RESPONSE_DELAY value for a PHY whose FIFO is known to be empty is bounded by the worst case PHY_DELAY reported within the PHY register map. This suggests a realistic bound for the minimum subaction_gap referenced at point Px:

arb_reset ⁢ _gap min P x ≥ arb_reset ⁢ _gap min i x - PHY_DELAY X , max P x ⁢ ( 35 )
where

arb_reset ⁢ _gap min i x = 51 + gap_count · 32 BASERATE X , max ( 36 )

The maximum subaction_response_time for PHY Y parallels the earlier dissection of RESPONSE_TIME. The timing sequence for subaction_response_time is identical to that of RESPONSE_TIME except that PHY Y, after concluding stop_tx_Packet( ), must wait to detect a subaction gap and then wait an additional arb_delay before calling start_tx_packet( ). Said differently, the idle period timed internally is a subaction gap plus arb_delay rather than an IDLE_GAP. Consequently, t5b becomes:
t5b=t5a+subaction_gapir+arb_delayir+SM_DELAYY  (37)
and

subaction_response ⁢ _time Y P Y ′ = RESPONSE_TIME Y P Y ′ - IDLE_GAP Y + subaction_gap i Y + arb_delay i Y ( 38 )
Substituting into Equation (34),

[ Round_Trip ⁢ _Delay [ P X ⁢ O ⁢ ⁢ P Y ] + RESPONSE_TIME Y P Y ′ + DE_delta [ P Y - 1 , P X ] + PPM_delta [ Y - 1 , X ] + subaction_gap i Y + arb_delay i Y - IDLE_GAP Y ] max < arb_reset ⁢ _gap min P x ( 39 )

Again, RESPONSE_TIME, DE_delta, and PPM_delta are not independent parameters. As shown previously, if PHYs X and Y−1 adhere to the same timing constant limits, the explicit DE_Delta and PPM_delta terms can be subsumed within RESPONSE_TIME giving:

[ Round_Trip ⁢ _Delay max [ P X ⁢ O ⁢ ⁢ P Y ] + RESPONSE_TIME Y , max P Y ′ + subaction_gap max i Y + arb_delay max i Y - MIN_IDLE ⁢ _TIME Y ] < arb_reset ⁢ _gap min P x ( 40 )
where

subaction_gap max i Y = 29 + gap_count · 16 BASERATE Y , min ( 41 ) arb_delay max i Y = gap_count · 4 BASERATE Y , min ( 42 )
and
IDLE_GAPY,min=MIN_IDLE_TIMEY  (43)
Combining Equations (35), (36), (40), (41), and (42):

[ Round_Trip ⁢ _Delay max [ P X ⁢ O ⁢ ⁢ P Y ] + RESPONSE_TIME Y , max P Y ′ - MIN_IDLE ⁢ _TIME Y + 29 + gap_count · 20 BASERATE Y , min ] < [ ⁢ 51 + gap_count · 32 BASERATE X , max - PHY_DELAY X , max P x ] ( 44 )
Solving for gap_count:

gap_count > BASERATE X , max · [ Round_Trip ⁢ _Delay max [ P X ⁢ O ⁢ ⁢ P Y ] + RESPONSE_TIME Y , max P Y ′ - MIN_IDLE ⁢ _TIME y + PHY_DELAY X , max P X ] + 29 · BASERATE X , max BASERATE Y , min - 51 32 - 20 · BASERATE X , max BASERATE Y , min ( 45 )

For any given topology, the gap count must be set such that if a subaction gap is observed following an isochronous packet at one PHY, it is observed at all PHYs. The danger occurs when a subsequent arbitration indication is transmitted in the same direction as the previous data packet. Given that arbitration indications may propagate through intervening PHYs faster than data bits, gaps may be shortened as they are repeated. FIG. 5 illustrates the case in which PHY X originates an isochronous packet, observes a subaction_gap, and begins to drive an arbitration indication.

For all topologies, the minimum idle time observed at point P′Y must always exceed the maximum subaction gap detection time:

Idle min P Y ′ > subaction_gap max P Y ′ ( 46 )

The time events t0 through t5 are identical to the previous analyses. In this scenario, t6 follows t2 by the time it takes PHY X to time subaction_gap and arb_delay:

t 6 = ⁢ t 2 + subaction_gap P x + arb_delay P x = ⁢ t 0 + packet_length packet_speed · BASERATE X + DATA_END ⁢ _TIME X P X + ⁢ subaction_gap P x + arb_delay P x ( 47 )

The 1995 specification provides the timeouts used internally by the state machine. The externally observed timing requirements could differ (given possible mismatches in transceiver delay and state machines between the leading edge of IDLE and the leading edge of the subsequent arbitration indication). However, previous works have suggested any such delays could and should be well matched and that the external timing would follow the internal timing exactly. Consequently,
subaction_gapPx+arb_delayPx=subaction_gapix+arb_delayix  (48)
T7 follows T6 by the time it takes the arbitration signal to propagate through the intervening PHYs and cables:

t 7 = ⁢ t 6 + ∑ n = X + 1 Y - 1 ⁢ ( cable_delay n + ARB_RESPONSE ⁢ _DELAY n P n ′ -> P n ) + ⁢ cable_delay X = ⁢ t 0 + packet_length packet_speed · BASERATE X + DATA_END ⁢ _TIME X P X + ⁢ subtract_gap i x + arb_delay i x + ⁢ ∑ n = X + 1 Y - 1 ⁢ ( cable_delay n + ARB_RESPONSE ⁢ _DELAY n P n ′ -> P n ) + ⁢ cable_delay X ( 49 )
Given t0 through t7 above, the Idle time seen at point P′Y is given as:

  Idle P y ′ = t 7 - t 5 = subaction_gap i x + arb_delay i x - ∑ n = X + 1 Y - 1 ⁢ ( PHY_DELAY n P n ′ → P n - ARB_RESPONSE ⁢ _DELAY n P n ′ → P n ) - DE_delta [ P Y - 1 , P X ] - PPM_delta [ Y - 1 , X ] ( 50 ) Let Data_Arb ⁢ _Mismatch [ P X → R Y ] = ∑ n = X + 1 Y - 1 ⁢ ( PHY_DELAY n P n ′ → P n - ARB_RESPONSE ⁢ _DELAY n P n ′ → P n ) ( 51 ) Then , Idle P y ′ = t 7 - t 5 = subaction_gap i x + arb_delay i x - Data_Arb ⁢ _Mismatch [ P X → R Y ] - DE_delta [ P Y - 1 , P X ] - PPM_delta [ Y - 1 , X ] ( 52 )

For the maximum subaction_gap detection time at point P′Y, the 1995 standard again only specifies the internal state machine timeout values. FIG. 6 provides the timing reference for relating the external gap detection times to the internal ones. The elaborated timing sequence is identical to the case for RESPONSE_TIME through point t5′. The remaining sequence is:

T7 The arbitration indication launched by PHY X arrives at point P′Y
T7a The arbitration indication launched by PHY X arrives at point iY. t7a
lags t7 by an unspecified arbitration detection time, herein termed
ARB_DETECTION_TIME

The externally seen gap at point P′Y is given as
gapP′Y=t7−t5  (53)
The corresponding internal gap at point iY is
gapiy=t7a−t5a  (54)
Given that

t7a = t7 + ARB_DETECTION_TIMEYP′Y

the external gap can be expressed as

  gap P Y ′ = ⁢ t 7 - t 5 = ⁢ t 7 ⁢ a - t 5 - ARB_DETECTION ⁢ _TIME Y P Y ′ = ⁢ t 7 ⁢ a - t 5 ⁢ a + t 5 ⁢ a - t 5 - ARB_DETECTION ⁢ _TIME Y P Y ′ = ⁢ gap i Y + t 5 ⁢ a - t 5 - ARB_DETECTION ⁢ _TIME Y P Y ′ = ⁢ gap i Y + PHY_DELAY n P n ′ → P n + DE_delta [ P Y , P Y - 1 ] + ⁢ PPM_delta [ Y , Y - 1 ] - transceiver_delay Y P Y - ⁢ ARB_DETECTION ⁢ _TIME Y P Y ′ ( 56 )
Consequently,

  subaction_gap P Y ′ = subaction_gap i Y + PHY_DELAY Y P Y ′ → P Y + DE_delta [ P Y , P Y - 1 ] + PPM_delta [ Y , Y - 1 ] - transceiver_delay Y P Y - ARB_DETECTION ⁢ _TIME Y P Y ′ ( 57 )
Substituting (52) and (57) into (46) yields

  [ subaction_gap i x + arb_delay i x - Data_Arb ⁢ _Mismatch [ P x → P Y ] - DE_delta [ P Y - 1 , P X ] - PPM_delta [ Y - 1 , X ] ] > ⁢ [ subaction_gap i x + PHY_DELAY Y P Y ′ → P Y + DE_delta [ P Y , P Y - 1 ] + PPM_delta [ Y - 1 , X ] - transceiver_delay Y P Y - ARB_DETECTION ⁢ _TIME Y P Y ′ ] ( 58 )
The inequality holds generally if

  [ subaction_gap i x + arb_delay i x ] min > ⁢ [ subaction_gap i x + PHY_DELAY Y P Y ′ → P Y + DE_delta [ P Y , P Y - 1 ] + PPM_delta [ Y - 1 , X ] + DE_delta [ P Y - 1 , P X ] - PPM_delta [ Y - 1 , X ] + Data_Arb ⁢ _Mismatch [ P x → P Y ] - transceiver_delay Y P Y - ARB_DETECTION ⁢ _TIME Y P Y ′ ] max ( 59 )
Combining the DE_Delta and PPM_delta terms gives:

  [ subaction_gap i x + arb_delay i x ] min > ⁢ [ subaction_gap i x + PHY_DELAY Y P Y ′ → P Y + DE_delta [ P Y , P X ] + PPM_delta [ Y , X ] + Data_Arb ⁢ _Mismatch [ P x → P Y ] - transceiver_delay Y P Y - ARB_DETECTION ⁢ _TIME Y P Y ′ ] max ( 60 )
By assuming
DE_delta[PY,PX]+PPM_delta[Y,X]≦transceiver_delayYPY+ARB_DETECTION_TIMEYP′Y  (61)
the constraining inequality can be further simplified to give

  [ subaction_gap i x + arb_delay i x ] min > ⁢ [ subaction_gap i x + PHY_DELAY Y , max P Y ′ → P Y + Data_Arb ⁢ _Mismatch max [ P x → P Y ] ] ( 62 )
where

  subaction_gap min i x = 27 + gap_count · 16 BASERATE X , max ( 63 ) arb_delay min i x = gap_count · 4 BASERATE X , man ( 64 ) and subaction_gap max i y = 29 + gap_count · 16 BASERATE Y , min ( 65 )
Solving for gap count,

gap_count > BASERATE X , max · [ PHY_DELAY Y , max P Y ′ → P Y + Data_Arb ⁢ _Mismatch max [ P x → P Y ] ] + 29 · BASERATE X , max BASERATE Y , min - 27 20 - 16 · BASERATE X , max BASERATE Y , min ( 66 )

For any given topology, the gap count must be set such that if an arbitration reset gap is observed following an asynchronous packet at one PHY, it is observed at all PHYs. The danger occurs when a subsequent arbitration indication is transmitted in the same direction as the previous data packet. Given that arbitration indications may propagate through intervening PHYs faster than data bits, gaps may be shortened as they are repeated. FIG. 7 illustrates the case in which PHY X originates an asynchronous packet, observes an arbitration reset gap, and begins to drive an arbitration indication.

For all topologies, the minimum idle time observed at point P′Y must always exceed the maximum arbitration reset gap detection time:

Idle min P Y ′ > arb_reset ⁢ _gap max P Y ′ ⁢ ⁢ ( 67 )

The time events t0 through t5 are identical to the previous analyses. In this scenario, t6 follows t2 by the time it takes PHY X to time arb_reset_gap and arb_delay:

t 6 = t 2 + arb_reset - gap P X + arb_delay P X = t 0 + packet_length packet_speed · BASERATE X + DATA_END ⁢ _TIME X P x + arb_reset ⁢ _gap P X + arb_delay P X ( 68 )

The 1995 IEEE 1394 standard provides the timeouts used internally by the state machine. The externally observed timing requirements could differ (given possible mismatches in transceiver delay and state machines between the leading edge of IDLE and the leading edge of the subsequent arbitration indication). However, previous works have suggested any such delays could and should be well matched and that the external timing would follow the internal timing exactly. Consequently,
arb_reset_gapPx+arb_delayPx=arb_reset_gapix+arb_delayix  (69)

T7 follows T6 by the time it takes the arbitration signal to propagate through the intervening PHYs and cables:

  t 7 = ⁢ t 6 + ∑ n = X + 1 Y - 1 ⁢ ( cable_delay n + ARB_RESPONSE ⁢ _DELAY n P n ′ → P n ) + ⁢ cable_delay - X = ⁢ t 0 + packet_length packet_speed · BASEREAT X + DATA_END ⁢ _TIME X P x + ⁢ arb_reset ⁢ _gap i X + arb_delay i X + ⁢ ∑ n = X + 1 Y - 1 ⁢ ( cable_delay n + ARB_RESPONSE ⁢ _DELAY n P n ′ → P n ) + ⁢ cable_delay - X ( 70 )

Given t0 through t7 above, the Idle time seen at point P′Y is given as:

Idle P Y ′ = t 7 - t 5 = arb_reset ⁢ _gap i X + arb_delay i X - Data_Arb ⁢ _Mismatch [ P x → P Y ] - DE_delta [ P Y - 1 , P X ] - PPM_delta [ Y - 1 , X ] ( 71 )

For the maximum arbitration_reset_gap detection time at point P′Y, equation (56) gives:

arb_reset ⁢ _gap P Y ′ = arb_reset ⁢ _gap i Y + PHY_DELAY Y P Y ′ → P Y + DE_delta [ P Y , P Y - 1 ] + PPM_delta [ Y - 1 , X ] - transceiver_delay Y P Y - ARB_DETECTION ⁢ _TIME Y P Y ′ ( 72 )

Substituting (71) and (72) into (67) yields

  [ arb_reset ⁢ _gap i X + arb_delay i x - Data_Arb ⁢ _Mismatch [ P x → P Y ] - DE_delta [ P Y - 1 , P X ] - PPM_delta [ Y - 1 , X ] ] > ⁢ [ arb_reset ⁢ _gap i Y + PHY_DELAY Y P Y ′ → P Y + DE_delta [ P Y , P Y - 1 ] + PPM_delta [ Y - 1 , X ] - transceiver_delay Y P Y - ARB_DETECTION ⁢ _TIME Y P Y ′ ] ( 73 )

The inequality holds generally if

  [ arb_reset ⁢ _gap i X + arb_delay i x ] min > ⁢ [ arb_reset ⁢ _gap i Y + PHY_DELAY Y P Y ′ → P Y + DE_delta [ P Y , P Y - 1 ] + PPM_delta [ Y , Y - 1 ] + DE_delta [ P Y - 1 , P X ] + PPM_delta [ Y - 1 , X ] + Data_Arb ⁢ _Mismatch [ P x → P Y ] - transceiver_delay Y P Y - ARB_DETECTION ⁢ _TIME Y P Y ′ ] max ( 74 )

Combining the DE_Delta and PPM_delta terms gives:

⁢ [ arb_reset ⁢ _gap i x + arb_delay i x ] min >   [ arb_reset ⁢ _gap i Y + PHY_DELAY Y P ′ Y -> P Y + DE_delta [ P Y , P X ] + PPM_delta [ Y , X ] + Data_Arb ⁢ _Mismatch [ P X -> P Y ] - transceiver_delay Y P Y - ARB_DETECTION ⁢ _TIME Y P ′ Y ] max ( 75 )
By requiring
DE_delta[PY,PX]+PPM_delta[Y,X]≦transceiver_delayYPY+ARB_DETECTION_TIMEYP′YY  (76)

the constraining inequality can be further simplified to give

⁢ [ arb_reset ⁢ _gap min i x + arb_delay min i x ] >   [ arb_reset ⁢ _gap max i Y + PHY_DELAY Y , max P Y ′ -> P Y + Data_Arb ⁢ _Mismatch max [ P X -> P Y ] ] ( 77 )
where

arb_reset ⁢ _gap min i x = 51 + gap_count · 32 BASERATE X , max ( 78 ) arb_delay min i x = gap_count · 4 BASERATE X , max ⁢ ⁢ and ( 79 ) arb_reset ⁢ _gap max i Y = 53 + gap_count · 32 BASERATE Y , min ( 80 )

Solving for gap count,

gap_count > BASERATE X , max · [ PHY_DELAY Y , max P ′ Y -> P Y + Data_Arb ⁢ _Mismatch max [ P X -> P Y ] ] + 53 · BASERATE X , max BASERATE Y , min - 51 36 - 32 · BASERATE X , max BASERATE Y , min ( 81 )

Equations (31), (45), (66) and (81) place a lower bound on gap count. Let:

gap_count A = BASERATE X , max · [ Round_Trip ⁢ _Delay max [ P X ⁢ O ⁢ ⁢ P Y ] + RESPONSE_TIME Y , max P Y ′ + PHY_DELAY X , max P X ] - 27 16 ( 82 ) gap_count B = BASERATE X , max · [ Round_Trip ⁢ _Delay max [ P X ⁢ O ⁢ ⁢ P Y ] + RESPONSE_TIME Y , max P Y ′ - MIN_IDLE ⁢ _TIME Y + PHY_DELAY X , max P X ] + 29 · BASERATE X , max BASERATE Y , min - 51 32 - 20 · BASERATE X , max BASERATE Y , min ( 83 ) gap_count C = BASERATE X , max · [ Data_Arb ⁢ _Mismatch max [ P X -> P Y ] + PHY_DELAY Y , max P Y ′ -> P Y ] + 29 · BASERATE X , max BASERATE Y , min - 27 20 - 16 · BASERATE X , max BASERATE Y , min ( 84 ) gap_count D = BASERATE X , max · [ Data_Arb ⁢ _Mismatch max [ P X -> P Y ] + PHY_DELAY Y , max P Y ′ -> P Y ] + 53 · BASERATE X , max BASERATE Y , min - 51 36 - 32 · BASERATE X , max BASERATE Y , min ( 85 )

Given the ratio of maximum to minimum BASERATE is always >1 and that MIN_IDLE_TIME is ˜40 ns, it is clear that:
gap_countB>gap_countA  (86)
and
gap_countD>gap_countC  (87)

To select an appropriate gap count for a given topology, both gap_countB and gap_countD must be calculated, rounded up to the next integer, and the maximum of the two results selected.

For IEEE1394-1995 style topologies (assumed to be limited to 4.5 m cables and a worst case PHY_DELAY of 144 ns), a table can be constructed to provide the gap count setting as a function of hops. In constructing such a table, the constant values in Table 2 are assumed.

TABLE 2
PHY Timing Constants
Parameter Minimum Maximum
ARB_RESPONSE_DELAY1 PHY_DELAY(max) − 60 ns PHY_DELAY(max)
BASERATE 98.294 mbps 98.314 mbps
cable_delay 22.725 ns
MIN_IDLE_TIME 40 ns
PHY_DELAY 144 ns
RESPONSE_TIME PHY_DELAY + 100 ns

The resulting gap count versus Cable Hops can then be calculated:

TABLE 3
Gap Count as a function of hops
Hops Gap Count
1 5
2 7
3 8
4 10
5 13
6 16
7 18
8 21
9 24
10 26
11 29
12 32
13 35
14 37
15 40
16 43
17 46
18 48
19 51
20 54
21 57
22 59
23 62

Pinging provides an effective way to set an optimal gap count for topologies with initially unspecified or unknown PHY or cable delays. Specifically, pinging allows determination of an instantaneous Round_Trip_Delay between two given points. Once the worst case Round_Trip Delay has been determined via pinging, gap_countb and gap_countd can be calculated and the appropriate gap count selected.

The Jitter value specified in the PHY register map was introduced to help relate instantaneous measurements of ROUND_TRIP_DELAY to the maximum possible ROUND_TRIP_DELAY between two points. Specifically, the outbound PHY_DELAY and return ARB_RESPONSE_DELAY measured between a given ordered pair of ports on a PHY (say Pc out to and back from Pd) can be related to the maximum outbound PHY_DELAY and return ARB_RESPONSE_DELAY between any and all ordered pairs of ports (referenced as Pa& Pb) on the same PHY:

0 ≤ [ ⁢ PHY_DELAY n , max P a -> P b + ARB_RESPONSE ⁢ _DELAY n , max P b -> P a 2 - PHY_DELAY n , meas P c -> P d + ARB_RESPONSE ⁢ _DELAY n , meas P d -> P c 2 ] ⁢ ≤ Jitter n ( 88 )

Noting that a measured value can never exceed a maximum value between order ports, the following corollary relating two independent measurements can be proven for any and all combination of ordered ports:

❘ PHY_DELAY n , meas j P a -> P b ⁢ + ARB_RESPONSE ⁢ _DELAY n , meas j P b -> P a 2 - PHY_DELAY n , meas 2 P c -> P d + ARB_RESPONSE ⁢ _DELAY n , meas 2 P d -> P c 2 ❘ ≤ Jitter n ( 89 )

In order for a bus manager to calculate ordered leaf-to-leaf delays via a series of ping requests launched from the bus manager, a number of ROUND_TRIP_DELAY relationships will be required and are derived below.

Round_Trip ⁢ _Delay max [ P X ⁢ O ⁢ ⁢ P Y ]

Using the definition of Round_Trip_Delay first provided in equation (12) as guidance, the roundtrip delay between Nodes X and Y from the perspective of Node X can be written as:

Round_Trip ⁢ _Delay max [ P X ⁢ O ⁢ ⁢ P Y ] = ∑ n = X + 1 Y - 1 ⁢ ⁢ ( 2 · cable_delay n + PHY_DELAY n , max P n ′ -> P n + ARB_RESPONSE ⁢ _DELAY n , max P n -> P n ′ + ) + 2 · cable_delay X ( 90 )

From equation (88), the maximum PHY_DELAY and ARB_RESPONSE_DELAY between an ordered pair of ports can be bounded by the measured delays plus the overall jitter sum yielding:

Round_Trip ⁢ _Delay max [ P X ⁢ O ⁢ ⁢ P Y ] ≤ ∑ n = X + 1 Y - 1 ⁢ ⁢ ( 2 · cable_delay n + PHY_DELAY n , meas j P n ′ -> P n + ARB_RESPONSE ⁢ _DELAY n , meas j P n -> P n ′ + 2 · Jitter n ) + 2 · cable_delay X ( 91 )

Comparison to the definition of Round_Trip_Delay then allows

Round_Trip ⁢ _Delay max [ P X ⁢ O ⁢ ⁢ P Y ] ≤ Round_Trip ⁢ _Delay meas j [ P X ⁢ O ⁢ ⁢ P Y ] + ∑ n = X + 1 Y - 1 ⁢ ⁢ 2 · Jitter n ⁢ ⁢ Round_Trip ⁢ _Delay max [ P Y ⁢ O ⁢ ⁢ P X ] ( 92 )

Using the definition of Round_Trip_Delay first provided in equation (12) as guidance, the roundtrip delay between Nodes X and Y from the perspective of Node Y can be written as:

Round_Trip ⁢ _Delay max [ P Y ⁢ O ⁢ ⁢ P X ] = ∑ n = X + 1 Y - 1 ⁢ ⁢ ( 2 · cable_delay n + PHY_DELAY n , max P n -> P n ′ + ARB_RESPONSE ⁢ _DELAY n , max P n ′ -> P n ) + 2 · cable_delay X ( 93 )

From equation (88), the maximum PHY_DELAY and ARB_RESPONSE_DELAY between an ordered pair of ports can be related to the measured delays observed in the reverse direction:

( PHY_DELAY n , max P n -> P n ′ + ARB_RESPONSE ⁢ _DELAY n , max P n ′ -> P n ) ≤ 2 · Jitter n + ( PHY_DELAY n , meas j P n ′ -> P n + ARB_RESPONSE ⁢ _DELAY n , meas j P n -> P n ′ ) ( 94 )

allowing the maximum round trip between Nodes X and Y to be rewritten as:

Round_Trip ⁢ _Delay max [ P Y ⁢ O ⁢ ⁢ P X ] ≤ ∑ n = X + 1 Y - 1 ⁢ ⁢ ( 2 · cable_delay n + PHY_DELAY n , meas j P n ′ -> P n + ARB_RESPONSE ⁢ _DELAY n , meas j P n -> P n ′ + 2 · Jitter n ) + 2 · cable_delay X ( 95 )

Comparison to the definition of Round_Trip_Delay then allows

Round_Trip ⁢ _Delay max [ P Y ⁢ O ⁢ ⁢ P X ] ≤ Round_Trip ⁢ _Delay meas j [ P X ⁢ O ⁢ ⁢ P Y ] + ∑ n = X + 1 Y - 1 ⁢ ⁢ 2 · Jitter n ⁢ ⁢ Round_Trip ⁢ _Delay max [ P N ⁢ O ⁢ ⁢ P Y ] ( 96 )

Using the definition of Round_Trip_Delay first provided in equation (12) as guidance, the roundtrip delay between Nodes N and Y from the perspective of Node N can be written as:

Round_Trip ⁢ _Delay max [ P N ⁢ O ⁢ ⁢ P Y ] = ∑ n = N + 1 Y - 1 ⁢ ⁢ ( 2 · cable_delay n + PHY_DELAY n , max P n ′ -> P n + ARB_RESPONSE ⁢ _DELAY n , max P n -> P n ′ ) + 2 · cable_delay N ( 97 )

From equation (88), the maximum PHY_DELAY and ARB_RESPONSE_DELAY between an ordered pair of ports can be bounded by the measured delays plus the overall jitter sum yielding:

Round ⁢ ⁢ Trip_Delay max [ P N ⁢ ⁢ O ⁢ ⁢ P Y ] ≤ ∑ n = N + 1 Y - 1 ⁢ ⁢ ( 2 · cable_delay n + PHY_DELAY n , meas 1 P n ′ -> P n + ARB_RESPONSE ⁢ _DELAY n , meas 1 P n -> P n ′ + 2 · Jitter n ) + 2 · cable_delay N ( 98 )

Introducing offsetting terms to the right side:

Round_Trip ⁢ _Delay max [ P N ⁢ O ⁢ ⁢ P Y ] ≤ ∑ n = X + 1 Y - 1 ⁢ ⁢ ( 2 · cable_delay n + PHY_DELAY n , meas 1 P n ′ -> P n + ARB_RESPONSE ⁢ _DELAY n , meas 1 P n -> P n ′ + 2 · Jitter n ) + 2 · cable_delay X - ∑ n = X + 1 N - 1 ⁢ ⁢ ( 2 · cable_delay n + PHY_DELAY n , meas 1 P n ′ -> P n + ARB_RESPONSE ⁢ _DELAY n , meas 1 P n -> P n ′ + 2 · Jitter n ) - 2 · cable_delay X - PHY_DELAY N , meas 1 P N ′ -> P N - ARB_RESPONSE ⁢ _DELAY N , meas 1 P N -> P N ′ - 2 · Jitter N ( 99 )

Equations (89) and the fact that measured delays are at no smaller than minimum delays allow simplification to:

Round_Trip ⁢ _Delay max [ P N ⁢ O ⁢ ⁢ P Y ] ≤ ∑ n = X + 1 Y - 1 ⁢ ⁢ ( 2 · cable_delay n + PHY_DELAY n , meas 1 P n ′ -> P n + ARB_RESPONSE ⁢ _DELAY n , meas 1 P n -> P n ′ + 2 · Jitter n ) + 2 · cable_delay X - ∑ n = X + 1 N - 1 ⁢ ⁢ ( 2 · cable_delay n + PHY_DELAY n , meas 2 P n ′ -> P n + ARB_RESPONSE ⁢ _DELAY n , meas 2 P n -> P n ′ ) - 2 · cable_delay X - PHY_DELAY N , min P N ′ -> P N - ARB_RESPONSE ⁢ _DELAY N , min P N -> P N ′ - 2 · Jitter N ( 100 )

Comparison to the definition of Round_Trip_Delay then allows

Round_Trip ⁢ _Delay max [ P N ⁢ O ⁢ ⁢ P Y ] ⁢ ≤ Round_Trip ⁢ _Delay meas 1 [ P X ⁢ O ⁢ ⁢ P Y ] + ∑ n = X + 1 Y - 1 ⁢ ⁢ 2 · Jitter n - Round_Trip ⁢ _Delay meas 2 [ P X ⁢ O ⁢ ⁢ P N ] - PHY_DELAY N , min P N ′ -> P N - ARB_RESPONSE ⁢ _DELAY N , min P N -> P N ′ - 2 · Jitter N ⁢ ⁢ Round_Trip ⁢ _Delay max [ P Y ⁢ O ⁢ ⁢ P N ] ⁢ ( 101 )

Using the definition of Round_Trip_Delay first provided in equation (12) as guidance, the roundtrip delay between Nodes N and Y from the perspective of Node Y can be written as:

Round_Trip ⁢ _Delay max [ P Y ⁢ O ⁢ ⁢ P N ] = ∑ n = N + 1 Y - 1 ⁢ ⁢ ( 2 · cable_delay n + PHY_DELAY n , max P n -> P n ′ + ARB_RESPONSE ⁢ _DELAY n , max P n ′ -> P n ) + 2 · cable_delay N ( 102 )

From equation (88), the maximum PHY_DELAY and ARB_RESPONSE_DELAY between an ordered pair of ports can be related to the measured delays observed in the reverse direction:

( PHY_DELAY n , max P n -> P n ′ + ARB_RESPONSE ⁢ _DELAY n , max P n ′ -> P n ) ≤ 2 · Jitter n + ( PHY_DELAY n , meas 1 P n ′ -> P n + ARB_RESPONSE ⁢ _DELAY n , meas 1 P n -> P n ′ ) ( 103 )

allowing the maximum round trip between Nodes N and Y to be rewritten as:

Round_Trip ⁢ _Delay max [ P Y ⁢ O ⁢ ⁢ P N ] ≤ ∑ n = N + 1 Y - 1 ⁢ ⁢ ( 2 · cable_delay n + PHY_DELAY n , meas 1 P n ′ ⁢ -> P n + ARB_RESPONSE ⁢ _DELAY n , meas 1 P n -> P n ′ + 2 · Jitter n ) + 2 · cable_delay N ( 104 )

Introducing offsetting terms to the right side:

Round_Trip ⁢ _Delay max [ P Y ⁢ O ⁢ ⁢ P N ] ≤ ∑ n = X + 1 Y - 1 ⁢ ⁢ ( 2 · cable_delay n + PHY_DELAY n , meas 1 P n ′ -> P n ⁢ + ARB_RESPONSE ⁢ _DELAY n , meas 1 P n -> P n ′ + 2 · Jitter n ) + 2 · cable_delay X - ∑ n = X + 1 N - 1 ⁢ ⁢ ( 2 · cable_delay n + PHY_DELAY n , meas 1 P n ′ -> P n + ARB_RESPONSE ⁢ _DELAY n , meas 1 P n -> P n ′ + 2 · Jitter n ) - 2 · cable_delay X - PHY_DELAY N , meas 1 P N ′ -> P N - ARB_RESPONSE ⁢ _DELAY N , meas 1 P N -> P N ′ - 2 · Jitter N ( 105 )

Equations (89) and the fact that measured delays are at no smaller than minimum delays allow simplification to:

Round_Trip ⁢ _Delay max [ P Y ⁢ O ⁢ ⁢ P N ] ≤ ∑ n = X + 1 Y - 1 ⁢ ⁢ ( 2 · cable_delay n + PHY_DELAY n , meas 1 P n ′ -> P n + ARB_RESPONSE ⁢ _DELAY n , meas 1 P n -> P n ′ + 2 · Jitter n ) + 2 · cable_delay X ⁢ - ∑ n = X + 1 N - 1 ⁢ ⁢ ( 2 · cable_delay n + PHY_DELAY n , meas 1 P n ′ -> P n + ARB_RESPONSE ⁢ _DELAY n , meas 2 P n -> P n + ) - 2 · cable_delay X - PHY_DELAY N , min P N ′ -> P N - ARB_RESPONSE ⁢ _DELAY N , min P N -> P N ′ - 2 · Jitter N ⁢ ( 106 )

Comparison to the definition of Round_Trip_Delay then allows

Round_Trip ⁢ _Delay max [ P Y ⁢ O ⁢ ⁢ P N ] ≤ Round_Trip ⁢ _Delay meas 1 [ P X ⁢ O ⁢ ⁢ P Y ] + ∑ n = X + 1 Y - 1 ⁢ ⁢ 2 · Jitter n - Round_Trip ⁢ _delay meas 2 [ P X ⁢ O ⁢ ⁢ P N ] - PHY_DELAY N , min P N ′ ⁢ -> P N - ARB_RESPONSE ⁢ _DELAY N , min P N -> P N ′ - 2 · Jitter N ( 107 )

PHY pinging provides a low level mechanism to directly measure round trip delays between two nodes by timing link initiated subactions. However, pinging does introduce some uncertainty in the measured delay. Any gap count algorithm which employs PHY pinging must compensate for such uncertainty. FIG. 8 depicts a ping subaction issued by the link in Node X and directed to Node Y.

The timing reference points t1 through t7 are identical to those used in the previous gap count derivations. Additionally:

t1 Coincident with the rising SCLK edge in which the PHY first
samples IDLE after a link transmission. t1′ leads t1 by
LINK_TO_BUS_DELAY
t7 Coincident with the rising SCLK edge in which the PHY is driving
the first RECEIVE indication to the link. (The PHY presumably
drove RECEIVE off of the previous clock transition.) t7′ lags t7 by
BUS_TO_LINK_DELAY

The ping time measured by the link (in SCLK cycles) is then given by:

Ping_Time meas [ P X ⁢ O ⁢ ⁢ P Y ] = ⁢ t 7 ′ - t 1 ′ = ⁢ BUS_TO ⁢ _LINK ⁢ _DELAY X , meas + t 7 - t 1 + ⁢ LINK_TO ⁢ _BUS ⁢ _DELAY X , meas = ⁢ BUS_TO ⁢ _LINK ⁢ _DELAY X , meas + ⁢ LINK_TO ⁢ _BUS ⁢ _DELAY X , meas + t 0 + ⁢ ∑ n = X + 1 Y - 1 ⁢ ⁢ ( 2 · cable_delay n + PHY_DELAY n , meas P n ′ -> P n + ARB_RESPONSE ⁢ _DELAY n , meas P n ′ -> P n ′ ) + ⁢ 2 · cable_delay X + packet_length packet_speed · BASERATE Y - 1 + ⁢ DATA_END ⁢ _TIME Y - 1 , meas P Y - 1 + ⁢ RESPONSE_TIME Y , meas P Y ′ - ⁢ t 0 - packet_length packet_speed · BASERATE X = ⁢ BUS_TO ⁢ _LINK ⁢ _DELAY X , meas + ⁢ LINK_TO ⁢ _BUS ⁢ _DELAY X , meas + ⁢ Round_Trip ⁢ _Delay meas [ P X ⁢ O ⁢ ⁢ P Y ] + ⁢ PPM_delta [ Y - 1 , X ] + ⁢ DATA_END ⁢ _TIME Y - 1 , meas P Y - 1 + ⁢ RESPONSE_TIME Y , meas P Y ′ ⁢ ( 108 )

Solving for the measured Round_Trip_Delay gives:

Round_Trip ⁢ _Delay meas [ P X ⁢ O ⁢ ⁢ P Y ] = Ping_Time meas [ P X ⁢ O ⁢ ⁢ P Y ] - BUS_TO ⁢ _LINK ⁢ _DELAY X , meas - LINK_TO ⁢ _BUS ⁢ _DELAY X , meas - PPM_delta [ Y - 1 , X ] - DATA_END ⁢ _TIME Y - 1 , meas P Y - 1 - RESPONSE_TIME Y , meas P Y ′ ( 109 )

Remembering that RESPONSE_TIME (min or max) absorbs PPM_delta, an upper and lower bound can be defined for Round_Trip_Delay:

Round_Trip ⁢ _Delay Ping , max [ P X ⁢ O ⁢ ⁢ P Y ] = Ping_Time meas [ P X ⁢ O ⁢ ⁢ P Y ] - BUS_TO ⁢ _LINK ⁢ _DELAY X , min - LINK_TO ⁢ _BUS ⁢ _DELAY X , min - DATA_END ⁢ _TIME Y - 1 , min P Y - 1 - RESPONSE_TIME Y , min P Y ′ ( 110 ) and ⁢ ⁢ Round_Trip ⁢ _Delay Ping , min [ P X ⁢ O ⁢ ⁢ P Y ] = Ping_Time meas [ P X ⁢ O ⁢ ⁢ P Y ] - BUS_TO ⁢ _LINK ⁢ _DELAY X , max - LINK_TO ⁢ _BUS ⁢ _DELAY X , max - DATA_END ⁢ _TIME Y - 1 , max P Y - 1 - RESPONSE_TIME Y , max P Y ′ ( 111 )
such that

Round_Trip ⁢ _Delay Ping , min [ P X ⁢ O ⁢ ⁢ P Y ] ≤ Round_Trip ⁢ _Delay meas [ P X ⁢ O ⁢ ⁢ P Y ] ≤ Round_Trip ⁢ _Delay Ping , max [ P X ⁢ O ⁢ ⁢ P Y ] ( 112 )

Using the Round_Trip_Delay properties and the Ping_Time relationships, the maximum Round_Trip_Delay between two given leaf nodes can be bounded for any possible topology.

The simplest and most accurate Round_Trip_Delay determination is afforded when the Bus Manager is one of the leaf nodes in question as shown in FIG. 9.

From (92),

Round_Trip ⁢ _Delay max [ P BM ⁢ O ⁢ ⁢ P Y ] ≤ Round_Trip ⁢ _Delay meas 1 [ P BM ⁢ O ⁢ ⁢ P Y ] + ∑ n ( BM , Y ) ⁢ ⁢ 2 · Jitter n ( 113 )
And from (112),

Round_Trip ⁢ _Delay max [ P BM ⁢ O ⁢ ⁢ P Y ] ≤ Round_Trip ⁢ _Delay Ping , max [ P BM ⁢ O ⁢ ⁢ P Y ] + ∑ n ( BM , Y ) ⁢ ⁢ 2 · Jitter n ( 114 )
Likewise, the reverse path is also bounded:

Round_Trip ⁢ _Delay max [ P Y ⁢ O ⁢ ⁢ P BM ] ≤ Round_Trip ⁢ _Delay Ping , max [ P BM ⁢ O ⁢ ⁢ P Y ] + ∑ n ( BM , Y ) ⁢ ⁢ 2 · Jitter n ( 115 )

The second topology to consider is when the bus manager is not a leaf but is part of the connecting path between the two leaves as illustrated in FIG. 10.

Expressing the max delay piecewise,

Round_Trip ⁢ _Delay max [ P X ⁢ O ⁢ ⁢ P Y ] = Round_Trip ⁢ _Delay max [ P X ⁢ O ⁢ ⁢ P BM ] + Round_Trip ⁢ _Delay max [ ⁢ P BM ⁢ O ⁢ ⁢ P Y ⁢ ] + PHY_DELAY BM , max P BM ′ → P BM + ARB_RESPONSE ⁢ _DELAY BM , max P BM → P BM ′ ( 116 )

Equations (92) and (96) allow:

Round_Trip ⁢ _Delay max [ P X ⁢ O ⁢ ⁢ P Y ] ≤ Round_Trip ⁢ _Delay meas [ P BM ⁢ O ⁢ ⁢ P X ] + ∑ n ( BM , X ) ⁢ ⁢ 2 · Jitter n + Round_Trip ⁢ _Delay meas [ P BM ⁢ O ⁢ ⁢ P Y ] + ∑ n ( BM , Y ) ⁢ ⁢ 2 · Jitter n + PHY_DELAY BM , max P BM ′ -> P BM + ARB_RESPONSE ⁢ _DELAY BM , max P BM -> P BM ′ ( 117 )
And from (112),

Round_Trip ⁢ _Delay max [ P X ⁢ O ⁢ ⁢ P Y ] ≤ Round_Trip ⁢ _Delay Ping , max [ P BM ⁢ O ⁢ ⁢ P X ] + ∑ n ( BM , X ) ⁢ ⁢ 2 · Jitter n + Round_Trip ⁢ _Delay Ping , max [ P BM ⁢ O ⁢ ⁢ P Y ] + ∑ n ( BM , Y ) ⁢ ⁢ 2 · Jitter n + PHY_DELAY BM , max P BM ′ -> P BM + ARB_RESPONSE ⁢ _DELAY BM , max P BM -> P BM ′ ( 118 )

Likewise, the reverse path is also bounded:

Round_Trip ⁢ _Delay max [ P Y ⁢ O ⁢ ⁢ P X ] ≤ Round_Trip ⁢ _Delay Ping , max [ P BM ⁢ O ⁢ ⁢ P X ] + ∑ n ( BM , X ) ⁢ ⁢ 2 · Jitter n + Round_Trip ⁢ _Delay Ping , max [ P BM ⁢ O ⁢ ⁢ P Y ] + ∑ n ( BM , Y ) ⁢ ⁢ 2 · Jitter n + PHY_DELAY BM , max P BM -> P BM ′ + ARB_RESPONSE ⁢ _DELAY BM , max P BM ′ -> P BM ( 119 )

The final topology to consider is when the bus manager is not a leaf but is not part of the connecting path between the two leaves as illustrated in FIG. 11.

Expressing the max delay piecewise,

Round_Trip ⁢ _Delay max [ P X ⁢ O ⁢ ⁢ P Y ] = Round_Trip ⁢ _Delay max [ ⁢ P X ⁢ O ⁢ ⁢ P N ⁢ ] + Round_Trip ⁢ _Delay max [ P N ⁢ O ⁢ ⁢ P Y ] + PHY_DELAY N , max P N ′ -> P N + ARB_RESPONSE ⁢ _DELAY N , max P N -> P N ′ ( 120 )

Equations (107) and (101) allow:

Round_Trip ⁢ _Delay max [ P X ⁢ O ⁢ ⁢ P Y ] ≤ ( Round_Trip ⁢ _Delay meas 1 [ P BM ⁢ O ⁢ ⁢ P X ] + ∑ n ( BM , X ) ⁢ ⁢ 2 · Jitter n - Round_Trip ⁢ _Delay meas 2 [ P BM ⁢ O ⁢ ⁢ P N ] - PHY_DELAY N , min P N BM -> P N ′ - ARB_RESPONSE ⁢ _DELAY N , min P N ′ -> P N BM - 2 · Jitter N ) + ⁢ ( Round_Trip ⁢ _Delay meas 1 [ P BM ⁢ O ⁢ ⁢ P Y ] + ∑ n ( BM , Y ) ⁢ ⁢ 2 · Jitter n - Round_Trip ⁢ _Delay meas 2 [ P BM ⁢ O ⁢ ⁢ P N ] - PHY_DELAY N , min P N BM -> P N - ARB_RESPONSE ⁢ _DELAY N , min P N -> P N BM - 2 · Jitter N ) + PHY_DELAY N , max P N ′ -> P N + ARB_RESPONSE ⁢ _DELAY N , max P N -> P N ′ ( 121 )

And from (112),

Round_Trip ⁢ _Delay max [ P X ⁢ O ⁢ ⁢ P Y ] ≤ ( Round_Trip ⁢ _Delay Ping , max [ P BM ⁢ O ⁢ ⁢ P X ] + ∑ n ( BM , X ) ⁢ ⁢ 2 · Jitter n + Round_Trip ⁢ _Delay Ping , max [ P BM ⁢ O ⁢ ⁢ P Y ] + ∑ n ( BM , Y ) ⁢ ⁢ 2 · Jitter n + PHY_DELAY N , max P N ′ -> P N + ARB_RESPONSE ⁢ _DELAY N , max P N -> P N ′ ) - ⁢ ( 2 · Round_Trip ⁢ _Delay Ping , min [ P BM ⁢ O ⁢ ⁢ P N ] + 4 · Jitter N + PHY_DELAY N , min P N BM -> P N ′ + ARB_RESPONSE ⁢ _DELAY N , min P N ′ -> P N BM ⁢ + PHY_DELAY N , min P N BM -> P N + ARB_RESPONSE ⁢ _DELAY N , min P N -> P N BM ) ( 122 )
ARB_RESPONSE_DELAY is a difficult parameter to characterize. Proper PHY operation requires that arb signals propagate at least as fast as the data bits, otherwise the arbitration indications could shorten as they are repeated through a network. This fact places a bound on the maximum ARB_RESPONSE_DELAY: ARB_RESPONSE_DELAY between two ports at a particular instant must always be less than or equal to the data repeat delay at the very same instant. Although the distinction is subtle, this is not the same as saying the maximum ARB_RESPONSE_DELAY is PHY_DELAY. (PHY_DELAY only applies to the first bit of a packet and is known to have some jitter from one repeat operation to the next. Consequently, requiring ARB_RESPONSE_DELAY<=PHY_DELAY doesn't force ARB_RESPONSE_DELAY to track the instantaneous PHY_DELAY nor does it allow ARB_RESPONSE_DELAY to track the data repeat time for the last bit of a packet which may actually exceed PHY_DELAY due to PPM drift.) Finally, the table approach to calculating gap_counta and gap_countb rely on ARB_RESPONSE_DELAY always being bounded by the maximum PHY_DELAY when determining the Round_Trip_Delay.

The minimum ARB_RESPONSE_DELAY is only of significance when calculating Data_Arb_Mismatch as required by gap_countc and gap_countd. Ideally, Data_Arb_Mismatch should be a constant regardless of PHY_DELAY so that neither gap_countc nor gap_countd will begin to dominate the gap_count setting as PHY_DELAY increases. Consequently, the minimum ARB_RESPONSE_DELAY should track the instantaneous PHY_DELAY with some offset for margin. Simply specifying the min value as a function of PHY_DELAY is ambiguous, however, since PHY_DELAY can be easily confused with the max DELAY reported in the register map. (For example, with DELAY at 144 ns, it would be easy to assume a min of PHY_DELAY −60 ns would be equivalent to 84 ns. But if the worst case first bit repeat delay was only 100 ns, arb signals repeating with a delay of 40 ns ought to be considered within spec even though the delay is <84 ns.)

Consequently, specifying an upper and a lower bound for ARB_RESPONSE_DELAY is best done in the standard with words rather than values. The minimum and maximum values for ARB_RESPONSE_DELAY include that between all ordered pairs of ports, the PHY shall repeat arbitration line states at least as fast as clocked data, but not more than 60 ns faster than clocked data.

A better approach is to replace ARB_RESPONSE_DELAY with the parameter DELAY_MISMATCH which is defined in the comment column as “Between all ordered pairs of ports, the instantaneous repeat delay for data less the instantaneous repeat delay for arbitration line states.” Then, the minimum would be given as 0 ns and the maximum would be 60 ns.

For a table based calculation of Round_Trip_Delay, either approach above allows the use of PHY_DELAY(max) for ARB_RESPONSE_DELAY. Since Round_Trip_Delay considers the arbitration repeat delay in the direction opposite to the original packet flow, the return arbitration indication of interest is known to arrive at the receive port when the PHY is idle (all caught up with nothing to repeat). At that point, the instantaneous PHY_DELAY is the same as the first data bit repeat delay which is bounded by PHY_DELAY(max). Since ARB_RESPONSE_DELAY is always bounded by the instantaneous PHY_DELAY, it to is bounded by PHY_DELAY(max) at the point the arbitration indication first arrives.

The minimum bound on PHY_DELAY is used by the bus manager when determining the round_trip_delay between leaf nodes that are not separated by the bus manager. The more precise the minimum bound, the more accurate the pinging calculation can be. Ideally then, the bound may want to scale with increasing PHY_DELAY. Alternatively, the lower bound could be calculated by examining the Delay field in the register map: if zero, the lower bound is assumed to be the fixed value specified (60 ns currently). If non-zero, the lower bound could then be determined by subtracting the jitter field (converted to ns) from the delay field (converted to ns).

The “Jitter” field was introduced to aid in selection of gap_count via pinging by describing the uncertainty found in any empirical measurement of Round_Trip_Delay. Since Round_Trip_Delay encompasses an “outbound” PHY_DELAY and a “return” ARB_RESPONSE_DELAY, the jitter term should capture uncertainty in both. The needs of pinging can be met with the following description for jitter: Upper bound of the mean average of the worst case data repeat jitter (max/min variance) and the worst case arbitration repeat jitter (max/min variance), expressed as 2*(jitter+1)/BASE_RATE.

Note that from the discussion on minimum PHY_DELAY, it may be desirable to require that if the delay field is non-zero, then the slowest first data bit repeat delay can be calculated by subtracting the jitter value from the delay value.

Claims

What is claimed is:

1. A device for use in a first node of a serial bus, the device comprising:

a first module adapted to ping a second node;

a second module adapted to receive a ping response from the second node;

a third module adapted to calculate a maximum round trip delay between a first PHY associated with the first node and a second PHY associated with the second node based at least in part upon a jitter value, and further based at least in part on the ping response sent to the second module; and

a fourth module adapted to send a configuration packet to all PHYs on the serial bus, the configuration packet containing a gap count, the gap count derived from the maximum round trip delay between the first PHY and the second PHY;

wherein at least one of said first PHY and second PHY comprises a first pair of ports and a second pair of ports and the jitter value is defined as being greater than or equal to the absolute value of a total quantity, the total quantity defined as the difference between a first quantity and a second quantity; and

wherein the first quantity comprises the sum of a first sub-quantity and a second sub-quantity, the first sub-quantity consisting of a PHY delay between the first ordered pair of ports divided by two, the second sub-quantity consisting of an arbitration response delay between the first ordered pair of ports divided by two.

2. The device of claim 1, wherein the second quantity comprises the sum of a third subquantity and a fourth subquantity, the third subquantity consisting of a PHY delay between the second ordered pair of ports divided by two, and the fourth subquantity consisting of an arbitration response delay between the second ordered pair of ports divided by two.

3. The device of claim 1, wherein the response comprises a self-identification packet.

4. The device of claim 1, wherein all PHYs of the high-speed serial bus comprise a subaction gap detection time that is greater than a maximum idle value that can occur within a subaction.

5. The device of claim 1, wherein all PHYs of the high-speed serial bus comprise an arbitration reset gap timeout value that is greater than the largest subaction gap that can occur over the high-speed serial bus.

6. A method of optimizing communication over a high-speed serial bus by minimizing the delay between packets transmitted over the bus, the method comprising:

sending a ping from a first node to a second node;

sending a response from the second node to the first node after receiving the ping;

calculating a maximum round trip delay between a first PHY of the first node and a second PHY of the second node based at least in part upon a jitter, and further based at least in part upon the response sent to the first node;

sending via a bus manager a configuration packet to all PHYs connected on the bus, the configuration packet containing a minimum gap_count parameter value, the minimum gap_count parameter value derived from the maximum round trip delay between the first PHY and the second PHY; and

sending via all PHYs connected on the packets over the bus, using the minimum gap_count parameter value as a delay between packets;

wherein at least one of said first PHY and second PHY comprises a first pair of ports and a second pair of ports, wherein the jitter is defined as being greater than or equal to the absolute value of a total quantity, the total quantity defined as the difference between a first quantity and a second quantity; and

wherein the first quantity comprises the sum of a first subquantity and a second subquantity, the first subquantity consisting of a PHY delay between the first ordered pair of ports divided by two, the second subquantity consisting of an arbitration response delay between the first ordered pair of ports divided by two.

7. The method of claim 6, wherein the second quantity comprises the sum of a third subquantity and a fourth subquantity, the third subquantity consisting of a PHY delay between the second ordered pair of ports divided by two, and the fourth subquantity consisting of an arbitration response delay between the second ordered pair of ports divided by two.

8. The method of claim 6, further comprising preserving an ack/iso gap between packets, wherein a first PHY sent a most recently-sent packet and a second PHY is responding to the first PHY.

9. The method of claim 8, wherein the second PHY is adapted to respond with an ack packet.

10. The method of claim 8, wherein the second PHY is adapted to respond with an isochronous arbitration packet.

11. The method of claim 6, wherein the first PHY sends an isochronous packet, observes a sub action gap, and initiates an arbitration indication.

12. The method of claim 6, wherein the first PHY sends an asynchronous packet, observes an arbitration reset gap, and initiates an arbitration indication.

13. The method of claim 6, wherein calculating the round trip delay comprises executing a ping command at a link layer on said first node directed at a link layer on said second node.

14. The method of claim 13, wherein calculating the round trip delay comprises calculating a round trip delay from a first link on the first node and a second link on the second node.

15. The method of claim 6, wherein the second PHY has a subaction gap timeout value that is greater than an IDLE value that can occur within a subaction and an isochronous interval on the high-speed serial bus.

16. The method of claim 6, wherein all PHYs of the high-speed serial bus comprise a subaction gap detection time that is greater than a maximum idle value that can occur within a subaction.

17. The method of claim 6, wherein all PHYs of the high-speed serial bus comprise an arbitration reset gap timeout value that is greater than the largest subaction gap that can occur over the high-speed serial bus.

18. The method of claim 6, wherein the response comprises a self-ID packet.

19. A computer-readable medium containing instructions which, when executed by a processor, minimize the delay between packets transmitted over a high-speed serial bus, by performing the method comprising:

sending a ping from a first node to a second node;

sending a response from the second node to the first node after receiving the ping;

calculating a maximum round trip delay between a first PHY of the first node and a second PHY of the second node based at least in part upon a jitter, and further based at least in part upon the response sent to the first node;

sending via a bus manager a configuration packet to all PHYs connected on the bus, the configuration packet containing a minimum gap_count parameter value, the minimum gap_count parameter value derived from the maximum round trip delay between the first PHY and the second PHY; and

sending via all PHYs connected on the packets over the buss using the minimum gap_count parameter value as a delay between packets;

wherein at least one of said first PHY and second PHY comprises a first pair of ports and a second pair of ports, wherein the jitter is defined as being greater than or equal to the absolute value of a total quantity, the total quantity defined as the difference between a first quantity and a second quantity; and

wherein the first quantity comprises the sum of a first subquantity and a second subquantity, the first subquantity consisting of a PHY delay between the first ordered pair of ports divided by two, the second subquantity consisting of an arbitration response delay between the first ordered pair of ports divided by two.

20. The method of claim 19, wherein the second quantity comprises the sum of a third subquantity and a fourth subquantity, the third subquantity consisting of a PHY delay between the second ordered pair of ports divided by two, and the fourth subquantity consisting of an arbitration response delay between the second ordered pair of ports divided by two.

21. The method of claim 19, further comprising preserving an ack/iso gap between packets, wherein a first PHY sent a most recently-sent packet and a second PHY is responding to the first PHY.

22. The method of claim 21, wherein the second PHY is adapted to respond with an ack packet.

23. The method of claim 21, wherein the second PHY is adapted to respond with an isochronous arbitration packet.

24. The method of claim 19, wherein the first PHY sends an isochronous packet, observes a sub action gap, and initiates an arbitration indication.

25. The method of claim 19, wherein the first PHY sends an asynchronous packet, observes an arbitration reset gap, and initiates an arbitration indication.

26. The method of claim 19, wherein calculating the round trip delay comprises executing a ping command at a link layer on said first node directed at a link layer on said second node.

27. The method of claim 26, wherein calculating the round trip delay comprises calculating a round trip delay from a first link on the first node and a second link on the second node.

28. The method of claim 19, wherein the second PHY has a subaction gap timeout value that is greater than an IDLE value that can occur within a subaction and an isochronous interval on the high-speed serial bus.

29. The method of claim 19, wherein all PHYs of the high-speed serial bus comprise a subaction gap detection time that is greater than a maximum idle value that can occur within a subaction.

30. The method of claim 19, wherein all PHYs of the high-speed serial bus comprise an arbitration reset gap timeout value that is greater than the largest subaction gap that can occur over the high-speed serial bus.

31. The method of claim 19, wherein the response comprises a self-ID packet.

32. A device for use in a first node of a serial bus, the device comprising:

means for pinging a second node;

means for receiving a ping response from the second node;

means for calculating a maximum round trip delay between a first PHY associated with the first node and a second PHY associated with the second node based at least in part upon a jitter value, and further based at least in part on the ping response sent to the second module; and

means for sending a configuration packet to all PHYs on the serial bus, the configuration packet containing a gap count, the gap count derived from the maximum round trip delay between the first PHY and the second PHY;

wherein at least one of said first PHY and second PHY comprises a first pair of ports and a second pair of ports and the jitter value is defined as being greater than or equal to the absolute value of a total quantity, the total quantity defined as the difference between a first quantity and a second quantity; and

wherein the first quantity comprises the sum of a first sub-quantity and a second sub-quantity, the first sub-quantity consisting of a PHY delay between the first ordered pair of ports divided by two, the second sub-quantity consisting of an arbitration response delay between the first ordered pair of ports divided by two.

33. A device for use in a first node of a serial bus, the device comprising:

a first module adapted to send a first signal to a second node, said first signal adapted to elicit a response from said second node;

a second module adapted to calculate a maximum round trip delay between the first node and the second node based at least in part upon a jitter value, and further based at least in part on the response elicited from the second node; and

a third module adapted to send a packet to all nodes on the serial bus, the packet containing a gap count, the gap count derived from the maximum round trip delay between the first node and the second node;

wherein at least one of said first node and said second node comprises a first pair of ports and the jitter value is defined as being greater than or equal to the absolute value of a total quantity, the total quantity defined as the difference between a first quantity and a second quantity; and

wherein the first quantity comprises the sum of a first sub-quantity and a second sub-quantity, the first sub-quantity consisting of a delay between the first pair of ports divided by two, the second sub-quantity consisting of an arbitration response delay between the first pair of ports divided by two.

34. The device of claim 33, wherein at least one of said first node and said second node further comprises a second pair of ports, wherein the second quantity comprises the sum of a third subquantity and a fourth subquantity, the third subquantity consisting of a delay between the second pair of ports divided by two, and the fourth subquantity consisting of an arbitration response delay between the second pair of ports divided by two.

35. The device of claim 33, wherein the response comprises a self-identification packet.

36. A method of optimizing communication over a serial bus, the method comprising:

sending a first message from a first node to a second node;

sending a response from the second node to the first node after receiving the first message;

calculating a maximum round trip delay between the first node and the second node based at least in part upon a jitter, and further based at least in part upon the response sent to the first node;

sending a packet to all nodes connected on the bus, the packet containing a minimum gap count parameter value derived from the maximum round trip delay between the first node and the second node; and

sending via all nodes connected on the bus the minimum gap count parameter value as a delay between packets;

wherein at least one of said first node and second node comprises a first pair of ports, and wherein the jitter is defined as being greater than or equal to the absolute value of the difference between a first quantity and a second quantity; and

wherein the first quantity comprises the sum of a first subquantity and a second subquantity, the first subquantity comprising a PHY delay related to the first pair of ports, the second subquantity comprising an arbitration response delay related to the first pair of ports.

37. The method of claim 36, wherein at least one of said first node and said second node further comprises a second pair of ports, wherein the second quantity comprises the sum of a third subquantity and a fourth subquantity, the third subquantity comprising a PHY delay related to the second pair of ports, and the fourth subquantity comprising an arbitration response delay related to the second pair of ports.

38. The method of claim 36, wherein calculating the round trip delay comprises executing a ping command at a link layer on said first node directed at a link layer on said second node.

39. The method of claim 38, wherein calculating the round trip delay comprises calculating a round trip delay from a first link on the first node and a second link on the second node.

40. The method of claim 36, wherein the second node has a subaction gap timeout value that is greater than an idle value that can occur within a subaction and an isochronous interval on the serial bus.

41. The method of claim 36, wherein all nodes of the serial bus comprise a subaction gap detection time that is greater than a maximum idle value that can occur within a subaction.

42. The method of claim 36, wherein all nodes of the high-speed serial bus comprise an arbitration reset gap timeout value that is greater than the largest subaction gap that can occur over the serial bus.

43. The method of claim 36, wherein the response comprises a self-identification packet.

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