Disk drive adapting equalizer relative to bit error rate of sequence detector

Description

BACKGROUND

Description of the Related Art

Disk drives comprise a read channel for processing the read signal emanating from the head in order to demodulate the data recorded on the disk surface. The read channel typically comprises a sampling device for sampling the read signal to generate a sequence of read signal samples, an equalizer comprising a plurality of coefficients for equalizing the read signal samples to generate a sequence of equalized samples, and a sequence detector for detecting an estimated data sequence from the equalized samples according to a target response. Any suitable target response may be employed, such as a suitable partial response (e.g., PR4, EPR4, etc.), and any suitable sequence detector may be employed (e.g., Viterbi, Turbo Decoder, etc.).

The accuracy of the sequence detector is affected by the performance of the equalizer, wherein techniques have been employed to adapt the equalizer coefficients in order to optimize performance. Prior art techniques for adapting the equalizer typically attempt to adjust the equalizer coefficients according to a gradient that minimizes noise power and intersymbol interference (ISI) in terms of minimum mean squared error (MMSE), least mean squared error (LMS), or a zero forcing (ZF) algorithm.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1A shows a disk drive according to an embodiment of the present invention comprising a disk, a head actuated over the disk, and control circuitry.

FIG. 1B shows control circuitry according to an embodiment of the present invention including a gradient calculator for computing an equalizer adapting gradient in response to a correlation of read signal samples with error values.

FIG. 2 shows control circuitry according to an embodiment of the present invention for computing the gradient in response to a sign of the error values.

DETAILED DESCRIPTION OF EMBODIMENTS OF THE INVENTION

FIG. 1A shows a disk drive according to an embodiment of the present invention comprising a disk 2 and a head 4 actuated radially over the disk 2, wherein the head generates a read signal 6. A sampling device 8 (FIG. 1B) samples the read signal 6 to generate a sequence of read signal samples 10, and an equalizer 12 comprising a plurality of coefficients, equalizes the read signal 10 samples to generate a sequence of equalized samples 14. A sequence detector 16 detects an estimated data sequence 18 from the equalized samples 14, wherein the sequence detector 16 operates according to a target response comprising a plurality of target values. Control circuitry 20 adapts the equalizer coefficients by computing error values 22 in response to a difference between expected samples 24 and the equalized samples 14, computing a gradient 26 in response to a correlation of the read signal samples 10 with the error values 22, and adjusting at least one of the equalizer coefficients in response to the gradient. In one embodiment, the gradient is computed by scaling the correlation with at least one of the target values of the target response.

In the embodiment of FIG. 1A, the disk 2 comprises a plurality of embedded servo sectors 28₀-28_N which define a number of data tracks 30. Each servo sector 28 comprising coarse head positioning information (e.g., a track address) and fine head positioning information (e.g., servo bursts). The control circuitry 20 processes the read signal 6 to demodulate the servo sectors 28₀-28_N into a position error signal representing an error between a current radial location of the head 4 and a target radial location. The control circuitry 20 filters the position error signal with a suitable compensation filter to generate a control signal 32 applied to a voice coil motor (VCM) 34 which rotates an actuator arm 36 about a pivot in a direction that reduces the position error signal.

Any suitable sequence detector 16 may be employed in the embodiments of the present invention, such as a suitable Viterbi detector. In addition, the sequence detector 16 may operate according any suitable target response, such as a partial response (e.g., PR4, EPR4, EEPR4, etc.). The target values of the target response may be characterized by a suitable polynomial (e.g., 1-D² for a PR4 response), wherein the coefficients of the polynomial may comprise any suitable values, including fractional values.

In one embodiment, the expected samples 24 are generated by convolving the estimated data sequence 18 with an ideal polynomial representation of the channel. In another embodiment, the expected samples 24 are generated by convolving a training data sequence with an ideal polynomial representation of the channel. The training data sequence may be prerecorded on the disk (e.g., using an external servo writer or stamping technique) or it may be written to the disk by the control circuitry 20.

In one embodiment of the present invention, the coefficients of the equalizer 12 are adapted by computing a gradient that attempts to minimize the bit error rate of the sequence detector 16. For example, in the embodiment wherein the sequence detector comprises a Viterbi detector, an error event occurs when:

∑ k ⁢ ⁢ ( y k - d k i ) 2 < ∑ k ⁢ ⁢ ( y k - d k ) 2
where y_k represents a sequence of equalized sample values, d_k represents the correct sequence of expected sample values, d_kⁱ represents an alternative sequence of expected sample values. Therefore, the probability of a Viterbi detector making an error in the presence of an error event e_aⁱ can be represented as:

Pr ⁡ ( eer i ⁢ ❘ e a i ) = Pr ⁢ { ∑ k ⁢ ⁢ ( y k - d k i ) 2 < ∑ k ⁢ ⁢ ( y k - d k ) 2 } .
The above equation for representing an error event can be expanded into:

∑ k ⁢ ⁢ [ ( d k i ) 2 - ( d k ) 2 - 2 ⁢ y k ⁡ ( d k i - d k ) 2 ] < 0.
Letting y_k=d_k+z_k where z_k consists of statistical noise and residual intersymbol interference (ISI). Also let d_kⁱ=(aⁱ*g)_k and d_k=(a*g)_k where a is a NRZ input sequence and g represents the target values of the target response. With a_kⁱ−a_k=2·e_akⁱ, the above equation for representing an error event can be represented as:

∑ k ⁢ ⁢ [ ( e a i * g ) k ] 2 - ∑ k ⁢ ⁢ ( e a i * g ) k · z k < 0.
Letting e_ykⁱ=(e_aⁱ*g)_k the above equation can be written as:

∑ k ⁢ ⁢ [ e yk i ] 2 - ∑ k ⁢ ⁢ e yk i - z k < 0.

Observe z_k is a statistic quantity consisting of residual ISI and statistical colored noise. Assume the summation in the above equation accounts for N consecutive samples during the error event observation window, then the error-making condition becomes:

∑ k = 0 N - 1 ⁢ ⁢ [ e yk i ] 2 - ∑ k = 0 N - 1 ⁢ ⁢ e yk i · z k < 0.
Define column vectors:
e_yⁱ=[e_y0ⁱe_y1ⁱLe_yN-1ⁱ]^T and z=[z₀z₁Lz_N-1]^T
then the above equation becomes:
e_y^iTe_yⁱ−e_y^iTz<0.
Observe that e_y^iTe_yⁱ−e_y^iTz is a Gaussian stochastic variable with mean value M=e_y^iTe_yⁱ and variance V=e_y^iTE{zz^T}e_yⁱ. Thus we can use the Q function:

Q ⁡ ( x ) = 1 2 ⁢ ⁢ π ⁢ ∫ x ∞ ⁢ ⅇ - u 2 / 2 ⁢ ⅆ u
to write the error event probability equation as:

Pr ⁢ { e y i T ⁢ e y i T - e y i T ⁢ z < 0 } = Q ⁡ ( e y i T ⁢ e y i e y i T ⁢ E ⁢ { zz T } ⁢ e y i ) .
Defining R^z=E{zz^T} and the Viterbi pre-detection effective signal-to-noise ratio as ρ_i²=M²/V the error event probability equation can be written as:

Pr ( eer i  e a i ) = Q ⁡ ( ρ i ) = Q ⁡ ( M / V ) where ⁢ : ρ i = e y i T ⁢ e y i e y i T ⁢ R z ⁢ e y i .
For error event e_akⁱ with number λⁱ of error bits in the pattern, the bit error occurrence probability is:
Pr(e_aⁱ)=2^1-λi·λⁱ.
Consider κ+1 number of dominant error events e_akⁱ, the error event probability equation can be approximated as

∑ i = 0 κ ⁢ Pr ( eer i  e a i ) ⁢ Pr ⁡ ( e a i ) = ∑ i = 0 κ ⁢ Q ⁡ ( e y i T ⁢ e y i e y i T ⁢ R z ⁢ e y i ) ⁢ 2 1 - λ i ⁢ λ i = ∑ i = 0 κ ⁢ Q ⁡ ( ρ i ) ⁢ 2 1 - λ i ⁢ λ i .
From the above equation, the higher ρ_i the lower the probability of error. For a specific error event e_akⁱ, maximizing ρ_i means minimizing:
E=e_y^iTR^ze_yⁱ.

In one embodiment, the coefficients of the equalizer 12 are adapted in response to a gradient that minimizes the above E. Consider an example embodiment wherein the read channel comprises the dominant error events +, +−, +−+ and +0+, and the target response comprises the target values g=[g₀ g₁ g₂]^T, then the error event contributor e_yⁱ to E can be represented in the following table:

R z = ⌊ e k ⁢ e k e k ⁢ e k - 1 e k ⁢ e k - 2 L _ e k ⁢ e k - 1 e k - 1 ⁢ e k - 1 e k - 1 ⁢ e k - 2 L _ e k ⁢ e k - 2 e k - 1 ⁢ e k - 2 e k - 2 ⁢ e k - 2 L _ L _ L _ L _ L _ ⌋ .
Using the above equations, it is possible to compute the gradient for each error event that minimizes E. For example, for the ‘+’ error event, E is computed as:

E = [ g 0 g 1 g 2 ] ⁢ ⌊ e k ⁢ e k e k ⁢ e k - 1 e k ⁢ e k - 2 e k ⁢ e k - 1 e k - 1 ⁢ e k - 1 e k - 1 ⁢ e k - 2 e k ⁢ e k - 2 e k - 1 ⁢ e k - 2 e k - 2 ⁢ e k - 2 ⌋ ⁢ ⌊ g 0 g 1 g 2 ⌋ = ∑ i = 0 2 ⁢ ∑ j = 0 2 ⁢ g i ⁢ g j ⁢ e k - 1 ⁢ e k - j .

Computing

∂ E ∂ w m
as the adaptation gradient Δ_wm for the w_m coefficient:

Δ wm = ∂ E ∂ w m = ∑ i = 0 2 ⁢ ∑ j = 0 2 ⁢ g i ⁢ g j ⁡ ( e k - i ⁢ ∂ e k - j ∂ w m + ∂ e k - i ∂ w m ⁢ e k - j ) .
The above equation can be rewritten as:

Δ wm = ∑ i = 0 2 ⁢ ∑ j = 0 2 ⁢ g i ⁢ g j ⁡ ( e k - i ⁢ x k - m - j + e k - j ⁢ x k - m - i ) .
Therefore, in one embodiment, the w_m coefficient is updated according to:

w m ⁡ ( k + 1 ) = w m ⁡ ( k ) - μ · ∑ i = 0 2 ⁢ ∑ j = 0 2 ⁢ g i ⁢ g j ⁡ ( e k - i ⁢ x k - m - j + e k - j ⁢ x k - m - i )
where m=0, 1, 2, L, N−1 and μ is the update gain.

FIG. 1B illustrates example circuitry for implementing the above equation for the ‘+’ error event when the target response comprises three target values g=[g₀ g₁ g₂]^T. However, the above equations and corresponding circuitry can be generated for any number of target values of a target response and for any error event.

In one embodiment, the sign of the error values are used to compute the gradient in order to simplify the circuitry. In the above example for the ‘+’ error event, the above equation can be written as:

Δ wm = ∑ i = 0 2 ⁢ ∑ j = 0 2 ⁢ g i ⁢ g j ⁡ ( sign ⁡ ( e k - i ) ⁢ x k - m - j + sign ⁡ ( e k - j ) ⁢ x k - m - i )
or equivalently:
Δ_wm=2g₀²x_k-m+2g₁²x_k-m-1+2g_g2²x_k-m-2+x_k-m·[g₀g₁·sign(e_k-1)+g₀g₂·sign(e_k-2)]+x_k-m-1·[g₀g₁·sign(e_k)+g₀g₂·sign(e_k-2)]+x_k-m-2·[g₀g₂·sign(e_k)+g₁g₂·sign(e_k-1)].
FIG. 2 shows example circuitry for implementing the above equation, wherein similar circuitry may be employed for other error events and/or other number of target values in the target response.

Any suitable control circuitry may be employed to implement the embodiments of the present invention, such as any suitable integrated circuit or circuits. For example, the control circuitry may be implemented within a read channel integrated circuit, or in a component separate from the read channel, such as a disk controller, or certain steps described above may be performed by a read channel and others by a disk controller.

In one embodiment, the read channel and disk controller are implemented as separate integrated circuits, and in an alternative embodiment they are fabricated into a single integrated circuit or system on a chip (SOC). In addition, the control circuitry may include a suitable preamp circuit implemented as a separate integrated circuit, integrated into the read channel or disk controller circuit, or integrated into an SOC.

In one embodiment, the control circuitry comprises a microprocessor executing instructions, the instructions being operable to cause the microprocessor to perform the steps of the flow diagrams described herein. The instructions may be stored in any computer-readable medium. In one embodiment, they may be stored on a non-volatile semiconductor memory external to the microprocessor, or integrated with the microprocessor in a SOC. In another embodiment, the instructions are stored on the disk and read into a volatile semiconductor memory when the disk drive is powered on. In yet another embodiment, the control circuitry comprises suitable logic circuitry, such as state machine circuitry.