Disk drive using timing loop control signal for vibration compensation in servo loop

Description

BACKGROUND

Disk drives comprise a disk and a head connected to a distal end of an actuator arm which is rotated about a pivot by a voice coil motor (VCM) to position the head radially over the disk. The disk comprises a plurality of radially spaced, concentric tracks for recording user data sectors and servo sectors. The servo sectors comprise head positioning information (e.g., a track address) which is read by the head and processed by a servo control system to control the actuator arm as it seeks from track to track.

FIG. 1 shows a prior art disk format 2 as comprising a number of servo tracks 4 defined by servo sectors 6₀-6_N recorded around the circumference of each servo track. Each servo sector 6_i comprises a preamble 8 for storing a periodic pattern, which allows proper gain adjustment and timing synchronization of the read signal, and a sync mark 10 for storing a special pattern used to symbol synchronize to a servo data field 12. The servo data field 12 stores coarse head positioning information, such as a servo track address, used to position the head over a target data track during a seek operation. Each servo sector 6_i further comprises groups of servo bursts 14 (e.g., N and Q servo bursts), which are recorded with a predetermined phase relative to one another and relative to the servo track centerlines. The phase based servo bursts 14 provide fine head position information used for centerline tracking while accessing a data track during write/read operations. A position error signal (PES) is generated by reading the servo bursts 14, wherein the PES represents a measured position of the head relative to a centerline of a target servo track. A servo controller processes the PES to generate a control signal applied to a head actuator (e.g., a voice coil motor) in order to actuate the head radially over the disk in a direction that reduces the PES.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 shows a prior art disk format comprising a plurality of servo tracks defined by servo sectors.

FIG. 2A shows a disk drive according to an embodiment comprising a head actuated over a disk by a servo loop controlling an actuator (e.g., VCM and/or microactuator).

FIG. 2B shows a servo loop processing a timing signal from a timing loop in order to compensate for a vibration affecting the disk drive according to an embodiment.

FIG. 2C is a flow diagram according to an embodiment wherein the timing signal is filtered with a pre-compensation filter (PCF) comprising an inverse transfer function from a delta in a rotation velocity of the disk (Δω) due to a vibration affecting the disk drive to the timing signal.

FIG. 3A shows an embodiment wherein low frequency noise in the timing signal is attenuated before being processed by the servo loop.

FIG. 3B shows an embodiment wherein a repeatable component (RC) of the timing signal is attenuated before being processed by the servo loop.

FIG. 4A shows an embodiment for attenuating the low frequency noise and the RC of the timing signal before being processed by the servo loop.

FIG. 4B shows an embodiment for attenuating the RC of the timing signal.

FIG. 5 shows a timing loop according to an embodiment wherein the timing signal may be selected from an input to a timing loop compensator or an output of the timing loop compensator.

FIG. 6 shows an embodiment where the servo loop comprises an adaptive finite impulse response (FIR) filter for generating feed-forward compensation based on the filtered timing signal.

DETAILED DESCRIPTION

FIG. 2A shows a disk drive according to an embodiment comprising a disk 16, a head 18, an actuator (e.g., VCM 20 and/or a microactuator), and control circuitry 22 comprising a timing loop 24 (FIG. 2B) configured to generate a clock 26 synchronized to a rotation of the disk 16 and a servo loop 28 configured to control the actuator to actuate the head 18 over the disk 16. The control circuitry 22 is configured to execute the flow diagram of FIG. 2C where a timing signal Xr 30 generated by the timing loop 24 is filtered with a pre-compensation filter (PCF) 32 comprising an inverse transfer function from a delta in a rotation velocity of the disk (Δω) due to a vibration affecting the disk drive to the timing signal Xr (block 34), and the actuator is controlled to actuate the head over the disk based on an output of the PCF (block 36).

In one embodiment, the disk 16 of FIG. 2A may comprise any suitable servo data such as concentric servo sectors as shown in FIG. 1, or spiral servo tracks which may be processed, for example, to servo the head over the disk while writing concentric servo sectors to the disk. The control circuitry 22 may process a read signal 38 emanating from the head 18 to demodulate the servo data and generate a position error signal (PES) 40 representing an error between the actual position 42 of the head and a target position 44 relative to a target track (FIG. 2B). A suitable servo loop compensator 46 processes the PES 40 to generate a control signal 48 applied to the actuator 50 such as the VCM 20 which rotates an actuator arm 52 about a pivot in order to actuate the head 18 radially over the disk 16 in a direction that reduces the PES 40. In one embodiment, the actuator 50 shown in FIG. 2B may also comprise a suitable microactuator, such as a suitable piezoelectric (PZT) element for actuating the head 18 relative to a suspension, or for actuating a suspension relative to the actuator arm 52.

The timing loop 24 of FIG. 2B may generate the clock 26 synchronized to the rotation of the disk 16 in any suitable manner. In one embodiment, the timing loop 24 may generate the clock 26 by measuring a time interval between servo data written on the disk, such as a time interval between consecutive spiral servo track crossings or a time interval between consecutive concentric servo sectors. In another embodiment, the time interval may be measured relative to the bit transitions within the servo data. In one embodiment, the measured interval may be compared to a target interval in order to generate a timing error (phase error) for a phase-locked loop, where the timing error may be used to adjust a frequency of a frequency generator that generates the clock 26 synchronized to the rotation of the disk 16. Once the clock 26 is synchronized, it may be used for any suitable purpose, such as timing when to open a servo gate relative to the servo data written on the disk, timing when to servo write a concentric servo sector, and/or servo write a concentric servo sector at the correct frequency. In another embodiment, the clock 26 may be used to write/read data to data sectors in data tracks on the disk 16 during normal access operations, wherein during read operations the clock 26 may be synchronized when reading a preamble at the beginning of each data sector as well as synchronized when reading user data from a data sector.

The disk drive may be subjected to a vibration (external or internal) that may degrade the ability of the servo loop 28 to maintain the head 18 at a target radial location, for example, when servo writing the disk 16 or when accessing a data track. In one embodiment, a vibration affecting the disk drive may manifest in a timing signal Xr 30 of the timing loop 24. For example, a vibration affecting the disk drive (e.g., a rotational vibration) may affect the rotation velocity of the disk 16 and therefore affect a timing signal Xr 30 in the timing loop 24 such as the above-described timing error (phase error) between a measured interval and a target interval. Accordingly, in one embodiment a timing signal Xr 30 generated by the timing loop 24 is processed by the servo loop 28 in order to help compensate for a vibration affecting the disk drive, thereby improving the performance of the servo loop 28.

In the embodiment of FIG. 2B, the timing signal Xr 30 may not directly represent the vibration affecting the disk drive but rather represents the vibration as it affects the timing signal Xr 30 in a closed loop system. Accordingly, in one embodiment the timing signal Xr 30 is filtered by the PCF 32 shown in FIG. 2B, where the PCF 32 comprises an inverse transfer function from a delta in a rotation velocity of the disk (Δω) due to a vibration affecting the disk drive to the timing signal Xr 30. That is, if Xr=G_AΔω where Δω represents the delta in the rotation velocity of the disk 16 caused by a vibration and G_A represents the transfer function from Δω to the timing signal Xr, then Δω may be estimated based on Xr by multiplying Xr by G_A⁻¹ (inverse of G_A). In this manner, the filtered timing signal Xk at the output of the PCF 32 is a more direct representation of the vibration affecting the rotation velocity of the disk 16. In an embodiment described below, the PCF 32 reduces the complexity of an adaptive FIR filter used to generate feed-forward compensation in the servo loop 28 that compensates for the vibration affecting the disk drive.

In one embodiment, the timing signal Xr 30 of the timing loop 24 shown in FIG. 2B may be affected by more than a vibration affecting the disk drive. For example, in one embodiment the timing signal Xr 30 may comprise low frequency noise due, for example, to imperfections in the spindle motor used to rotate the disk 16. In one embodiment, it may be desirable to attenuate the low frequency noise in the timing signal Xr 30 so that the filtered timing signal Xk better represents the vibration affecting the disk drive. An example of this embodiment is shown in FIG. 3A wherein a high-pass filter (HPF) 54 filters the timing signal Xr 30 so as to attenuate low frequency noise in the timing signal Xr 30. In the embodiment of FIG. 3A, the HPF 54 precedes the PCF 32; however, in another embodiment the HPF 54 may follow the PCF 32 since it is a linear system. The HPF 54 may attenuate noise in the timing signal Xr 30 within any suitable frequency range, such as a frequency range associated with noise induced by the spindle motor.

In one embodiment, the timing signal Xr 30 of the timing loop 24 shown in FIG. 2B may also comprise a repeatable component (RC) due to a disturbance other than the vibration affecting the disk drive. For example, the RC may be due to an eccentricity of the disk 16 due to a non-centric alignment of the disk 16 with the spindle motor, or due to a written-in error of the servo data (or other data) on the disk 16 used to synchronize the clock 26. In one embodiment, it may be desirable to attenuate a RC in the timing signal Xr 30 so that the filtered timing signal Xk better represents the vibration affecting the disk drive. An example of this embodiment is shown in FIG. 3B wherein a RC filter (RCF) 56 filters the timing signal Xr 30 so as to attenuate an RC in the timing signal Xr 30. In the embodiment of FIG. 3B, the RCF 56 precedes the PCF 32; however, in another embodiment the RCF 56 may follow the PCF 32 since it is a linear system.

In one embodiment, the timing signal Xr 30 may be filtered by a combined HPF and RCF in order to attenuate both a low frequency noise and an RC in the timing signal Xr 30. FIG. 4A shows an example of this embodiment where an integrator 58 implements a HPF 54 for attenuating low frequency noise in the timing signal Xr 30. The control circuitry shown in FIG. 4A further comprises a Nx AFC filter 60 which attenuates at least the fundamental (lx disk rotation frequency) of the RC in the timing signal Xr 30 and optionally harmonics (Nx disk rotation frequency) of the RC in the timing signal Xr 30. In one embodiment, the Nx AFC filter comprises one or more sinusoids each having a particular magnitude and phase determined by adaptive coefficients. In one embodiment, the coefficients of the sinusoid(s) are adapted to reduce the amplitude of the timing signal Xr 30, thereby attenuating the RC in the timing signal Xr 30. The control circuitry in the embodiment of FIG. 4A further comprises a DeRC filter 62 which helps to further attenuate a residual RC in the timing signal Xr 30, wherein FIG. 4B shows an example embodiment for the DeRC filter 62 including the transfer function.

FIG. 5 shows an example timing loop 24 according to an embodiment comprising a suitable compensator Ct 64 and a suitable plant Pt 66. The compensator Ct may implement any suitable compensation algorithm, including non-linear algorithms. Similarly any suitable plant Pt 66 may be employed, wherein in the embodiment of FIG. 5 the plant Pt 66 comprises a frequency generator 66A and counter 66B that counts a number of cycles at a frequency f_k over an interval t_k between data recorded on the disk (e.g., servo data). The number of cycles counted over the interval t_k is subtracted from a target number of cycles of a base frequency f₀ counted over a target interval t₀ 68 to generate a timing error Xr1 70. The timing error Xr1 70 is filtered by the timing loop compensator Ct 64 to generate a timing control signal Xr2 72 applied to the frequency generator 66A so as to adjust the frequency f_k until the number of cycles at the frequency f_k counted over the interval t_k equals the target number of cycles of the base frequency f₀ counted over the target interval t₀. In the embodiment of FIG. 5, a vibration induces a delta in the rotation velocity of the disk 16 Δω 75 which induces a timing jitter Δt into the timing loop 24 (where k₀ represents a ratio of Δω to the timing error). This timing jitter Δt affects a timing signal in the timing loop 24 such as the timing error Xr1 70 or the timing control signal Xr2 72.

When the timing signal Xr 30 output by the timing loop 24 in the embodiment of FIG. 2B comprises the timing error Xr1 70 of FIG. 5, the inverse transfer function G_A⁻¹ from Δω 75 to the timing signal comprises:
(1+P_tC_t)·k
where P_t represents a transfer function of the frequency generator 66A of the timing loop, C_t represents a transfer function of the compensator 64 of the timing loop 24, and k is a constant (e.g., in the embodiment shown in FIG. 5 k=1/k₀f₀). When the timing signal Xr 30 output by the timing loop 24 in the embodiment of FIG. 2B comprises the timing control signal Xr2 72 of FIG. 5, the inverse transfer function G_A⁻¹ from Δω75 to the timing signal comprises:
(1+P_tC_t)·k/C_t
Accordingly, in one embodiment the PCF 32 of FIG. 2B comprises the appropriate transfer function such as described above depending on which timing signal Xr 30 in the timing loop 24 is evaluated (where any suitable timing signal may be evaluated).

The filtered timing signal Xk of FIG. 2B may be processed by the servo loop 28 in any suitable manner to compensate for a vibration affecting the disk drive. FIG. 6 shows an embodiment wherein the filtered timing signal Xk is filtered by an adaptive FIR filter 76 in order to generate feed-forward compensation 78 that compensates for a vibration 74 affecting the disk drive. The vibration 74 induces a disturbance d 82 into the servo loop 28, wherein the disturbance d 82 has an unknown transfer function G1 80A relative to the amplitude of the vibration 74. The vibration 74 also affects the timing loop 24 (relative to a transfer function G2 80B) which manifests in the timing signal Xr 30. The timing signal Xr 30 is filtered by a filter Ds 84 which may comprise a high-pass filter (HPF) and a repeatable component filter (RCF) such as described above with reference to FIG. 4A. The timing signal Xr 30 is further filtered by the pre-compensation filter (PCF) 32 in order to account for the transfer function of the timing loop from a delta in the rotation velocity of the disk (Δω) due to the vibration 74 affecting the disk drive to the timing signal Xr 30. The filtered timing signal Xk is filtered by the adaptive FIR filter 76 to generate the feed-forward compensation 78 that compensates for the vibration 74 (compensates for the disturbance d 82 affecting the servo loop 28).

In one embodiment, the FIR filter 76 of FIG. 6 is adapted according to a Filtered-X Least Mean Square (LMS) algorithm 86 with attempts to minimize E(e_k²). With the adaptive FIR filter 76 having coefficients W_k, the LMS algorithm 86 may adapt the coefficients W_k according to:
W_k+1=W_k+u X_ke_k
where μ represents a learning coefficient, X_k represents the filtered timing signal Xk after being filtered by filter G_TRC 88 (torque rejection curve of the servo loop 28), and e_k represents a servo loop error signal (such as the PES 40). In one embodiment, using a PCF 32 to account for the timing loop transfer function from Δω to the timing signal Xr 30 helps reduce the complexity of the adaptive FIR filter 76 by reducing the number of coefficients W_k as well as reducing the computation time of the LMS algorithm 86 to update the coefficients W_k. In other words, without a PCF 32 the transfer function of the FIR filter 76 would need to include the transfer function of the PCF 32, thereby increasing the complexity as well as the adaptive computation time. In one embodiment, adapting the FIR filter 76 compensates for an error in computing or measuring the transfer function of the PCF 32.

Although the embodiment of FIG. 6 shows a Ds filter 84 separate from the PCF 32, in another embodiment the transfer functions of these filters may be combined into a single filter. In other words, in addition to an inverse transfer function from a delta in a rotation velocity of the disk (Δω) due to a vibration affecting the disk drive to the timing signal, the PCF 32 may also comprise other transfer functions such as a band-pass filter (BPF) transfer function and/or a high-pass filter (HPF) transfer function. In addition, in the embodiment of FIG. 6 the feed-forward compensation generates a torque (acceleration) control signal applied to the actuator 50. Assuming the vibration 74 causes an unknown acceleration of the disk, there is a resulting delta in the rotation velocity of the disk Δω75 (FIG. 5) that can be estimated from the timing signal generated by the timing loop. Therefore in one embodiment the PCF 32 may comprise a differentiator in order to transform the timing signal Xr 30 from a velocity to an acceleration. That is, in one embodiment the PCF 32 may comprise a transfer function G_A⁻¹G₂⁻¹, where G₂ represents a transfer function from acceleration to velocity.

The inverse transfer function G_A⁻¹ of the PCF 32 as well as the transfer function for G₂ may be determined in any suitable manner. In one embodiment, the inverse transfer function G_A⁻¹ and/or the transfer function G₂ may be determined theoretically based on known or estimated parameters of the timing loop 24. In another embodiment, the inverse transfer function G_A⁻¹ and/or the transfer function G₂ may be determined experimentally using a system identification method, for example, by monitoring the input to the PCF 32 relative to the effect on the PES 40 and then computing a corresponding transfer function that represents G_A⁻¹.

Any suitable control circuitry may be employed to implement the flow diagrams in the above embodiments, such as any suitable integrated circuit or circuits. For example, the control circuitry may be implemented within a read channel integrated circuit, or in a component separate from the read channel, such as a disk controller, or certain operations described above may be performed by a read channel and others by a disk controller. In one embodiment, the read channel and disk controller are implemented as separate integrated circuits, and in an alternative embodiment they are fabricated into a single integrated circuit or system on a chip (SOC). In addition, the control circuitry may include a suitable preamp circuit implemented as a separate integrated circuit, integrated into the read channel or disk controller circuit, or integrated into a SOC.

In one embodiment, the control circuitry comprises a microprocessor executing instructions, the instructions being operable to cause the microprocessor to perform the flow diagrams described herein. The instructions may be stored in any computer-readable medium. In one embodiment, they may be stored on a non-volatile semiconductor memory external to the microprocessor, or integrated with the microprocessor in a SOC. In another embodiment, the instructions are stored on the disk and read into a volatile semiconductor memory when the disk drive is powered on. In yet another embodiment, the control circuitry comprises suitable logic circuitry, such as state machine circuitry.

The various features and processes described above may be used independently of one another, or may be combined in various ways. All possible combinations and subcombinations are intended to fall within the scope of this disclosure. In addition, certain method, event or process blocks may be omitted in some implementations. The methods and processes described herein are also not limited to any particular sequence, and the blocks or states relating thereto can be performed in other sequences that are appropriate. For example, described tasks or events may be performed in an order other than that specifically disclosed, or multiple may be combined in a single block or state. The example tasks or events may be performed in serial, in parallel, or in some other manner. Tasks or events may be added to or removed from the disclosed example embodiments. The example systems and components described herein may be configured differently than described. For example, elements may be added to, removed from, or rearranged compared to the disclosed example embodiments.

While certain example embodiments have been described, these embodiments have been presented by way of example only, and are not intended to limit the scope of the inventions disclosed herein. Thus, nothing in the foregoing description is intended to imply that any particular feature, characteristic, step, module, or block is necessary or indispensable. Indeed, the novel methods and systems described herein may be embodied in a variety of other forms; furthermore, various omissions, substitutions and changes in the form of the methods and systems described herein may be made without departing from the spirit of the embodiments disclosed herein.