Data storage device comprising sequence detector compensating for inter-track interference

Description

BACKGROUND

Data storage devices such as disk drives comprise a disk and a head connected to a distal end of an actuator arm which is rotated about a pivot by a voice coil motor (VCM) to position the head radially over the disk. The disk comprises a plurality of radially spaced, concentric tracks for recording user data sectors and servo sectors. The servo sectors comprise head positioning information (e.g., a track address) which is read by the head and processed by a servo control system to control the actuator arm as it seeks from track to track.

FIG. 1 shows a prior art disk format 2 as comprising a number of servo tracks 4 defined by servo sectors 6₀-6_N recorded around the circumference of each servo track. Each servo sector 6_i comprises a preamble 8 for storing a periodic pattern, which allows proper gain adjustment and timing synchronization of the read signal, and a sync mark 10 for storing a special pattern used to symbol synchronize to a servo data field 12. The servo data field 12 stores coarse head positioning information, such as a servo track address, used to position the head over a target data track during a seek operation. Each servo sector 6_i further comprises groups of servo bursts 14 (e.g., N and Q servo bursts), which are recorded with a predetermined phase relative to one another and relative to the servo track centerlines. The phase based servo bursts 14 provide fine head position information used for centerline tracking while accessing a data track during write/read operations. A position error signal (PES) is generated by reading the servo bursts 14, wherein the PES represents a measured position of the head relative to a centerline of a target servo track. A servo controller processes the PES to generate a control signal applied to a head actuator (e.g., a voice coil motor) in order to actuate the head radially over the disk in a direction that reduces the PES.

Data is typically written to data sectors within a data track by modulating the write current of a write element, for example, using a non-return to zero (NRZ) signal, thereby writing magnetic transitions onto the disk surface. A read element (e.g., a magnetoresistive (MR) element) is then used to transduce the magnetic transitions into a read signal that is demodulated by a read channel. The recording and reproduction process may be considered a communication channel, wherein communication demodulation techniques may be employed to demodulate the read signal.

When reading data from the disk, a read channel typically samples the read signal to generate read signal samples that are equalized according to a target response (e.g., a partial response). A sequence detector (e.g., a Viterbi detector) detects an estimated data sequence from the equalized samples, and errors in the estimated data sequence are corrected, for example, using a Reed-Solomon error correction code (ECC) or using a Low Density Parity Check (LDPC) code.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 shows a prior art disk format comprising a plurality of servo tracks defined by servo sectors.

FIG. 2A shows a data storage device in the form of a disk drive according to an embodiment comprising a head actuated over a disk comprising a plurality of data tracks.

FIG. 2B is a flow diagram according to an embodiment wherein a first data sequence detected from reading a first data track is used to detect a second data sequence when reading a second, adjacent data track.

FIG. 2C illustrates expected samples generated from the first data sequence being used to detect the second data sequence recorded in the second, adjacent data track.

FIG. 3A shows a state transition diagram for an example sixteen state trellis type sequence detector.

FIG. 3B shows an embodiment wherein the branch metrics for the trellis states are generated based on the expected samples generated from the first data sequence.

FIG. 4A shows an embodiment wherein the first data sequence is detected during a first revolution of the disk and the second data sequence is detected during a second revolution of the disk by reading the first and second data tracks using a single read element.

FIG. 4B shows control circuitry according to an embodiment wherein the first data sequence is buffered and then converted into expected samples used by a trellis type sequence detector to detect the second data sequence.

FIG. 4C shows an embodiment wherein the second data sequence is used to detect a third data sequence when reading a third data track.

FIG. 5A shows an embodiment wherein the first data track is read with a first read element and a second data track is read with a second read element during a single revolution of the disk.

FIG. 5B shows control circuitry according to an embodiment wherein a downtrack interference (DTI) trellis type sequence detector is used to detect the first data sequence and a DTI and intertrack interference (ITI) trellis type sequence detector is used to detect the second data sequence.

FIG. 5C shows an embodiment wherein a third data sequence may be detected when reading a third data track using expected samples generated from the second data sequence and using expected samples generated by reading a fourth, adjacent data track.

FIG. 5D shows control circuitry according to an embodiment for detecting the third data sequence using expected samples generated from the second data sequence and using expected samples generated by reading a fourth, adjacent data track.

FIGS. 6A-6D show an embodiment wherein three read elements may be used to read three data tracks at a time, wherein one, two, or three data sequences may be detected during a single revolution of the disk.

DETAILED DESCRIPTION

FIG. 2A shows a data storage device in the form of a disk drive according to an embodiment comprising a head 16 actuated over a disk 18 comprising a plurality of data tracks 20. The disk drive further comprises control circuitry 22 configured to execute the flow diagram of FIG. 2B, wherein a first data track is read (FIG. 2C) to generate a first read signal (block 24), the first read signal is sampled to generate first read signal samples (block 26), a first data sequence is detected based on the first read signal samples (bock 28), and the first data sequence is converted into corresponding first expected samples (block 30). A second data track adjacent the first data track is read (FIG. 2C) to generate a second read signal (block 32), the second read signal is sampled to generate second read signal samples (block 34), and a second data sequence is detected based on the second read signal samples and the first expected samples (block 36).

In the embodiment of FIG. 2A, a plurality of concentric servo tracks are defined by embedded servo sectors 38₀-38_N, wherein the concentric data tracks 20 are defined relative to the servo tracks at the same or different radial density. The control circuitry 22 processes a read signal 40 emanating from the head 16 to demodulate the servo sectors and generate a position error signal (PES) representing an error between the actual position of the head and a target position relative to a target track. The control circuitry 22 filters the PES using a suitable compensation filter to generate a control signal 42 applied to a voice coil motor (VCM) 44 which rotates an actuator arm 46 about a pivot in order to actuate the head 16 radially over the disk 18 in a direction that reduces the PES. The servo sectors 38₀-38_N may comprise any suitable head position information, such as a track address for coarse positioning and servo bursts for fine positioning. The servo bursts may comprise any suitable pattern, such as an amplitude based servo pattern or a phase based servo pattern.

The data is typically recorded in a data track using partial response signaling meaning that the waveform response of each recorded bit overlaps with the waveform response of one or more of the linear adjacent bits resulting in a controlled amount of downtrack interference (DTI) in the read signal (also referred to as intersymbol interference (ISI)). Demodulating the read signal involves sampling the read signal and estimating a data sequence based on the likelihood that the read signal samples correspond to the expected samples of a possible data sequences. To facilitate this demodulation, a trellis type sequence detector is typically employed comprising a state machine that corresponds to the possible data sequences based on the length of the DTI (number of bits affected). FIG. 3A shows an example state transition diagram for a sixteen state trellis that corresponds to a DTI length of four bits. At any given state, a branch metric is computed (e.g., a Euclidean metric) representing a likelihood of the next downtrack bit being a “0” or a “1”. As the bits in the read signal are evaluated, a number of survivor sequences are tracked through the corresponding trellis which eventually merge into a most likely data sequence based on the accumulated branch metrics for each survivor sequence.

As the data tracks 20 are squeezed closer together in an attempt to increase the capacity of the disk 18, the data bits recorded in the adjacent data tracks may induce an intertrack interference (ITI) in the read signal of a target track. Accordingly, in one embodiment a trellis type sequence detector is employed that takes into account the intertrack interference caused by the data sequence recorded in at least one adjacent data track. FIG. 3B illustrates an example embodiment wherein the branch metric (BM) computed for each state of the state transition diagram is computed based on the expected samples of a data sequence detected from an adjacent data track. In this example, the BM is computed as a Euclidean metric:
BM=∥y_l(k)−d_l−αd_l−1∥²
where y_l(k) represents the current read signal sample, d_l represents an expected sample corresponding to the branch, and d_l−1 represents an expected sample corresponding to a bit in a data sequence detected in the adjacent data track preceding the target data track. In an embodiment described below, the BM may also be computed based on an expected sample of a data sequence detected in the adjacent data track following the target data track.

In the above Euclidean metric equation, the expected sample d_l−1 of the adjacent data track is scaled by a scalar α to account for the degree the ITI affects the read signal sample of the target data track as determined by the radial spacing of the adjacent data track relative to the target data track. That is, the scalar α increases as the spacing between the data tracks decreases. In one embodiment, the scalar α may be calibrated during a manufacturing procedure, and/or tuned during normal read operations such as during retry operations. For example, the scalar α may be tuned relative to a suitable quality metric, such as a bit error rate of the sequence detector. In one embodiment, the spacing of the data tracks may vary over the radius of the disk, and/or the spacing between the read elements may change as the skew angle of the head changes, and therefore the scalar α may be calibrated and then configured during normal read operations based on the radial location of the head.

The expected samples of the data sequence detected in an adjacent data track may be generated in any suitable manner. In one embodiment shown in FIG. 4A, the head 16 comprises a single read element that may be positioned over a first data track during a first revolution of the disk 18. As shown in FIG. 4B, a DTI trellis type sequence detector 48 may process the resulting read signal samples to detect a first data sequence that is stored in a buffer 50. In this embodiment, the ITI of the adjacent data tracks is not accounted for by the DTI trellis type sequence detector 48 since the data sequence of the adjacent data tracks is unknown. Accordingly, it may require multiple revolutions of the disk 18 in order to accurately detect the first data sequence using any suitable data recovery technique, such as tuning read channel parameters, averaging the read signal samples of multiple disk revolutions, or employing track level redundancy (e.g., a parity data sector).

Once the first data sequence of the first data track is accurately detected and stored in the buffer 50, the read element is positioned over a second data track during a second revolution of the disk 18 and the resulting read signal samples are processed by a DTI and ITI trellis type sequence detector 48. The first data sequence is read from the buffer 50 and converted at block 52 into corresponding expected samples processed by the DTI and ITI trellis type sequence detector 48 to generate the branch metrics such as described above with reference to FIG. 3B. Because the ITI is taken into account when reading the second data track, the accuracy of the detected data sequence improves leading to fewer revolutions needed to recover the recorded data (i.e., the recorded data may be recovered from the second data track typically within a single disk revolution).

In one embodiment, data may be recorded on the disk in a long sequence of consecutive data tracks, such as when recording streaming data or other large data files. Accordingly, when reading the consecutive data tracks the data sequence detected in a preceding data track may be converted into expected samples and used to detect the data sequence recorded in a current data track. This embodiment is illustrated in FIG. 4C wherein after detecting the data sequence recorded in the second data track using the expected samples of the first data track, the head 16 may be positioned over a third, consecutive data track. The data sequence detected in the second data track may then be converted into corresponding expected samples and processed by the DTI and ITI trellis type sequence detector 48 to detect the data sequence recorded in the third data track. This process may be repeated while reading each new consecutive data track.

The detected data sequence stored in the buffer 50 of FIG. 4B may be converted into the corresponding expected samples at block 52 in any suitable manner. In one embodiment, the expected samples may be generated by filtering the detected data sequence with the target partial response of the read channel. The resulting expected samples represents the response of a noiseless read channel to the recorded data sequence. In other embodiments, the expected samples may be generated by processing the detected data sequence using a state transition diagram such as shown in FIG. 3A.

FIG. 5A shows an embodiment wherein the head 16 comprises a first read element positioned over a first data track and a second read element positioned over a second data track. A first read signal emanating from the first read element is sampled to generate first read signal samples processed by a DTI trellis type sequence detector 54 (FIG. 5B) configured to detect a first data sequence that is converted by block 56 into corresponding expected samples. A second read signal emanating from the second read element is sampled to generate second read signal samples processed by a DTI and ITI trellis type sequence detector 58 to detect a second data sequence. The DTI and ITI trellis type sequence detector 58 also processes the expected samples of the first data sequence to compensate for the ITI of the first data track. In the embodiment of FIG. 5B, the second read signal samples are buffered 60 to account for the delay in detecting the first data sequence. That is, the DTI trellis type sequence detector 54 has a detection delay before the survivor sequences of the trellis merge into a single survivor sequence, and therefore the buffer 60 provides a corresponding delay in the second read signal samples before being input into the DTI and ITI trellis type sequence detector 58.

In one embodiment, the DTI trellis type sequence detector 54 may be less accurate since it does not compensate for the ITI of the second data track. Therefore there may be errors in the first data sequence that may reduce the accuracy of the DTI and ITI trellis type sequence detector 58 since the corresponding expected samples will be incorrect. Accordingly, in one embodiment the DTI trellis type sequence detector 54 may output a quality metric (soft decision) with each bit detected in the first data sequence, where the quality metric indicates a likelihood as to whether the detected bit in the first data sequence is correct. When the quality metric is below a threshold, in one embodiment the scalar α for generating the branch metric in the DTI and ITI trellis type sequence detector 58 may be set to zero so that the expected sample does not affect the branch metric calculation.

In one embodiment, the recorded data in both the first and second data tracks of FIG. 5A may be accurately detected during a single revolution of the disk. That is, the DTI trellis type sequence detector 54 may operate well enough so that the first data sequence is accurately detected even though the ITI from the second data track is not compensated. However if the first data sequence cannot be accurately detected during the first revolution of the disk, whereas the second data sequence is accurately detected due to compensating for the ITI from the first data track, in one embodiment the second data sequence may be used to recover the first data sequence during a second revolution of the disk. That is, during a second revolution of the disk the second data sequence is converted into corresponding expected samples processed by a DTI and ITI trellis type sequence detector configured to detect the first data sequence representing the data recorded in the first data track.

FIG. 5C illustrates an embodiment wherein after detecting the data recorded in the second data track, the first read element may be positioned over a third data track and the second read element may be positioned over a fourth data track. The second data sequence may be stored in buffer 62 and converted into expected samples by block 64. A DTI trellis type sequence detector 66 may process the read signal samples from the fourth data track to generate a fourth data sequence converted into expected samples by block 68. A DTI and ITI trellis type sequence detector 70 processes the read signal samples of the third data track (after being delayed by buffer 72) as well as the expected samples corresponding to the detected data sequences of the adjacent data tracks (the second and fourth data tracks) in order to detect a corresponding third data sequence. In one embodiment, the branch metric of the DTI and ITI trellis type sequence detector 70 is computed based on:
BM=∥y_l(k)−d_l−αd_l−1−βd_l+1∥²
where y_l(k) represents the current read signal sample, d_l represents an expected sample corresponding to the branch, d_l−1 represents an expected sample corresponding to a bit in a data sequence detected in the adjacent data track preceding the target data track (second data track), and d_l+1 represents an expected sample corresponding to a bit in a data sequence detected in the adjacent data track following the target data track (fourth data track). The scalar β is configured to account for the radial spacing of the adjacent data track and may be calibrated similar to the scalar α as describe above.

In one embodiment, the data recorded in both the third and fourth data tracks of FIG. 5C may be accurately detected during a single revolution of the disk. In another embodiment, if one of the data sequences is unrecoverable during a first revolution, whereas the other data sequence is recoverable during the first revolution, the recovered data sequence may be used during a second revolution to assist in accurately detecting the other data sequence using the DTI and ITI trellis type sequence detector. Accordingly, in one embodiment the throughput of the disk drive may be as high as two data tracks read for each disk revolution.

FIG. 6A shows an embodiment wherein the head comprises a first read element positioned over a first data track, a second read element positioned over a second data track, and a third read element positioned over a third data track. During a first revolution of the disk, DTI trellis type sequence detectors may be used to detect a first data sequence from the first data track and a second data sequence from third data track. Both of these sequences may then be converted into expected samples used by a DTI and ITI trellis type sequence detector to detect a third data sequence from the second data track. Similar to the embodiment described above, the data sequences may be accurately detected for one or more of the data tracks, wherein the accurately detected data sequences may be used to detect the other data sequences during subsequent revolutions of the disk.

FIG. 6B shows an embodiment wherein the data sequences for the first and second data tracks have been accurately recovered. The first read element is positioned over the third data track, the second read element is positioned over the fourth data track, and the third read element is positioned over the fifth data track. During a second revolution of the disk, the data sequence detected from the second data track, as well as the data sequence detected from the fourth data track may be converted into expected samples and used to detect the data sequence in the third data track. A DTI trellis type sequence detector may also attempt to detect a data sequence from the fifth data track, which may be converted into expected samples and used to detect the data sequence in the fourth data track.

FIG. 6C shows an embodiment wherein the data sequences for the third and fourth data tracks are accurately detected during the second revolution (FIG. 6B), and therefore the read elements are shifted down by two data tracks for the next revolution. FIG. 6D shows an embodiment wherein the data sequences for the third, fourth, and fifth data tracks are accurately detected during the second revolution (FIG. 6B), and therefore the read elements are shifted down by three data tracks for the next revolution. Accordingly in this embodiment the throughput of the disk drive may be as high as three data tracks read for each disk revolution.

Any suitable control circuitry may be employed to implement the flow diagrams in the above embodiments, such as any suitable integrated circuit or circuits. For example, the control circuitry may be implemented within a read channel integrated circuit, or in a component separate from the read channel, such as a disk controller, or certain operations described above may be performed by a read channel and others by a disk controller. In one embodiment, the read channel and disk controller are implemented as separate integrated circuits, and in an alternative embodiment they are fabricated into a single integrated circuit or system on a chip (SOC). In addition, the control circuitry may include a suitable preamp circuit implemented as a separate integrated circuit, integrated into the read channel or disk controller circuit, or integrated into a SOC.

In one embodiment, the control circuitry comprises a microprocessor executing instructions, the instructions being operable to cause the microprocessor to perform the flow diagrams described herein. The instructions may be stored in any computer-readable medium. In one embodiment, they may be stored on a non-volatile semiconductor memory external to the microprocessor, or integrated with the microprocessor in a SOC. In another embodiment, the instructions are stored on the disk and read into a volatile semiconductor memory when the disk drive is powered on. In yet another embodiment, the control circuitry comprises suitable logic circuitry, such as state machine circuitry.

While the above examples concern a disk drive, the various embodiments are not limited to a disk drive and can be applied to other data storage devices and systems, such as magnetic tape drives, solid state drives, hybrid drives, etc. In addition, some embodiments may include electronic devices such as computing devices, data server devices, media content storage devices, etc. that comprise the storage media and/or control circuitry as described above.

The various features and processes described above may be used independently of one another, or may be combined in various ways. All possible combinations and subcombinations are intended to fall within the scope of this disclosure. In addition, certain method, event or process blocks may be omitted in some implementations. The methods and processes described herein are also not limited to any particular sequence, and the blocks or states relating thereto can be performed in other sequences that are appropriate. For example, described tasks or events may be performed in an order other than that specifically disclosed, or multiple may be combined in a single block or state. The example tasks or events may be performed in serial, in parallel, or in some other manner. Tasks or events may be added to or removed from the disclosed example embodiments. The example systems and components described herein may be configured differently than described. For example, elements may be added to, removed from, or rearranged compared to the disclosed example embodiments.

While certain example embodiments have been described, these embodiments have been presented by way of example only, and are not intended to limit the scope of the inventions disclosed herein. Thus, nothing in the foregoing description is intended to imply that any particular feature, characteristic, step, module, or block is necessary or indispensable. Indeed, the novel methods and systems described herein may be embodied in a variety of other forms; furthermore, various omissions, substitutions and changes in the form of the methods and systems described herein may be made without departing from the spirit of the embodiments disclosed herein.