Electronic system with data management mechanism and method of operation thereof

Description

CROSS-REFERENCE TO RELATED APPLICATION

This application claims the benefit of U.S. Provisional Patent Application Ser. No. 61/992,405 filed May 13, 2014, and the subject matter thereof is incorporated herein by reference thereto.

TECHNICAL FIELD

An embodiment relates generally to an electronic system, and more particularly to a system for data management.

BACKGROUND

Modern consumer and industrial electronic devices require storage of information, such as digital photographs, electronic mail, calendar, or contacts. These devices can be electronic systems, such as notebook computers, desktop computers, servers, televisions, and projectors, and are providing increasing levels of functionality to support modern life. Preserving the user data stored in the storage devices is of the utmost importance.

Different approaches have been used to monitor the general condition of the stored data. Each of these processes must include a monitoring process that can verify all of the data has been written correctly and will be available for the user whenever it is called back-up. The logistics for such a process can be burdensome and time consuming. In some cases the data can have a limited life span and must be regenerated in order to preserve it for future use.

Many of these data preservation processes can consume time, device resources, and can wear components of the device. The cost associated with the data preservation processes must be mitigated in order to balance the device availability and the protection of the data stored there. Since the preservation of the data is the primary task of the device, availability of the interface functions for retrieving or storing data can be a primary focus and sometime to the detriment of the physical device, such as head wear, media damage, or component failures.

BRIEF DESCRIPTION OF THE DRAWINGS

FIGS. 1A, 1B, and 1C show an operational diagram of an electronic system with data management according to one of the embodiments.

FIG. 2 provides an exemplary layout of a sector group mechanism in an embodiment.

FIG. 3 is an exemplary layout of a data track in an embodiment.

FIG. 4 provides an operational block diagram of one of the embodiments of a data management system.

FIG. 5 is a block diagram of a data management mechanism according to an alternative embodiment.

DETAILED DESCRIPTION

Storage systems can include storage devices, such as hard disk drives (HDD), solid state drives (SSD), hybrid drives, and optical storage devices. In order to maintain data integrity many of the storage devices perform off-line or background data verification and maintenance processes. These processes are typically interleaved with interface operations in order to minimize the latency seen by the storage system host.

While the background scan activity is extremely beneficial, it nevertheless contributes to head wear and increased power consumption. Contemporary HDDs have shown over 60% of failed drives are due to head wear, as a result of excessive usage. As a result, a trade-off must be made in order to strike a balance between maintaining data integrity and over usage.

Some embodiments solve at least this problem by using the actual user reads in place of the background scan, thereby minimizing the needs to actually doing background scan. This mechanism can therefore reduce the need to excessively scan the disk while in idle, thus extending the longevity of the HDD by minimizing head wear/damage caused by the background scan. Further embodiments can also utilize system access, such as reserved space or boot sectors, without the need for background scan in the system spaces.

A need still remains for an electronic system as various embodiments with data management mechanism for providing reliable data while not prematurely wear-out the head. In view of the ever-increasing commercial competitive pressures, along with growing consumer expectations and the diminishing opportunities for meaningful product differentiation in the marketplace, it is increasingly critical that answers be found to these problems. Additionally, the need to reduce costs, improve efficiencies and performance, and meet competitive pressures adds an even greater urgency to the critical necessity for finding answers to these problems.

Solutions to these problems have been long sought but prior developments have not taught or suggested any solutions and, thus, solutions to these problems have long eluded those skilled in the art.

Certain embodiments have other steps or elements in addition to or in place of those mentioned above. The steps or elements will become apparent to those skilled in the art from a reading of the following detailed description when taken with reference to the accompanying drawings.

The following embodiments are described in sufficient detail to enable those skilled in the art to make and use the various embodiments. It is to be understood that other embodiments would be evident based on the present disclosure, and that system, process, or mechanical changes can be made without departing from the scope of an embodiment.

In the following description, numerous specific details are given to provide a thorough understanding of the various embodiments. However, it will be apparent that the various embodiments can be practiced without these specific details. In order to avoid obscuring an embodiment, some well-known circuits, system configurations, and process steps are not disclosed in detail.

The drawings showing embodiments of the system are semi-diagrammatic, and not to scale and, particularly, some of the dimensions are for the clarity of presentation and are shown exaggerated in the drawing figures. Similarly, although the views in the drawings for ease of description generally show similar orientations, this depiction in the figures is arbitrary for the most part. Generally, the various embodiments can be operated in any orientation.

Referring now to FIGS. 1A, 1B, and 1C, therein are shown an operational diagram of an electronic system 100 according to an embodiment. The electronic system 100 can represent an apparatus for one various embodiments. An embodiment depicted in FIGS. 1A, 1B, and 1C is shown as a hard disk drive, as an example, although it is understood that the electronic system 100 as the embodiment can be a tape drive, a solid-state hybrid disk drive, or other magnetic media-based storage device. Further for example, the electronic system 100 can represent a desktop computer, a notebook computer, a server, a tablet, a television, a household appliance, or other electronic systems utilizing magnetic media storage.

In an embodiment the electronic system 100 includes a head 102 flying over a media 104. The head 102 can be mounted to a flex arm 118 attached to an actuator arm 122. The head 102 (FIG. 1B) can optionally include a laser 106 for heating the media 104 during part of a write process (e.g., the head is part of an Energy-Assisted Magnetic Recording (EAMR) drive). The flying height 108 can be adjusted (e.g., by use of a heater element in the head not shown in FIG. 1B) while writing data to the media 104 or as an error recovery process during reading from the media 104. Also in an embodiment of FIG. 1B, the head 102 comprises a write element 110 (e.g., an inductive coil) and a read element 112 (e.g., a magnetoresistive read element).

The media 104 is a structure for storing information. For example, the media 104 can be made of an aluminum alloy, ceramic/glass, or a similar non-magnetic material. The top and bottom surfaces of the media 104 can be covered with magnetic material deposited on one or both sides of the media 104 to form a coating layer capable of magnetization. As an example, the media 104 can be a disk platter for one embodiment of the electronic system 100 as a rotating storage system, such as a hard disk drive (HDD). As a further example, the media 104 can be a linear magnetic strip for one embodiment of the electronic system 100 as a linear storage system, such as a tape drive.

The laser 106, as an example, can be a laser diode or other solid-state based lasers. In addition, embodiments can employ any suitable techniques for focusing the laser 106 on the media 104, such as a suitable waveguide, magnifying lens, or other suitable optics. The laser 106 is increased to a write power in order to heat the disk, thereby decreasing the coercivity of the media 104 so that the data is written more reliably.

The spindle motor 114 can rotate the media 104, about a center of the media 104, at constant or varying speed 107. For illustrative purposes, the spindle motor 114 is described as a motor for a rotation, although it is understood that the spindle motor 114 can be other actuating motors for a tape drive, as an example.

As examples, a head actuation motor 130 can be a voice coil motor assembly, a stepper motor assembly, or a combination thereof. The head actuation motor 130 can generate a torque or force for positioning the head 102.

A tapered end of the flex arm 118 can include the head 102. The flex arm 118 can be mounted to the actuator arm 122, which is pivoted around a bearing assembly 126 by the torque generated by the head actuation motor 130. The head 102 can include a single instance of the write element 110 and a single instance of the read element 112 that is narrower than the write element 110. The head 102 can fly over the media 104 at a dynamically adjustable span of the flying height 108, which represents a vertical displacement between the head 102 and the media 104. The head 102 can be positioned by the flex arm 118 and the actuator arm 122 and can have the flying height 108 adjusted by control circuitry 138.

The head 102 can be positioned over the media 104 along an arc shaped path between an inner diameter of the media 104 and outer diameter of the media 104. For illustrative purposes, the actuator arm 122 and the head actuation motor 130 are configured for rotary movement of the head 102. The actuator arm 122 and the head actuation motor 130 can be configured to have a different movement. For example, the actuator arm 122 and the head actuation motor 130 could be configured to have a linear movement resulting in the head 102 traveling along a radius of the media 104.

The head 102 can be positioned over the media 104 to create magnetic transitions or detect magnetic transitions from the coating layer that can be used to representing written data or read data, respectively. The position of the head 102 and the speed 107 of the media 104 can be controlled by the control circuitry 138. Examples of the control circuitry 138 can include a processor, an application specific integrated circuit (ASIC) an embedded processor, a microprocessor, a hardware control logic, a hardware finite state machine (FSM), a digital signal processor (DSP), digital circuitry, analog circuitry, optical circuitry, or a combination thereof. The control circuitry 138 can also include memory devices, such as a volatile memory, a nonvolatile memory, or a combination thereof. For example, the nonvolatile storage can be non-volatile random access memory (NVRAM) or Flash memory and a volatile storage can be static random access memory (SRAM) or dynamic random access memory (DRAM).

A system interface 140 can couple the control circuitry 138 to a host electronics (not shown). The system interface 140 can transfer user data 142 between the host electronics and the control circuitry 138. The user data 142 can be encoded or decoded by the control circuitry 138 in preparation for transfer to or from the media 104.

The control circuitry 138 can be configured to control the spindle motor 114 for adjusting the speed 107 of the media 104. The control circuitry 138 can be configured to cause the head 102 to move relative to the media 104, or vice versa. The media 104 can include a plurality of servo tracks 113 that allow the control circuitry to control the positioning of the head 102 relative to data tracks 116. The control circuitry 138 can also be configured to control the flow of information to the head 102 for writing to the data tracks 116 of the media 104. The information sent to the head 102 can include the preconditioning pattern, direct current erase signals, user data, or a combination thereof.

In one embodiment, the electronic system 100 further comprises control circuitry 138 configured to execute the flow diagrams of FIG. 1C. As an example, blocks 144 to 150 can represent the flow diagram where an embodiment is employing a data management mechanism for maintaining data integrity.

Block 144 shows flying a head over a media for execution by the electronic system 100, such as a manufacturing test fixture, a hard disk drive, a tape drive, a hybrid drive, or an optical drive.

Block 146 shows executing a read command for reading data by the head. The read command can be any interface read command issued through the system interface 140 for execution by the electronic system 100.

Block 148 shows monitoring a data condition indicator of the data. This action may help determine robustness of the data accessed, including for example, whether data required any correction operations, the length of any bit corrections, how many iterations of correction was required, whether the data accessed by the read command is likely to degrade by the time it is accessed by future read commands. In one embodiment, the data that are read through the system interface 140 (e.g., a data track 116 or any portion thereof) and do not require any corrective action (e.g., read the data) are logged as scanned, so a background process does not repeat the reading of such data unnecessarily.

Block 150 shows providing the data and the data condition indicator for use by the control circuitry. The use may include, for example, determining what blocks of the used capacity must be checked for data integrity. While the background scan process can disposition the blocks that show signs of errors or require correction to be read correctly, the data that were correctly read in block 146 without correction are, in one embodiment, not readdressed by the background scan process.

It has been discovered that an embodiment of the electronic system 100 can improve manufacturing yield. The electronic system 100 can provide a holistic view of the robustness of the data written to the data tracks 116 of the media 104. Any data that shows susceptibility to data errors or requires bit corrections can be mapped through the scanned table in order to identify possible weak areas of the media 104. This holistic view can be an early predictor of problems that can occur as the electronic system 100 is used in the field.

An embodiment can be implemented in firmware to select the scanned table from the non-volatile memory on power-on for analyzing the holistic view of the user data stored in the electronic system 100.

Referring now to FIG. 2, therein is shown an exemplary layout of a sector group mechanism 201 in an embodiment. The exemplary layout of the sector group mechanism 201 depicts the media 104 having a plurality of sector groups 202 partitioned adjacent to each other across the surface of the media 104.

In one embodiment, the media 104 can be partitioned into a plurality of sector groups 202, which can also be referred to as zones, zip codes, data pages, super blocks, or bulk pages. By way of an example, five of the sector groups 202 are shown although it is understood that the entire capacity of the media 104 can be divided into the sector groups 202. Each of the sector groups 202 can comprise one or more of the data tracks 116 of FIG. 1A of the media 104, or just a portion of a data track 116. Although five of the sector groups 202a-e are shown for ease of discussion, it is understood that the media 104 can include any number of sector groups 202.

In one embodiment, each of the sector groups 202 comprises four of the data tracks 116, which can reduce the total number of the sector groups 202 managed by the control circuitry 138 of FIG. 1A. It is understood that the number of the data tracks 116 included in the sector groups 202 can differ, although each of the sector groups includes the same number of the data tracks 116. It is further understood that a sector group 202 can include only a portion of the data track 116.

To protect the data integrity in the sector groups 202, the control circuitry 138 can perform a refresh process on each of the sector groups 202, by reading all or substantially of the data tracks 116 within the sector groups 202 to determine whether the data tracks 116 need to be rewritten or relocated. The process of refreshing the data tracks 116 can include re-writing the contents of the data tracks 116 at the existing location or moving the data within the data tracks 116 to a new physical location. In one embodiment, the control circuitry 138 can increase refresh frequency for a particular one of the sector groups 202 when the control circuitry 138 detects an event that contributes to data degradation in the sector groups 202.

The control circuitry 138 can use the refresh process to maintain the integrity of the data stored in the sector groups 202. While the operation of the electronic system 100 proceeds, the system interface 140 can be reading the contents of the data tracks 116 within one or several of the sector groups 202. Since these sector groups 202 have been verified by the executing the read commands, any sector groups 202 that contain the data tracks 116 that are error free can be marked as having been refreshed, without performing additional checks.

It is understood that the control circuitry 138 can establish a threshold of minor error correction that can be applied to the data tracks 116, which are accessed through the system interface 140, without risk of corruption of the data within the data tracks 116. In these cases, the data tracks are considered to be error free. In the event the data tracks 116, which are accessed through the system interface 140, degrade and need additional levels of error correction, the individual data sectors within the data tracks 116 can be flagged as suspect, for later analysis by the refresh process.

Referring now to FIG. 3, therein is shown an exemplary layout of a data track 301 in an embodiment. The exemplary layout of a data track 301 can be substantially the same as one of the data tracks 116 of FIG. 1A.

In an embodiment, the sector groups 202 of FIG. 2 can include at least one of the data tracks 116, when a data access command is received through the system interface 140 of FIG. 1A accesses a portion of the data tracks 116, the control circuitry 138 of FIG. 1A can also read data from the portion of the data track 301 not being accessed by the data access command. By way of an example, the data access command, such as a read command, can access a portion 310 of the data track 301. In this example, the control circuitry 138 can extend the lengths of the pre-read 305, post-read 315, or a combination thereof of the track to cover the entirety of the data track 301. The pre-read 305 can correspond to rotation of the media 104 to position the head 102 at the portion 310 of the track being accessed by the data access command. The post-read 315 can correspond to rotation of the media 104 after the portion 310 of the track being accessed by the access command. In this embodiment, the control circuitry 138 can read data during the pre-read 305 and post-read 315 to determine the condition of this particular one of the sector groups 202.

Various embodiments incorporate the rotational latency of the media 104 associated with positioning the head 102 at the portion 310 of the track being accessed by the data access command to access the entire track. In this embodiment, the rotational position optimization (RPO) algorithm can take into account that the pre-read 305 and/or post-read 315 are extended to cover the entire track when ordering the data access command with other commands. For the example of a read command, the control circuitry 138 can extend the pre-read 305 and/or the post-read 315 before and after the portion 310 being requested by the read command to read the entirety of the data track 301.

After reading data from the sector groups 202, the control circuitry 138 uses the read data to determine the condition of the data in the sector groups 202, and thus whether this particular one of the sector groups 202 needs to be refreshed. The control circuitry 138 can use the read data to determine the condition of the data in the sector groups 202 based on one or more of the following indicators: error correct code (ECC) symbol errors in the read data, decoding information related to low-density parity check codes, circular redundancy codes (CRC) or other error correction/detection methods, or other similar indicators related to the read process.

In an embodiment, if the control circuitry 138 determines that the condition of the data in the sector groups 202 is bad, then the control circuitry 138 can schedule the sector groups 202 for refresh. In this case, the control circuitry 138 can refresh the sector groups 202 using the data already read, e.g., due to host command(s), from the sector groups 202 to determine the condition of the sector groups 202. If the control circuitry 138 determines that the condition of the data in the sector groups 202 is good, then the control circuitry 138 can mark the status of the sector groups 202 as having been refreshed. The distinction between good and bad sector groups may be based, at least in part, on a comparison of (1) an indicator based on data collected as part of the execution of host read commands and (2) adjustable and/or pre-defined threshold(s).

In an embodiment, if the control circuitry 138 checks the condition of the sector groups 202 in response to a host read command, then the control circuitry 138 sends the portion of the read data corresponding to the data requested by the host read command to the host. The control circuitry 138 can maintain the rest of the contents of the data track 301 in a memory structure for access by subsequent data access commands.

It has been discovered that the control circuitry 138 can reduce the amount of time associated with data verification through the refresh process by extending a data access command received through the system interface 140 to include an entire data track 301 or an entire one of the sector groups 202. In instances where the sector groups 202 include multiple of the data tracks 116, they can be configured in a cylinder configuration so the sector groups 202 can be spread across multiple units of the head 102. This configuration can minimize the repositioning of the heads 102 when reading the entirety of the sector groups 202.

Referring now to FIG. 4, therein is shown an operational block diagram of an embodiment of a data management system 401. In one embodiment, the control circuitry 138 of FIG. 1A may include some or all of the components shown in the data management system 401. The operational block diagram of the embodiment of the data management system 401 depicts a read command 402, which can be received through the system interface 140 of FIG. 1A. Statistics can verify that over seventy percent of the commands received through the system interface 140 are read commands.

While the large majority of the read commands 402 are successfully completed without the use of error correction, some sectors can only be recovered with a correction level exceeding a threshold, which indicates that if the read were executed in the factory, the sector would have been deemed unacceptable. If those sectors can be identified while being read to fulfill a command received through the system interface 140, they can be isolated and analyzed for potential failures before data corruption can occur. Since the identification of the sector is being done while executing the read command 402 through the system interface 140, it also achieves the second screening for drive data integrity, thereby eliminating the needs to run yet another scan of the same sectors while in idle mode and minimizing wear of the head 102 of FIG. 1B.

In one embodiment, some or all of the content of the media 104 of FIG. 1A can be divided into a number of sector groups 202 of FIG. 2 for tracking the data integrity of the data tracks 116 of FIG. 1A within the sector groups 202. The sector group 202 concept can be used for accounting of the logical block address in the total accessible capacity including high capacity configurations of the electronic system 100. By way of an example the sector group 202 can include four full units of the data tracks 116 of data, which can contain approximately 4 MB of data. It is understood that the sector groups 202 can include a different number of the data tracks 116.

In one embodiment, a read command discriminator 404 can be part of a command execution 406. The read command discriminator 404 keeps track of the read commands 402 issued through the system interface 140. When the read covers the entire range of the sector group 202, a status bus 408 will update a sector group status 410 as the sector group 202 having been “Read”. In one embodiment, a background scan 412 will not execute a read scan in any of the sector groups 202 until the read flag is cleared by any of the data tracks 116 in the sector groups 202 being written.

In one embodiment, when a sector requires a level of error correction in excess of a threshold it is identified as a potential risk by a suspect logical block address (LBA) identifier 414. The suspect LBA identifier 414 is loaded into an action required memory 416 during the read command 402. The action required memory 416, such as a FIFO, can be deep enough to accommodate 1-data-track worth of sectors, though the size can vary in various embodiments.

Upon completion of the read command 402, the information in the action required memory 416 will be loaded into a volatile memory such as a DRAM. In one embodiment, the content of the volatile memory is regularly flushed to the reserve capacity of the media 104 (or some other non-volatile memory such as solid-state memory) to protect from unexpected power loss. In some embodiments, the suspect LBA identifier 414 may be loaded directly into a volatile memory such as a DRAM that is used by the control circuitry 138 without going through an action required memory.

In one embodiment, in real-time the system interface 140 can receive the read command 402 normally while the read command discriminator (RCD) 404 tracks range of LBAs and identifies whether an entire range of a specific one of the sector groups 202 had been completely covered. The RCD 404, in its simplest form in an embodiment, can be a single thread design where it can only track consecutive read commands 402 such as a sequential read. When the sequential operations of the read commands 402 covers any of the sector groups 202, the sector groups 202 can be marked as “Read.” In addition, in one embodiment, the RCD 404 can take into account any pre-/post-read activities previously shown in FIG. 3.

In one embodiment, the RCD 404 can track multiple threads. In this case, it tracks multiple strings of the read commands 402 that can cover several of the sector groups 202 at the same time. By way of example, the RCD 404 can track history of the successive instances of the read commands 402 with a reasonable amount of depth in order to discriminate the pattern of the read commands 402 in order to identify the sector groups 202 to enter into the sector group status 410. This operation can be protected from unexpected power loss, meaning the information can be stored in the reserve capacity of the media 104 with frequent updates in order to be effective. When the electronic system 100 is idle (no command pending from the system interface 140), an check & validate module 418 can commence in the background scan 412. The check & validate module 418 read the action required memory 416 to determine which of the LBA's are suspect. In one embodiment, the check & validate module 418 re-reads the LBA's stored in the action required memory 416 through an action required bus 417 and attempts to confirm the data errors. If the check & validate module 418 is unable to confirm the data error(s) associated with an LBA, the LBA is removed from the action required memory 416. However, if the check & validate module 418 is able to confirm the data errors, the LBA/sector is subjected to a sector screen module 420, which may take one or more additional corrective actions in the various embodiments. For example, the module 420 may perform an action in which the sector is relocated temporarily and re-written to demonstrate the validity of the original sector site. If the original sector site fails the sector screen module 420, the contents of the LBA are relocated to a reliable sector location. This operation of the sector screen module 420 can continue until the action required memory 416 is empty, or when a timer or host command interrupt is triggered to stop processing.

It has been discovered that the read command discriminator 404 can minimize the amount of verification that is performed in the background scan 412. By minimizing the amount of operations performed by the background scan 412, excess wear on the head 102 can be reduced and the reliability of the electronic system 100 can be improved.

Referring now to FIG. 5, therein is shown a block diagram of a data management mechanism 501 according to an embodiment. As shown, the data management mechanism 501 also includes a controller 503 and a read channel 134. In one embodiment, the control circuitry 138 of FIG. 1A may include the controller 503, the read channel 134, and/or any other portion of the data management mechanism 501. In another embodiment the controller 503, the read channel 134, and/or any other portion of the data management mechanism 501 may be distinct from the control circuitry 138. The block diagram of the data management mechanism 501 depicts the read channel 134 having an analog front end 502 for receiving a raw data signal 504. The raw data signal 504 can include servo data, system data, user data, or a combination thereof.

The analog front end 502 can produce qualified data 506, which in one embodiment does not include servo data, but does pass system data and user data to a data correction unit 508, such as a hardware error correction unit. The data correction unit 508 can include a bit correction unit 510, such as a non-linear data/soft-output Viterbi algorithm, coupled to an iteration decoder 512. The iteration decoder 512 can be monitor how many iterations are required to satisfactorily correct the bits, or how many iterations are performed before giving up on the correction of the qualified data 506.

A correction bus 514 can include the bits corrected (BC) indicator and an iteration count (IC) indicator. A low-density parity check (LDPC) unit 516 can be coupled to the data correction unit 508 for passing the corrected data. A read channel data bus 518 can pass the content of the LBA being read to the control circuitry 138 of FIG. 1A. The LDPC unit 516 can also transfer a locality error indicator 519 to a status node 520 for combining the locality error indicator 519 to the correction bus 514 for forming a data condition indicator 522. It is understood that the combining of the locality error indicator 519 and the correction bus 514 can be a logical process, a grouping process, a mathematical process, or a combination thereof. By way of an example, the data condition indicator 522 includes IC and BC data must be wide enough (2 symbols for example) to accept both IC and BC data.

A threshold register 524, can establish a guideline for determining a suspect LBA 529, can comprise both channel quality metrics (IC and BC) and the read channel data bus 518, which can be transmitted concurrently. A data correction comparator 525 can compare the values from the threshold register 524 with the data condition indicator 522 for generating a captured LBA 526. The captured LBA 526 can cause an LBA counter 528 to flag the suspect LBA 529 as having errors in excess of the threshold. The LBA counter 528 can be loaded from a starting LBA indication 530 provided by the control circuitry 138. The output of the data correction comparator 525 can be one bit, an “OR function” for either IC or BC trigger, multiple bits, a pulse, or a string of pulses. In certain embodiments a more involved comparison using more than one triggers may be used. The threshold register 524 is, in one embodiment, a programmable register with update on-the-fly capability.

The suspect LBA 529, such as a number of the LBA that exceeds the error level established by the threshold register 524, can be coupled to an LBA memory 532 capable of collecting all of the sectors in the data track 116 of FIG. 1A including sectors read during pre-read operations, post-read operations, or a combination thereof. The LBA memory 532 can be operated as a first-in-first-out (FIFO). While the error corrected contents of the read channel data bus 518 can be transferred through the system interface 140 of FIG. 1A, all of the sectors that exceed the error correction levels established by the threshold register 524 can be made available to the control circuitry 138, through the action required bus 417, for analysis of the physical locations of the suspect LBA 529 by the background operation 412 of FIG. 4.

By way of an example, the suspect LBA 529 can be read by the control circuitry 138 at completion of each physical read command. In one embodiment, prior to the execution of the next command (internal or external operation) the starting LBA bus 530 is loaded to the LBA counter 528 in order to track the LBA number as each sector is read from the media 104 of FIG. 1A. Each sector read can increment the LBA counter 528. However, in this example, only the flagged LBA number, the suspect LBA 529, is loaded to the LBA memory 532 for use by the control circuitry 138 after the read command execution has completed.

For example, an aspect of some embodiments is to utilize the read commands delivered through the system interface 140 to identify possible exposures to data integrity issues on the sectors being read by the system interface 140. Furthermore, since completion of the command is of paramount importance, some embodiments normally would use the most powerful settings to recover the user data when executing the read command, as a result, subtle differences in level of correction can be detected, as the proscribed level established by the threshold register 524. This aspect can preempt the potential data losses by proactively maintaining the data tracks 116.

Various embodiments of the electronic system 100 offer the following aspects:

The command execution 406 of FIG. 4 can expose a potential data loss caused by a bad location on the media 104 or poorly written.

Reduction of activity needed to perform the background operation 412 of FIG. 4 can reduce the wear of the head 102 of FIG. 1A and improve the longevity of the electronic system 100.

Since the often-read user data represents the LBA's that are most protected by this feature, data integrity where the user matters the most is vastly improved. While any seldom read sectors are addressed by the background operation 412.

In one embodiment, the electronic system 100 can provide a drive health indicator based on the data condition indicator of the condition of the data stored within the media 104, which can include both user data and system data. The drive health indicator can identify suspect areas in the media 104 that can be avoided in future use to assure reliability of the data as well as minimizing any damage that might occur to the head 102 by continuing to operate in the suspect areas of the media 104. For example, the drive health indicator may include historical and/or current statistics and/or counts related to suspect LBAs, bit error, correction effort level (e.g., number of iterations, how often used). The indicator may be a composite score based on these counts and/or statistics.

The electronic system 100 has been described with module functions or order as an example. The electronic system 100 can partition the modules differently or order the modules differently. For example, the sequence of actions shown in FIG. 1C may be different in some embodiments, with some actions omitted and/or combined. As another example, the LBA number could be derived from the servo tracks 113 information read from the data track 116 on the media 104 and passed through the read channel 134 of FIG. 1A. As yet another example, while the description of various embodiments uses the examples of data tracks from a magnetic rotating media, some embodiments are applicable to data stored on any media, including blocks/pages of data stored in solid-state memory. For example, the aforementioned capture of data condition indicator can be performed in the controller 503 coupled with a solid-state memory read channel, and the various uses of the data condition indictor including reduction of background scan processes can be applied to data stored in solid-state memory as well.

The modules described in this application can be implemented as instructions stored on a non-transitory computer readable medium to be executed by the control circuitry 138 in the electronic system 100. The non-transitory computer medium can include the memory of the integrated circuit in the electronic system 100. The non-transitory computer readable medium can include non-volatile memory, such as a hard disk drive, non-volatile random access memory (NVRAM), solid-state storage device (SSD), compact disk (CD), digital video disk (DVD), or universal serial bus (USB) flash memory devices. The non-transitory computer readable medium can be integrated as a part of the electronic system 100 or installed as a removable portion of the electronic system 100.

The resulting method, process, apparatus, device, product, and/or system is straightforward, cost-effective, uncomplicated, highly versatile, accurate, sensitive, and effective, and can be implemented by adapting known components for ready, efficient, and economical manufacturing, application, and utilization. Another important aspect of various embodiments is that they valuably supports and services the historical trend of reducing costs, simplifying systems, and increasing performance.

These and other valuable aspects of the various embodiments consequently further the state of the technology to at least the next level.

While the various embodiments have been described in conjunction with a specific best mode, it is to be understood that many alternatives, modifications, and variations will be apparent to those skilled in the art in light of the aforegoing description. Accordingly, the embodiments are intended to embrace all such alternatives, modifications, and variations that fall within the scope of the included claims. All matters set forth herein or shown in the accompanying drawings are to be interpreted in an illustrative and non-limiting sense.