Disk defect management for a data storage device

Description

CROSS-REFERENCE TO RELATED APPLICATIONS

This application claims priority to provisional U.S. Patent Application Ser. No. 62/148,683, filed on Apr. 16, 2015, which is hereby incorporated by reference in its entirety.

BACKGROUND

Data Storage Devices (DSDs) are often used to record data onto or to reproduce data from a storage media. One type of storage media includes a rotating magnetic disk where a magnetic head of the DSD can read and write data in tracks on a surface of the disk, such as in a Hard Disk Drive (HDD).

Certain portions of a disk surface may have defects that prevent reliable storage of data in that location on the disk surface. The defects can include primary defects (i.e., P defects) that are identified during a manufacturing process of the DSD or grown defects (i.e., G defects) that appear in the field during operation of the DSD. These defects are typically “mapped out” using a defect map so that the defective locations on the disk surface are no longer available for storing data.

As the storage capacity of DSDs increases, the size of the defect map for the DSD also typically increases, which can reduce the overall storage capacity available to a user of the DSD. In addition, the processing time for larger defect maps is increased.

BRIEF DESCRIPTION OF THE DRAWINGS

The features and advantages of the embodiments of the present disclosure will become more apparent from the detailed description set forth below when taken in conjunction with the drawings. The drawings and the associated descriptions are provided to illustrate embodiments of the disclosure and not to limit the scope of what is claimed.

FIG. 1 is a block diagram depicting a system with a Data Storage Device (DSD) according to an embodiment.

FIG. 2 illustrates a disk surface of the DSD of FIG. 1 according to an embodiment.

FIG. 3 depicts a bitmap buffer storing segment bitmaps according to an embodiment.

FIG. 4 depicts a doubly linked list with entries corresponding to segments on a disk surface including at least one defect region according to an embodiment.

FIG. 5 is a flowchart for a defect identification process according to an embodiment.

FIG. 6 is a flowchart for another defect identification process according to an embodiment.

FIG. 7 is a flowchart for a new defect identification process according to an embodiment.

FIG. 8 is a flowchart for a defect status process for determining a defect status of a portion of a disk surface according to an embodiment.

DETAILED DESCRIPTION

In the following detailed description, numerous specific details are set forth to provide a full understanding of the present disclosure. It will be apparent, however, to one of ordinary skill in the art that the various embodiments disclosed may be practiced without some of these specific details. In other instances, well-known structures and techniques have not been shown in detail to avoid unnecessarily obscuring the various embodiments.

System Overview

FIG. 1 shows system 100 according to an embodiment which includes host 101 and Data Storage Device (DSD) 106. System 100 can be, for example, a computer system (e.g., server, desktop, mobile/laptop, tablet, smartphone, etc.) or other electronic device such as a Digital Video Recorder (DVR). In this regard, system 100 may be a stand-alone system or part of a network, such as a local or wide area network, or the Internet.

Those of ordinary skill in the art will appreciate that system 100 can include more or less than those elements shown in FIG. 1 and that the disclosed processes can be implemented in other environments

As shown in the example embodiment of FIG. 1, DSD 106 includes Non-Volatile Memory (NVM) in the form of rotating magnetic disks 131 and 133. In other embodiments, DSD 106 may include a different number of disks or a different type of NVM such as a solid-state memory in addition to rotating magnetic disks.

DSD 106 includes controller 120 which includes circuitry such as one or more processors for executing instructions including a microcontroller, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA), hard-wired logic, analog circuitry and/or a combination thereof. In one implementation, controller 120 can include a system on a chip (SoC).

Host interface 126 is configured to interface DSD 106 with host 101 and may interface according to a standard such as, for example, Serial Advanced Technology Attachment (SATA), PCI express (PCIe), Small Computer System Interface (SCSI), or Serial Attached SCSI (SAS). As will be appreciated by those of ordinary skill in the art, host interface 126 can be included as part of controller 120. Although FIG. 1 depicts the co-location of host 101 and DSD 106, in other embodiments the two need not be physically co-located. In such embodiments, DSD 106 may be located remotely from host 101 and connected to host 101 via a network interface.

In the example of FIG. 1, disks 131 and 133 form a disk pack that is rotated by a spindle motor (not shown) and heads 154, 156, 158, and 160 are positioned to read and write data on a corresponding disk surface of disks 131 or 133. Each of disk surfaces 134, 136, 138, and 142 includes a number of radially spaced, concentric tracks for storing data. In more detail, heads 154, 156, 158, and 160 are connected to the distal end of actuator 130 which is rotated by Voice Coil Motor (VCM) 132 to position heads 154, 156, 158, and 160 over tracks on disk surfaces 134, 136, 138, and 142, respectively. Controller 120 can include servo control circuitry (not shown) to control the rotation of disks 131 and 133, and control the position of the heads using VCM control signal 30.

FIG. 2 provides an example of disk surface 134 with concentric tracks 202 and servo wedges 204 that are used to control the position of head 154 in relation to disk surface 134. Each servo wedge 204 may include servo information that can be read from disk surface 134 by head 154 to determine the position of head 154 over disk surface 134. For example, each servo wedge may include a pattern of alternating magnetic transitions (a servo burst), which may indicate a particular wedge number on disk surface 134.

FIG. 2 also depicts defect regions 206 and 208 which can include primary defects (i.e., P defects) that are identified during a manufacturing process of DSD 106 and grown defects (i.e., G defects) that appear in the field during operation of DSD 106. As discussed in more detail below, controller 120 can identify segments of a disk surface such as disk surface 134 including defect regions such as defect regions 206 and 208 and generate a segment bitmap for the segment indicating the defect regions within the segment.

By using segment bitmaps to identify only the segments of the disk surface that actually include defect regions, it is ordinarily possible to reduce the size of a defect mapping for the disk surface or to have a higher resolution for mapping defects. For example, a DSD with only enough memory (e.g., Dynamic Random Access Memory (DRAM)) to indicate whether a track has a defect may be able to increase the resolution of its defect mapping to instead indicate whether certain sectors within a track have a defect while using the same or less memory to store its defect map. In addition to improving the resolution of defect mapping, a smaller segment bitmap representing only a segment of the disk surface can be processed or searched quicker, which may allow for simultaneous defect processing for different disk surfaces. Such parallel processing of defect maps for different disk surfaces may allow for better visibility of defect patterns that can occur on different disk surfaces.

Returning to FIG. 1, memory 140 of DSD 106 is configured to store firmware 14, bitmap buffer 16, and linked list 18. In some implementations, memory 140 can be a volatile memory such as DRAM with copies of firmware 14, bitmap buffer 16, and linked list 18 stored in an NVM such as on disks 131 or 133 or in another NVM of DSD 106.

Firmware 14 includes computer executable instructions for execution by controller 120 in operating DSD 106. As discussed in more detail below with reference to FIG. 3, bitmap buffer 16 can be used by controller 120 to store segment bitmaps that indicate defect regions on a disk surface of DSD 106. Linked list 18 can be a doubly linked list that includes entries with location information for segments of the disk surfaces having at least one defect region and addresses for accessing corresponding segment bitmaps for the segments. As discussed in more detail below, the use of linked list 18 can ordinarily facilitate a more efficient processing of the segment bitmaps to improve defect management and the visibility of defects and defect patterns using location information provided in linked list 18. An example of linked list 18 is discussed below with reference to FIG. 4.

Example Defect Data Structures

FIG. 3 depicts an example of bitmap buffer 16 storing segment bitmaps according to an embodiment. As shown in FIG. 3, bitmap buffer 16 stores three segment bitmaps (i.e., the first, second and third segment bitmaps) mapping defects in three different segments of one or more disk surfaces (e.g., disk surfaces 134, 136, 138, and 142 in FIG. 1) with each segment including at least one defect region (e.g., defect region 206 or 208 in FIG. 2).

The size of each segment may vary based on the size and location of the defect regions in the segment and a resolution used to determine the size of the segments. For example, one segment may include only a single track while another segment may include over ten contiguous tracks such as 60 tracks. The resolution for determining whether to include multiple defect regions into a single segment may depend on factors such as a size allocated to bitmap buffer 16 and/or a resolution for defect mapping. A segment size may be determined, for example, using a track based resolution where a segment would include a track with a defect and any adjacent tracks having a defect. In another implementation, a segment size may be determined using a sector based or wedge based resolution such that a segment would include a sector with a defect or a portion of a track between two servo wedges (i.e., a wedge portion) with a defect plus any adjacent sectors or wedge portions also having a defect. As discussed in more detail below with reference to the defect identification process of FIG. 7, the segment may grow as new defects are identified in adjacent tracks, sectors, or wedge portions.

In the example of FIG. 3, each of the three segment bitmaps provides a binary defect status for a particular portion of the segment. In the example of FIG. 3, a “1” can indicate a defect in the portion of the segment and a “0” can indicate no defect in the portion of the segment. Other implementations may reverse these indications so that a “1” indicates no defect and a “0” indicates a defect.

In some implementations, the portion of the segment can be a portion of a track between two servo wedges (e.g., servo wedges 204 in FIG. 2) such that each “1” or “0” provides a defect status for a different portion of a track in the segment that is between two servo wedges. In other implementations, the portion of the segment can be a particular sector in a track such that each “1” or “0” in the segment bitmap provides a defect status for each sector in the segment. The segment bitmaps are arranged in an order to correspond to or map the physical locality of defect regions in the segment. For example, in the first segment bitmap, each eight bit line can correspond to a track in a first segment of a disk surface with each “1” or “0” in the line corresponding to a defect status for a sector in the track. A first track represented by the eight bit line in the upper left of the first segment bitmap would then have a defect in the first and fifth sectors of the track.

Each group of one or more contiguous defects can be referred to as a defect region in the segment. Since defects tend to occur more frequently in particular segments or portions of a disk surface, the size of a defect map such as a bitmap can usually be reduced by only generating and storing a defect map for the segments of the disk surface that include defect regions.

In addition, each segment bitmap in the example bitmap buffer 16 of FIG. 3 is addressed with a bitmap address indicating a storage location in memory 140 for the segment bitmap. As discussed below with reference to FIG. 4, the bitmap addresses are used in entries of linked list 18 to access the bitmaps.

FIG. 4 depicts an example of linked list 18 with entries associated with the segment bitmaps shown in FIG. 3. Each of the three entries of linked list 18 shown in FIG. 4 corresponds to a segment on a disk surface including at least one defect region. As shown in FIG. 4, each entry has an entry address (e.g., 3A411630, 3A411648, 3A411660) indicating a storage location in memory 140 for the entry. In the example of FIG. 4, linked list 18 is a doubly linked list such that each entry refers to a previous link and a next link in the list. This is shown in each entry of FIG. 4 with an address for a previous entry as a previous link and an address for a next entry as a next link. By including addresses for both a previous entry and a next entry, linked list 18 can be searched in either direction for a particular portion of a disk surface as discussed below in more detail with reference to FIG. 8.

In the example of FIG. 4, each entry of linked list 18 includes location information for a segment indicating a location of the segment and an address for accessing a segment bitmap for the segment. As shown in FIG. 4, a bitmap address is provided for each entry that indicates a location in memory 140 where a corresponding segment bitmap is stored for the segment.

The location information shown in FIG. 4 includes a head number, reference cylinder (i.e., track), a cylinder count, and a wedge count. The head number indicates a disk surface (e.g., one of disk surfaces 134, 136, 138, or 142 in FIG. 1) where the segment is located or similarly a head (e.g., head 154, 156, 158, or 160 in FIG. 1) that accesses data from the segment. A reference cylinder is also provided to indicate a starting track for the segment. Each entry also includes a cylinder count indicating a number of tracks in the segment and a wedge count indicating a number of wedges in the segment. In other implementations, the location information used in linked list 18 may differ.

As discussed in more detail below, the location information of the entries in linked list 18 can be used to determine a defect status for a particular portion of a disk surface or to update the segment bitmaps for the disk surfaces.

Example Defect Management Processes

FIG. 5 is a flowchart for a defect identification process that can be performed by controller 120 executing firmware 14 according to an embodiment. In block 502, controller 120 identifies a segment of a disk surface (e.g., one of disk surfaces 134, 136, 138, and 142) including at least one defect region. The identification of the segment may be made during a factory testing process and/or during operation of DSD 106 in the field. A defect region such as one or more sectors in a track or one or more portions of a track between servo wedges 204 can be identified when attempting to write or read data in the defect region. In the case of a primary or P defect identified during a factory test process, controller 120 may scan the disk surface for errors to identify defect regions. In the case of a grown or G defect identified during operation in the field, controller 120 may encounter repeated read or write errors for a particular sector or portion of a disk surface and then identify the sector or portion as a defect region.

In block 504, controller 120 generates a segment bitmap (e.g., the segment bitmaps shown in FIG. 3) for the segment identified in block 502. The segment bitmap indicates the at least one defect region within the segment. As discussed above, the segment bitmap can identify a location of one or more defective sectors or wedge portions that are defective.

In block 506, controller 120 stores the segment bitmap in bitmap buffer 16 in memory 140. As discussed in more detail below, the segment bitmap can be used to update the defect mapping for the disk surfaces or to determine a defect status of a particular portion of a disk surface.

FIG. 6 is a flowchart for another defect identification process that can be performed by controller 120 executing firmware 14 according to an embodiment. In block 602, controller 120 identifies a plurality of segments that each has at least one defect region. As discussed above with reference to block 502 of FIG. 5, the identification of the segments including defect regions may be made during a factory testing process (for P defects) and/or during operation of DSD 106 in the field (for G defects).

In block 604, controller 120 generates a segment bitmap (e.g., the segment bitmaps shown in FIG. 3) for each of the plurality of segments to indicate a location for the defect regions in the segments. As discussed above with reference to FIG. 3, the segment bitmaps may indicate a defect in a particular sector or wedge portion with a “1” and no defect in a particular sector or wedge portion with a “0.”

In block 606, the segment bitmaps generated in block 604 are stored in bitmap buffer 16. In block 608, controller 120 creates linked list 18 with an entry for each segment including location information for the segment and an address for accessing a segment bitmap for the segment in bitmap buffer 16. Linked list 18 can be used by controller 120 to access a segment bitmap for a portion of a disk surface.

FIG. 7 is a flowchart for a new defect identification process that can be performed by controller 120 executing firmware 14 according to an embodiment. The process of FIG. 7 can be performed after an initial set of segments with defect regions have been identified, and a defect identification process such as the process of FIG. 6 has been performed to generate segment bitmaps and create linked list 18.

In block 702, a new defect region is identified such as through repeated attempts to read or write data in a particular sector or sectors on a disk surface. In block 704, controller 120 determines whether the new defect region is adjacent to or within an existing segment. Controller 120 can use linked list 18 to search for an existing segment that includes the new defect region or is adjacent to the defect region. For example, controller 120 may compare location information for the new defect region such as a head, cylinder, and sector number for the new defect region to location information for the entries of linked list 18.

If it is determined that the new defect region is not within or adjacent to an existing segment, controller 120 identifies a new segment for the new defect region in block 706. A new segment bitmap is generated in block 708 indicating the new defect region. In block 710, controller 120 stores the new segment bitmap in bitmap buffer 16, and in block 712, a new entry is created in linked list 18 for the new segment. The new entry includes location information for locating the new segment such as a head or disk surface number, a reference cylinder or track, a cylinder count, and a wedge count. The new entry also includes an address for accessing the new segment bitmap for the new segment in bitmap buffer 16.

If the new defect region is determined to be within or adjacent to an existing segment in block 704, the process determines whether the new defect region is adjacent to an existing segment. If not, the new defect region is determined to be within an existing segment and controller 120 in block 716 updates an existing segment bitmap to indicate the new defect region within the existing segment. The updating performed in block 716 can include, for example, changing the defect status from “0” to “1” in the existing segment bitmap for sectors or wedge portions in the new defect region.

On the other hand, if it is determined that the new defect region is adjacent to an existing segment in block 714, controller 120 in block 718 expands one or more existing segment bitmaps to include the new defect region. In more detail, if the new defect region is determined to be within a particular resolution for a segment size such as within an adjacent track, sector, or wedge portion, the size of the existing segment bitmap is expanded to include the adjacent track, sector, or wedge portion including the new defect region. In some cases, the expansion of the existing segment bitmap can result in the merging of two existing segment bitmaps into a single larger segment covering both of the existing segments. This can occur when the new defect region is adjacent to two existing segments.

In block 720, controller 120 updates the existing entries or entry in linked list 18 so that the location information for the updated entry includes the new defect region. This can include, for example, increasing the cylinder and wedge counts in the entry to indicate a larger size for the segment. In another example, the reference cylinder may be decreased to include a defect region adjacent to a beginning of the existing segment. In the case where the new defect region is adjacent to two existing segments, the two entries for the existing segments can be combined into one entry for the new larger segment including the old segments and the new defect region between them.

By allowing for the expansion and merging of segment bitmaps and entries, it is ordinarily possible to use less segment bitmaps in bitmap buffer 16 and less entries in linked list 18 as new defect regions are discovered.

FIG. 8 is a flowchart for a defect status process for determining a defect status of a portion of a disk surface according to an embodiment. The process of FIG. 8 can be performed by controller 120 executing firmware 14.

In some cases, controller 120 may check a defect status of a particular portion of a disk as a background activity to identify segments of a disk surface that are suspected to have a defect region. In one example, controller 120 may look for segments having a defect region that are located the same radial or circumferential location as another segment with a defect region that has already been identified on a different disk surface. In this regard, some defects may have a pattern where each disk surface in a disk pack will have a defect region at the same radial or circumferential location. In such cases, controller 120 can identify such segments using linked list 18 instead of discovering them through write errors or read errors that occur while trying to perform a read or write operation in the defect region. This can ordinarily improve performance by not having to waste time with performing multiple read or write retries or performing other error recovery operations. In addition, controller 120 may attempt to find segments with defect regions on the same disk surface as a previously identified segment based on a defect pattern such as a spiral defect pattern or a diagonal defect pattern that might be caused by a scratch on the disk surface.

The defect status process of FIG. 8 can also be used by controller 120 as part of a process for handling a new defect region as in FIG. 7 where linked list 18 is checked in blocks 704 or 714 to determine whether a new defect region is within or adjacent to an existing segment. If controller 120 is trying to determine if a new defect region is adjacent to an existing segment, the portion of the disk that is checked for a matching segment in linked list 18 may be expanded by a track, sector or wedge portion on both sides of the new defect region to determine if there is an entry for a matching segment that is adjacent to the new defect region.

In the example process of FIG. 8, controller 120 in block 802 searches location information in linked list 18 for an entry corresponding to a matching segment that includes a particular portion of a disk surface. As discussed above, the portion of the disk surface may be suspected to have a defect region based on a defect pattern or the portion may have already been identified as having a defect region and controller 120 is checking to see if the defect region is adjacent or within an existing segment. In the example of linked list 18 shown in FIG. 4, controller 120 may search using a head number and a sector or wedge number for the portion of the disk surface.

If an entry is found in block 804, controller 120 can use the bitmap address provided in the matching entry to read a segment bitmap in block 808 for the matching segment. The segment bitmap can indicate whether the particular portion (e.g., one or more sectors or wedge portions) within the matching segment has been identified as having a defect.

If no entry is found in block 804, controller 120 determines in block 806 that there is no defect in the portion since a segment including the portion has not been previously identified. In the case where controller 120 is checking linked list 18 to determine if a new defect region is within or adjacent an existing segment, controller 120 may then identify a new segment for the new defect region, generate a new segment bitmap, and create a new entry in linked list 18. In the case where controller 120 is looking for a new defect region based on a defect pattern, controller 120 in block 806 may determine that there is not a defect pattern or that the defect pattern has not reached a particular disk surface.

OTHER EMBODIMENTS

Those of ordinary skill in the art will appreciate that the various illustrative logical blocks, modules, and processes described in connection with the examples disclosed herein may be implemented as electronic hardware, computer software, or combinations of both. Furthermore, the foregoing processes can be embodied on a computer readable medium which causes a processor or computer to perform or execute certain functions.

To clearly illustrate this interchangeability of hardware and software, various illustrative components, blocks, and modules have been described above generally in terms of their functionality. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the overall system. Those of ordinary skill in the art may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present disclosure.

The various illustrative logical blocks, units, modules, and controllers described in connection with the examples disclosed herein may be implemented or performed with a general purpose processor, a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described herein. A general purpose processor may be a microprocessor, but in the alternative, the processor may be any conventional processor, controller, microcontroller, or state machine. A processor may also be implemented as a combination of computing devices, e.g., a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP core, or any other such configuration.

The activities of a method or process described in connection with the examples disclosed herein may be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. The steps of the method or algorithm may also be performed in an alternate order from those provided in the examples. A software module may reside in RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, registers, hard disk, a removable media, an optical media, or any other form of storage medium known in the art. An exemplary storage medium is coupled to the processor such that the processor can read information from, and write information to, the storage medium. In the alternative, the storage medium may be integral to the processor. The processor and the storage medium may reside in an Application Specific Integrated Circuit (ASIC).

The foregoing description of the disclosed example embodiments is provided to enable any person of ordinary skill in the art to make or use the embodiments in the present disclosure. Various modifications to these examples will be readily apparent to those of ordinary skill in the art, and the principles disclosed herein may be applied to other examples without departing from the spirit or scope of the present disclosure. The described embodiments are to be considered in all respects only as illustrative and not restrictive and the scope of the disclosure is, therefore, indicated by the following claims rather than by the foregoing description. All changes which come within the meaning and range of equivalency of the claims are to be embraced within their scope.