Nonlinear transmission line-based harmonic phase standard

Description

CLAIM OF PRIORITY

This application claims the benefit of priority to U.S. Provisional Application titled “NONLINEAR TRANSMISSION LINE BASED HARMONIC PHASE STANDARD”, Application No. 62/240,826, filed Oct. 13, 2015, which application is herein incorporated by reference.

TECHNICAL FIELD

The present invention relates to harmonic phase standards for establishing a phase reference for use with measurement equipment for determine phase response of a device under test (DUT).

BACKGROUND

Determining the performance and behavior of a telecommunication (telecom) network includes nonlinear characterization and modeling of components of the network. A component (or group of components) characterized using test signals from a measurement instrument is referred to as a device under test (DUT). A typical response of a DUT to a stimulus generated by a vector network analyzer (VNA) using a pair of tones, for example, includes a signal with a number of different frequency components including harmonics, intermodulation distortion products, modulation sidebands, etc. The frequency components are generated through the nonlinear behavior of the DUT. It is not possible to accurately determine the phase of all of these components using a VNA with conventional calibrations because the measurement hardware phase lengths are different at different frequencies.

Referring to FIG. 1, a harmonic phase standard 102 can be used with a VNA 10 to establish a phase reference for use in nonlinear measurements. A first port 12 of the VNA is connected with an input of the harmonic phase standard 101 while an output 103 of the harmonic phase standard is connected with a second port 14 of the VNA. The harmonic phase standard receives a signal from the VNA and introduces nonlinearities to the received signal and then provides the modified signal to the receiver of the VNA. The signal provided to the VNA can, for example, be stepped through a set of frequencies to characterize phase response to nonlinearities at different frequencies within the set of frequencies. The phase response is used to establish a phase reference.

A harmonic phase standard creates a waveform rich in signal content to act as a transfer standard so that the phase relationship of all of the components of that signal content can be determined. Knowledge of the phase relationship can then be transferred to a receiver of the VNA so that the VNA can accurately measure the phase of signal components coming from the DUT. The phase reference can be used in conjunction with load-pull systems, for example, and large-signal VNAs to characterize and model the nonlinear behavior of DUTs in a telecom network.

Traditional harmonic phase standards can be based on several different electronic components. For example, a traditional harmonic phase standard can be based on the use of a Schottky diode, as described in the article “Measurement of Magnitude and Phase of Harmonics Generated in Nonlinear Microwave Two-ports,” authored by U. Lott and published in the journal IEEE Transactions on Microwave Theory and Techniques, vol. 37, pp. 1506-1511, October 1989. However, it has been observed that the approach of using a Schottky diode can result in output that is limited in harmonic content.

In another approach, a traditional harmonic phase standard can be based on the use of a step-recovery diode, as described in the paper “Harmonic Generation using Step Recovery Diodes and SRD Modules”, Application Note 920, provided by Agilent Technologies. However, it has been observed that the approach of using a step-recovery diode suffers from phase stability issues.

In another approach, a traditional harmonic phase standard can be based on the use of an indium phosphide (InP)-based device such as a comb generator by Agilent Technologies. However, it has been observed that the approach of using an InP-based device provides high phase stability at the expense of limited frequency scalability due to circuit complexity. It can also suffer from degraded phase flatness with frequency.

SUMMARY

In accordance with an embodiment, a harmonic phase standard includes an input connectable with a radio frequency (RF) signal source for receiving an RF signal, an output, a signal path extending between the input and the output for propagating the RF signal from the input to the output, and a logic gate, an amplifier and a nonlinear transmission line (NLTL) arranged along the signal path. The logic gate receives the RF signal, buffers it in an amplitude-insensitive manner, and outputs a waveform having modestly sharpened edges relative to the RF signal. The amplifier amplifies the waveform output by the logic gate. The NLTL receives the amplified waveform from the amplifier and is biased to shape the amplified waveform so as to add harmonic content to the amplified waveform. In an embodiment, the NLTL is biased to sharpen the falling edges of the amplified waveform. The NLTL provides the bulk of the sharpening so that much higher frequency content can be generated (e.g., >10 GHz).

In accordance with an embodiment, the NLTL is biased by one of an active and a passive bias and comprises a pair of high-impedance transmission lines loaded periodically with varactor diodes formed on a gallium arsenide (GaAs) substrate.

In accordance with an embodiment, the harmonic phase standard further includes a pulse-forming network arranged along the signal path to receive a waveform output from the NLTL and provide at least one of unipolar and bipolar pulses.

In accordance with an embodiment, the harmonic phase standard further includes a first power splitter arranged along the signal path for splitting an RF signal received from the RF signal source and outputting a first RF signal to the logic gate and outputting a second RF signal to an output port and a second power splitter for splitting the at least one of unipolar and bipolar pulses into two output signals at two output ports.

In accordance with an embodiment, the first power splitter and the pulse-forming network and the second power splitter is a coplanar waveguide having a central conductor arranged between a pair of ground planes and a set of air bridges forming a pair of open-circuited stubs connected between ground planes and spanning over the central conductor.

In accordance with an embodiment, a method of calibrating a VNA for measuring the phase response of a DUT to a test signal includes connecting a first port of the VNA to an input of a harmonic phase standard, connecting a second port of the VNA to an output of the harmonic phase standard, transmitting a set of RF signals at a set of frequencies to the input of the harmonic phase standard via the first port of the VNA, receiving a set of response signals in response to the set of RF signal from the output of the harmonic phase standard via the second port of the VNA, generating a calibration file for correcting relative phases of frequency components corresponding to the set of frequencies and storing the calibration file at the VNA for measuring the phase response of the DUT.

In such an embodiment, the harmonic phase standard includes the input, the output, a signal path extending between the input and the output for propagating the RF signal from the input to the output, a logic gate arranged along the signal path for receiving a RF signal and outputting a waveform having sharpened edges relative to the RF signal, an amplifier arranged along the signal path to amplify the waveform output by the logic gate and a NLTL arranged along the signal path for receiving the amplified waveform from the amplifier, wherein the NLTL is biased to sharpen the falling edges of the amplified waveform edges.

BRIEF DESCRIPTION OF THE DRAWINGS

Further details of the present invention are explained with the help of the attached drawings in which:

FIG. 1 is a simplified view of a VNA connected with a harmonic phase standard for generating a calibration file for use by the VNA to measure phase response of a DUT, in accordance with an embodiment.

FIG. 2 is a block circuit diagram of a nonlinear transmission line (NLTL)-based harmonic phase standard, in accordance with an embodiment.

FIG. 3 is a simplified circuit diagram of a NLTL, in accordance with an embodiment.

FIG. 4 is a block circuit diagram of a NLTL-based harmonic phase standard, in accordance with another embodiment.

FIG. 5 is a block circuit diagram of a NLTL-based harmonic phase standard, in accordance with a further embodiment.

FIG. 6 is a plan view of a coplanar waveguide (CPW) bipolar pulse former and resistive power splitter, in accordance with an embodiment.

DETAILED DESCRIPTION

The following description is of the best modes presently contemplated for practicing various embodiments of the present invention. The description is not to be taken in a limiting sense but is made merely for the purpose of describing the general principles of the invention. The scope of the invention should be ascertained with reference to the claims. In the description of the invention that follows, like numerals or reference designators will be used to refer to like parts or elements throughout. In addition, the first digit of a reference number identifies the FIG. in which the part or element is first discussed.

Excessive harmonic generation and the generation of intermodulation distortion products by components such as amplifiers or other nonlinear components in a communications device or network can lead to violations of spectrum rules set by the Federal Communications Commission (FCC), failed performance specifications, interference with other channels, or other problems. Nonlinear characterization of components is useful in many microwave, millimeter wave, and radio frequency (RF) applications including wireless communications for identifying nonlinear behavior resulting in such failures.

Techniques for obtaining magnitude and phase measurements of a DUT in response to a stimulus have been developed using VNAs. As noted above, a harmonic phase standard is provided for calibration to eliminate phase errors when correcting measurements of a DUT. The objective of the harmonic phase standard is to create a stable set of harmonics from a nonlinearity to calibrate phase pattern versus frequency. Calibration is then applied during measurement of a DUT to obtain the DUT harmonic phase response relative to the source fundamental.

To characterize and model the nonlinear behavior of a DUT, a VNA can be used in conjunction with load-pull systems that systematically varies the impedance presented to the DUT (at the stimulus frequency and often at the harmonics of that frequency). The harmonic phase calibration enables collecting that multi-harmonic data coherently. Performance of the DUT and the associated conditions to deliver that performance in a network can then be assessed. While load-pull itself implies impedance variation at the load port, impedance can also be varied at any of the ports of the DUT, most often at the source.

FIG. 2 illustrates a circuit diagram for a harmonic phase standard in accordance with embodiment. The harmonic phase standard 102 comprises a logic gate 104, an amplifier 106 and a nonlinear transmission line (NLTL) 108. An NLTL is a distributed device that supports the propagation of nonlinear electrical waves such as shocks and solutions. The NLTL provides an ability to generate a controllable and stabile, but very sharp non-linearity.

The harmonic phase standard receives a stimulus from an RF source 16 of a VNA. The stimulus can be a tone or a modulated signal. The stimulus can also be a pulsed signal or a continuous wave (CW) signal. A logic gate 104 receives the RF signal, buffers it in an amplitude-insensitive manner. The logic gate outputs a waveform that is generally consistent in amplitude and substantially independent from the amplitude of the input signal. The circuit is thereby made insensitive to measurement instrument setup and environment influence. The waveform of the signal produced is also modestly sharpened relative to the stimulus, adding harmonic content to the waveform. In an embodiment, the logic gate can comprise a monocycle former that generates narrow pulses referred to as monocycles. The waveform produced by the logic gate is amplified at an amplifier block 106 to boost the amplitude of the waveform as appropriate for use by the NLTL. The NLTL is DC-biased to sharpen the falling edge of the amplified waveform, adding further harmonic content to the waveform. The NLTL provides the bulk of the sharpening so that much higher frequency content can be generated (e.g., >10 GHz). In other embodiments, the NLTL can biased to sharpen the rising edge of the amplified waveform rather than the falling edge.

An exemplary signal is shown propagating along the circuit with waveforms resulting from each section of the circuit represented below the circuit. An exemplary fast Fourier transform (FFT) is shown of the frequency components of the waveform converted to the frequency domain. The FFT illustrates the additional harmonic content at higher frequencies produced with each resultant waveform at each stage of the circuit.

Referring to FIG. 3, in an embodiment the NLTL can comprise high-impedance transmission lines loaded periodically with varactor diodes so as to form a propagation medium whose phase velocity, and thus time delay is a function of the instantaneous voltage. For a step-like waveform, the trough of a wave travels at a faster phase velocity than the peak, resulting in compression of the fall time, and thus the formation of a steep wave front that approaches that of a shock wave. When driven with a sinusoidal signal, an NLTL circuit compresses the fall time of a signal, resulting in a waveform that is rich in high-frequency harmonics. The NLTL is provided with a bias, which can be active or passive and can control the resulting compression of the fall time of the resulting waveform. A reference circuit, such as a closed-looping bias system can maintain bias consistency. The signal produced by the NLTL is the resultant output of the harmonic phase standard and can be provided to the receiver of the VNA.

In an embodiment, a monolithic implementation of the NLTL circuit can be formed on a gallium arsenic (GaAs) substrate. In contrast with prior art techniques in which the input frequency is limited to a few hundred megahertz (MHz), an input frequency range of an NLTL can be designed to span gigahertz (GHz) frequencies, and is governed by the input Bragg frequency (i.e. spacing d between cells) of the shockline 109 of the NLTL.

A calibration file is generated based on the output of the harmonic phase standard. The calibration file can be stored at the DUT and applied to the output frequency components of responses of DUTs that are thereafter measured to phase-correct those output frequency components at the receiver of the VNA to account for the measurement hardware phase lengths.

It is observed that harmonic phase standards in accordance with presently disclosed embodiments have high phase stability as a result of using low jitter logic gates and modulator drivers, and the distributed reactive nature of the NLTL. The output frequency spectrum of the harmonic standard is scalable by virtue of the scalability of the NLTL fall time.

FIG. 4 illustrates a circuit diagram for a harmonic phase standard 202, in accordance with another embodiment. In such an embodiment, the circuit of the embodiment of FIG. 2 further includes a pulse-forming network 210 that can generate bipolar and unipolar pulses of relatively high-voltage. Also shown in FIG. 4 is an exemplary waveform of a signal propagating along the circuit and an exemplary FFT converting a series of waveforms to the frequency domain.

The pulse-forming network can transform the sharp falling edge of the waveform to a sharp pulse, in the time domain. In the frequency domain, this change the distribution of frequency components produced by the circuit. The pulse-forming network acts as a high pass filter so the lower frequency components are deemphasized, while emphasizing the higher frequency components.

FIG. 5 illustrates a circuit diagram for a harmonic phase standard 302, in accordance with another embodiment. In such an embodiment, the circuit of the embodiment of FIG. 5 further includes power splitters 312, 314 at both an input from the RF source signal and an output from a pulse-forming network. The input power splitter provides an RF signal to the main harmonic phase standard circuit and further provides a trigger out signal. The output power splitter at the circuit output provides a pair of output signals (Out 1 and Out 2).

The power splitters are passive networks for simplifying measurement protocol. The input power splitter can be used to synchronize the measurement instrument with another measurement instrument or other test equipment. For example, a VNA can be synchronized with an oscilloscope via the trigger out of the input power splitter. The output power splitter can provide an extra reference tap off that can be fed to another receiver of the VNA for some other measurement.

FIG. 6 illustrates a bipolar pulse former and power splitter 420, in accordance with an embodiment. The pulse former and power splitter can be used, for example, with embodiments of harmonic phase standards such as shown in FIG. 5. The pulse former is a coplanar waveguide (CPW) bipolar pulse former and resistive power splitter that receives a pulsed signal from an NLTL with a compressed fall time and generates bipolar pulses as a pair of output signals, Out 1 and Out 2. The ground planes of the CPW are connected by air bridges comprising metallic bridges elevated over and spanning the central conductor and elevated over and spanning the output conductors providing signals Out 1 and Out 2. The air bridges are elevated some small distance over the central conductor (e.g., tens of microns). The air bridges form a pair of open-circuited stubs. Thin-film resistors are connected between the central conductor and the output conductors.

In some embodiments, the present invention includes a computer program product which is a storage medium or computer readable medium (media) having instructions stored thereon/in which can be used to program a computer to perform any of the processes of the present invention. The storage medium can include, but is not limited to, any type of disk including floppy disks, optical discs, DVD, CD-ROMs, microdrive, and magneto-optical disks, ROMs, RAMs, EPROMs, EEPROMs, DRAMs, VRAMs, flash memory devices, magnetic or optical cards, nanosystems (including molecular memory ICs), or any type of media or device suitable for storing instructions and/or data.

The previous description of the preferred embodiments is provided to enable any person skilled in the art to make or use the embodiments of the present invention. While the invention has been particularly shown and described with reference to preferred embodiments thereof, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention.