Virtual memory device including a bridge circuit

Description

BACKGROUND OF THE INVENTION

(a) Field of the Invention

The present invention relates to a virtual memory device including a bridge circuit, and more particularly to a virtual memory device wherein a bridge circuit with less than 10% die size and a non-volatile XIP (Execute In Place) random access memory is used in an integrated SOC (System-On-Chip) device to connect to a high efficiency memory bridge circuit, thereby constituting a new architecture of virtual memory device.

(b) Description of the Prior Art

As the continuous advancement of existing personal digital products, their functions are also becoming more versatile. Therefore, a memory device of portable application architecture is also becoming more sophisticated under a restriction of size. However, storage space in a virtual memory is becoming to fail in meeting requirements. The major reason is that the virtual memory with higher efficiency requires the memory with higher storage space for storing program codes, but should satisfy the requirements of low cost and small area at the same time. Therefore, if portable application architecture with a small size and high price is used, a better solution to the storage space in its virtual memory is still not available.

Accordingly, how to provide a flash, memory device with a higher efficiency and a lower cost is a motivation of invention of the present inventor.

SUMMARY OF THE INVENTION

The present invention is to provide a virtual memory device including a bridge circuit, wherein a bridge circuit with less than 10% die size and a non-volatile XIP random access memory is used in an integrated SOC device to connect to a high efficiency memory bridge circuit, so as to facilitate an improvement of boot-up speed and MMI (Man-Machine Interface) initialization of a portable mobile device, and performance of network searching and network protocol of a wireless station, as well as a reduction of cost of the entire memory, upon applying the new architecture of virtual memory device inside the portable mobile device.

To enable a further understanding of the said objectives and the technological methods of the invention herein, the brief description of the drawings below is followed by the detailed description of the preferred embodiments.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 shows a system block diagram of the present invention.

FIG. 2 shows a schematic view of an implementation of the present invention.

FIG. 3 shows a schematic view of a second implementation of the present invention.

FIG. 4 shows a schematic view of a third implementation of the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

Referring to FIG. 1, the present invention is to provide a virtual memory device including a bridge circuit, which is an integrated SOC device A comprising a NAND flash memory B, an XIP non-volatile random access memory C, a programmable MIF (Memory Interface) bridge D, and a volatile XIP random access memory E. By a setting of software simulation, the integrated SOC device A enables a virtual memory device L without an MCU (Main Control Unit) system control interface F to contain the MCU system control interface F.

The new architecture of virtual memory device L uses a minimum size of the XIP non-volatile random access memory interface C, the programmable MIF bridge D, and the NAND flash memory B, such that a bridge circuit with less than 10% die size and a non-volatile XIP random access memory H to be used inside the virtual memory device L to connect to a high efficiency virtual memory interface, thereby configuring the new architecture of virtual memory device L into the integrated SOC device with a small size, high density, and low cost A.

The NAND flash memory B comprises a function of page fault mechanism address mapping B1, and a function of page fault free management, such that when a program code I of a portable mobile device is loaded into the NAND flash memory B, a memory space of a maximum density can be available inside the integrated SOC device A.

The XIP non-volatile random access memory C and the programmable MIF bridge D, are virtual memory interfaces with small sizes, and are integrally bridged into the integrated SOC device A. Moreover, by a setting of software simulation, the XIP non-volatile random access memory C can be integrated with a virtual memory having an SDRAM (Synchronous Dynamic Random Access Memory) memory, a DDR (Double Data Rate) memory, a NOR memory, and an MRAM (Magnetic Random Access Memory) memory.

The programmable MIF bridge D can use a means of hardware simulation to enable the integrated SOC device A to integrate the NAND flash memory C therein, so as to provide a dual mode virtual memory interface to the integrated SOC device A, and to configure the new architecture of virtual memory interface into a virtual memory interface of static random access memory and dynamic random access memory.

The virtual memory device L is provided with a RISC (Reduced Instruction Set Computer) portable program or a data file J, and the volatile XIP random access memory E is also provided with some executable programs E1. Therefore, when power of a portable device is insufficient, using system software will not cause a loss of the RISC portable program or data file J.

The essential consideration of the aforementioned hardware architecture lies in how to integrate the integrated SOC device A into a dual mode virtual memory device L associated with a high efficiency virtual memory interface, thereby improving a boot-up speed K and an MMI initialization K1 of a portable mobile device, and performance of network searching K2 and network protocol K3 of a wireless station, as well as reducing a cost of the entire memory.

Referring to FIG. 2, it shows a schematic view of an implementation of the present invention. An integrated SOC device A comprising a NAND flash memory B, an XIP non-volatile random access memory C, a programmable MIF bridge D, and a volatile XIP random access memory, is mainly used to enable a virtual memory interface without an MCU system control interface F to be a new architecture of virtual memory interface containing the MCU system control interface F, by a setting of software simulation.

A file system of the NAND flash memory B, which is integrated in the integrated SOC device A, comprises a function of page fault mechanism address mapping B1, and a function of internal page fault free management B2, such that when a program code I of a portable mobile device is loaded into the NAND flash memory B, a memory space of a maximum density can be available inside the integrated SOC device A. Moreover, a PSRAM (Pseudo-Static Random Access Memory) enhanced virtual memory E can configure this volatile XIP random access memory E into a software or hardware system architecture based on different fraction occupied by the internal memory space, thereby constituting a virtual memory system with a lower cost, a higher performance, and lower power consumption.

Referring to FIG. 3, an integrated SOC device M can further use a means of hardware bridging or a setting of software simulation to integrate a NAND flash memory M1, a NOR memory M2, and a programmable MIF bridge M3 into the integrated SOC device M, by bridging with a bridge circuit with less than 10% die size and a non-volatile XIP random access memory N. In addition, a PSRAM enhanced virtual memory M4 can configure this volatile XIP random access memory M4 into software or hardware system architecture based on different fraction occupied by the internal memory space, thereby constituting a virtual memory system with a lower cost, a higher performance, and lower power consumption.

Referring to FIG. 4, the present invention can further use a setting of software simulation to integrate a NAND flash memory O1, an XIP non-volatile random access memory O2, and a programmable MIF bridge O3 into a dual mode integrated SOC device O, by bridging with a bridge circuit with less than 10% die size and a non-volatile XIP random access memory P; so as to provide a virtual memory system with a lower cost, a higher performance, and lower power consumption, upon applying the integrated SOC device O in a portable mobile device. In addition, the virtual memory system can be configured into software or hardware system architecture.

To further manifest the advancement and practicability of the present invention, the advantages of the present invention are listed below:

• • (1) The integrated SOC device can be associated with a virtual memory interface with a small size.
  • (2) It is provided with a new architecture of MCU system control interface by software simulation.
  • (3) It is provided with a virtual memory system with a lower cost, a higher performance, and lower power consumption.
  • (4) The integrated SOC device comprises a bridge circuit with less than 10% die size and a non-volatile XIP random access memory.
  • (5) It is provided with architecture of virtual memory interface by a setting of software simulation.
  • (6) It has advancement, practicability, and convenience.
  • (7) It can improve an industrial competitiveness.

It is of course to be understood that the embodiments described herein is merely illustrative of the principles of the invention and that a wide variety of modifications thereto may be effected by persons skilled in the art without departing from the spirit and scope of the invention as set forth in the following claims.