US20260160513A1
2026-06-11
18/962,165
2024-11-27
Smart Summary: A new fire source circuit is designed to create pulses for igniting squibs, which are small explosive devices. It uses a special type of regulator called a buck-boost regulator to manage the power needed for these pulses. There are controls for both voltage and current to ensure the squib receives the right amount of energy. The system includes a feedback loop that helps adjust the voltage settings based on the output. Overall, this technology allows for precise control of the fire source to ensure reliable ignition of squibs. đ TL;DR
A fire source circuit and method of operation thereof is provided. The fire source circuit may have a switching regulator to create squib fire pulses. The switching regulator may be a buck-boost regulator in some embodiments. There may also be a voltage and current control connected to the switching regulator to control voltage and current settings of a fire source for a squib. There may be a current loop and/or a voltage loop that are connected with a dual digital to analog converter connected to the switching regulator. There may be an output current that exceeds a minimum fire current of a squib that is in electrical communication with a squib multiplexer. There may be a feedback loop connected to an output of the switching regulator and connected to the voltage and current control. The feedback loop enables the voltage and current control to alter a voltage set point.
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F41A19/68 » CPC main
Firing or trigger mechanisms; Cocking mechanisms; Electric firing mechanisms for multibarrel guns or multibarrel rocket launchers or multicanisters
Initially, it is noted that the present disclosure is related to the below listed U.S. Patent Application (âthe Incorporated Applicationâ), filed on equal date herewith, the entirety of each of which is incorporated herein as if fully rewritten. The Incorporated Application is:
Since the present disclosure is related to the Incorporated Application, some similar structural nomenclature is used herein when referencing some portions of the present disclosure relative to the Incorporated Application. However, there may be some instances where structural nomenclature differs between similar elements and there may be other instances where nomenclature is similar between distinct elements relative to the present disclosure and the Incorporated Application. Further, there may be instances in this disclosure that utilize similar reference numerals when referencing some portions or components of the present disclosure and its associated method(s) as in the Incorporated Application. However, there may also be instances where (i) different reference numerals are utilized herein to refer to similar components as in the Incorporated Application and/or (ii) similar reference numerals are utilized herein to refer to different components from the Incorporated Application.
This invention was made with government support under a classified contract no. 1112320201. The government has certain rights in the invention.
The present disclosure relates generally to countermeasure control devices, systems, and methods thereof.
In current military technologies, military platforms, such as a military aircraft, typically include at least one countermeasure dispensing system (CMDS). The CMDS may eject one or more countermeasure expendables from the platform to dispense chaff material or flares away from the platform to counter a detected incoming threat, such as missiles or similar ballistic threats. The dispensing of chaff material or flares away from the platform may then redirect the incoming threat away from the platform to reduce the amount of damage to the platform or to leave the platform unscathed and/or unharmed.
Each countermeasure dispenser in a standard CMDS is normally electrically connected to a countermeasure controller and/or sequencer unit for ejecting the countermeasure expendables from the dispenser; however, existing systems are limited to archaic and/or legacy dispensing systems that are difficult and/or costly to upgrade.
For example, traditional squib firing has been controlled with a linear regulating circuit that can generate a constant current with an adjustable voltage limit to allow for firing different types of squibs. This linear regulating circuit dissipates large amounts of power, and therefore heat, while active. As an example, the ALE 47 countermeasure controller delivers 31.5 Watts to the squib (and cabling to the squib), but it draws 147 Watts from the platform and 115.5 Watts is dissipated in the squib fire circuit. As a result, every squib fire source must be used with a certain duty cycle in order to avoid overheating, and the platform is limited to the number of countermeasures it can fire at once due to power limitations of the supply that feeds the Countermeasure Controller.
What is needed is an improved way to control squib firing for countermeasure deployment.
One aspect of the present disclosure provides a method of operation for a unique and highly configurable squib firing circuit. This fire source circuit has features that distinguish it from legacy fire source circuits, such as high efficiency switching operation, digitally programmable voltage and current set points, and slew rate control, which allows the fire source circuit of the present disclosure to be used in a wide variety of applications where the end use can be tailored for the specific needs of the customer.
In one exemplary embodiment, a countermeasure controller has a modular adaptive squib fire source circuit that solves thermal and power management challenges by utilizing a switching regulator to generate squib fire pulses. The switching regulator is different from the linear regulator that is found in conventional fire source circuits. The switching regulator may be any type of switching regulator. However, in one embodiment of the fire source circuit, the switching regulator is a buck-boost regulator that can create a voltage that is less than, equal to, or greater than its input voltage with high efficiency (85-95%). The high regulation efficiency of the buck-boost regulator means that only several Watts are dissipated in the fire source circuit, so it can be used continuously without thermal concerns and has a much lower power demand on the platform input power supply. The fire source circuitry takes up less space on a printed circuit board than legacy designs because it does not need to utilize large components sized to handle high power dissipation. One embodiment of the fire source circuit may feature digital control and monitoring features for the circuit. The fire source circuit's output current setting and output voltage setting may be controlled by a Digital to Analog Converter (DAC) that can be dynamically adjusted by a Field Programmable Gate Array (FPGA) or another digital device. Fire source output voltage and current may be monitored with an Analog to Digital Converter (ADC) that allows for performance monitoring and misfire detection. As such, the fire source circuit of the present disclosure is built upon the fundamental control concepts of the legacy design yet provides improvements to address shortcomings.
The countermeasure controller that utilizes the fire source circuit of the present disclosure is capable of firing more countermeasures within a given time period than legacy systems. It also allows more control over the fire pulse shape and voltage/current characteristics to allow the source to function in multiple platforms and meet EMI requirements.
The fire source circuitry uses a switching regulator topology rather than a linear regulator topology to create squib fire pulses. It features current and voltage control loops that are controlled with a DAC or dual DAC. Some legacy countermeasure controller systems have simplified control loops that may require fewer level translators/amplifiers but also lack adjustability., The fire source circuitry of various embodiments of the present disclosure uses a switching regulator or controller that takes in low voltage control inputs, allowing for one dual output DAC to control all fire characteristics with low voltage signals. The configuration is also able to accept a wide range of input voltages (above or below the required output voltage for the squib fire), while the legacy design required an input voltage that is higher than the output voltage in order to function correctly. Compared to the state of the art, one or more of the present embodiments is a more efficient, more compact, and more flexible solution.
In another aspect, an exemplary embodiment of the present disclosure may use a dual purpose circuit implementation to deliver a communication and polling interface to countermeasure systems. The communication interface uses shunt regulators to regulate the communication link between a high and low voltage that will allow for precise communication to a smart store communication interface (SSCI) squib equipped smart expendable without inadvertently firing it off. The polling interface shares some functionality with the SSCI communication circuit such as overcurrent protection circuitry, which feeds both circuits from a single source. Either interface can be active as needed. Within this dual purpose circuit, there may be redundant safety measures to accurately report squib health and viability.
In one aspect, an exemplary embodiment of the present disclosure may provide a fire source circuit comprising: an input and an output, wherein one or more signal pathways that extend downstream from the input to the output; a switching regulator to create squib fire pulses; and a voltage and current control connected to the switching regulator to control voltage and current settings of a fire source for a squib. This exemplary embodiment or another exemplary embodiment may further provide that the switching regulator is a buck-boost regulator. This exemplary embodiment or another exemplary embodiment may further provide a voltage loop operatively connecting the switching regulator and the voltage and current control. This exemplary embodiment or another exemplary embodiment may further provide a current loop operatively connecting the switching regulator and the voltage and current control. This exemplary embodiment or another exemplary embodiment may further provide an input protector located along at least one pathway between the input and the switching regulator. This exemplary embodiment or another exemplary embodiment may further provide an in-rush limiter in the input protector, wherein the in-rush limiter operates in conjunction with a gradual rise in current to minimize transient stress on other circuitry that is upstream or downstream from the fire source circuit. This exemplary embodiment or another exemplary embodiment may further provide a dual digital to analog converter (DAC) that sets an operational current and voltage, wherein the dual DAC generates a gradual ramp up in current or voltage over a ramp up time. This exemplary embodiment or another exemplary embodiment may further provide that the ramp up time is about 1 ms. This exemplary embodiment or another exemplary embodiment may further provide a squib multiplexer (MUX); and an output current that exceeds a minimum fire current of a squib that is in electrical communication with the squib MUX. This exemplary embodiment or another exemplary embodiment may further provide a feedback loop connected to an output of the switching regulator and connected to the voltage and current control; wherein feedback loop enables the voltage and current control to alter a voltage set point in or substantially near real time. This exemplary embodiment or another exemplary embodiment may further provide an output protector located along at least one pathway between the switching regulator and the output of the fire source circuit.
In another aspect, an exemplary embodiment of the present disclosure may provide a method comprising: setting, via a dual digital to analog converter (DAC), an operational current and voltage of a fire source circuit, wherein the dual DAC generates a gradual ramp up in current or voltage over a ramp up time at a ramp rate; enabling a switching regulator in a fire source circuit; slewing, at the dual DAC, voltage from a starting voltage value to a setpoint voltage value; and delivering current from the switching regulator to a squib connected to a countermeasure expendable, wherein the squib explodes when the current exceeds a minimum fire current value for a period of time. This exemplary embodiment or another exemplary embodiment may further include transitioning to constant current after the dual DAC has slewed to the set voltage value. This exemplary embodiment or another exemplary embodiment may further provide that the setpoint voltage value exceeds a minimum voltage needed to meet a squib dependent current setpoint. This exemplary embodiment or another exemplary embodiment may further include enabling an input protector located along at least one pathway between the input and the switching regulator. This exemplary embodiment or another exemplary embodiment may further include enabling an output protector located along at least one pathway between the switching regulator and the output of the fire source circuit. This exemplary embodiment or another exemplary embodiment may further include enabling a squib multiplexer (MUX); and switching a switch in the squib MUX to transfer current to the squib that is thereto having current delivered. This exemplary embodiment or another exemplary embodiment may further include, after the squib has exploded, disabling an input protector located upstream from the switching regulator and disabling an output protector located downstream from the switching regulator. This exemplary embodiment or another exemplary embodiment may further include controlling constant current delivered to the squib with a feedback loop that is operatively connected with the switching regulator. This exemplary embodiment or another exemplary embodiment may further provide that the switching regulator is a buck-boost regulator.
In another aspect, an exemplary embodiment of the present disclosure may provide a polling and communication circuit comprising: an input and an output, wherein one or more signal pathways that extend downstream from the input to the output; a polling regulator positioned along at least one signal pathway; a polling and communication control having at least one switch in operative communication with the polling regulator; and a squib multiplexer (mux) that is in operative communication with the polling and communication control and the squib fire regulator, the squib mux adapted to be operatively connected to at least one squib to perform squib polling and communication operations. This exemplary embodiment or another exemplary embodiment may further include polling and communication voltage of a signal that polls and communicates with the squib connected to the squib mux, wherein the polling regulator is a DC/DC regulator. This exemplary embodiment or another exemplary embodiment may further include at least one resistor in the at least one switch of the polling and communication control, wherein the at least one resistor is configured to be used in series with a polling source to limit polling current to a value below a maximum no-fire current of the squib. This exemplary embodiment or another exemplary embodiment may further provide that the polling and communication voltage is about 16 Volts. This exemplary embodiment or another exemplary embodiment may further provide that the polling and communication current is less than a minimum fire current of the squib. This exemplary embodiment or another exemplary embodiment may further include a polling and communication amperage of a signal that polls and communicates with the squib connected to the squib mux, wherein the polling and communication amperage is less than a maximum no fire current amperage of the squib. This exemplary embodiment or another exemplary embodiment may further provide that polling and communication occurs with a smart store communication interface (SSCI) on the squib. This exemplary embodiment or another exemplary embodiment may further include switch mux logic that activates a pathway from the input to the squib mux to receive a polling request to determine the presence of the squib. This exemplary embodiment or another exemplary embodiment may further provide that the switch mux logic is operative connected to the polling and communication control. This exemplary embodiment or another exemplary embodiment may further include a first shunt regulator that operates at a first voltage. This exemplary embodiment or another exemplary embodiment may further include a second shunt regulator that operates at a second voltage less than the first voltage. This exemplary embodiment or another exemplary embodiment may further include a SSCI FPGA transmitter coupled to the second shunt regulator. This exemplary embodiment or another exemplary embodiment may further include a redundant switch operatively connected to a first regulator and a second regulator, wherein if one of the first regulator and the second regulator is inoperable then the redundant switch is disconnected so that the polling path still functions properly. This exemplary embodiment or another exemplary embodiment may further include a receiver that receives communication signals from a SSCI capable expendable. This exemplary embodiment or another exemplary embodiment may further provide that the communication signals are a half-duplex interface. This exemplary embodiment or another exemplary embodiment may further provide that the receiver is a comparator to measure the transmission and reception of the communication signals to and from the squib.
In another aspect, an exemplary embodiment of the present disclosure may provide a method comprising: enabling a polling path in a circuit that transmits voltage and current to poll a squib; detecting a voltage of the squib; and determining the presence of the squib based on the detected voltage. This exemplary embodiment or another exemplary embodiment may further provide that detecting the voltage of the squib occurs at a junction between two diodes coupled to a squib multiplexer (mux). This exemplary embodiment or another exemplary embodiment may further include, after determining the presence of the squib further comprises switching a switch in the squib mux to another squib if a first squib was detected as absent. This exemplary embodiment or another exemplary embodiment may further include, after determining the presence of the squib further comprises deactivating a switch mux logic to deactivate the poll path. This exemplary embodiment or another exemplary embodiment may further include enabling a first regulator at a first voltage in a polling and communication control along a communication path in the circuit; transmitting a communication signal from a switch multiplexer (mux) logic and the polling and communication control; pulling a second regulator to a lower second voltage in the polling and communication control; and transmitting the communication signal to the squib.
Sample embodiments of the present disclosure are set forth in the following description, are shown in the drawings and are particularly and distinctly pointed out and set forth in the appended claims.
FIG. 1 (FIG. 1) is a diagrammatic view showing a platform having a countermeasure dispensing system (CMDS) wherein the CMDS is being used to deter an incoming enemy threat via countermeasure material.
FIG. 2A (FIG. 2A) is a top front isometric perspective view of an exemplary CMDS according to one aspect of the present disclosure.
FIG. 2B (FIG. 2B) is a partially exploded top front isometric perspective view of an exemplary CMDS according to one aspect of the present disclosure.
FIG. 3 (FIG. 3) is a schematic view of an exemplary fire source circuit.
FIG. 4 (FIG. 4) is a more detailed schematic view of the exemplary fire source circuit that can perform squib firing functions and SSCI/Polling functions.
FIG. 5 (FIG. 5) is a table that depicts the power saving advantages of the fire source circuit compared to a legacy fire source circuit.
FIG. 6 (FIG. 6) is a flow chart depicting an exemplary squib firing method according to one exemplary embodiment of the present disclosure.
FIG. 7 (FIG. 7) is a flow chart depicting an exemplary squib polling method according to one exemplary embodiment of the present disclosure.
FIG. 8 (FIG. 8) is a flow chart depicting an exemplary squib communication method according to one exemplary embodiment of the present disclosure.
Similar numbers refer to similar parts throughout the drawings.
FIG. 1 illustrates a platform 1 which may be or include any ground vehicle, sea-based vehicle, aircraft, including manned and unmanned, and the like carrying a countermeasure dispensing system (CMDS) 10 thereon or therewith. According to one aspect, platform 1 may further be or include any remotely operated vehicles, drones, unmanned aerial vehicles (UAVs), and/or satellites. As used herein, platform 1 is illustrated as a manned aircraft (shown in FIG. 1 as a helicopter); however, the examples and description provided herein will be understood to be equally applicable across all versions of platform 1 as dictated by the desired implementation, unless specifically stated otherwise.
CMDS 10 may operably engage at least a portion of platform 1 and may be in operable communication therewith. According to one aspect, the CMDS 10 may be electrically connected to a legacy wiring harness A-kit (not illustrated) that is provided in the platform 1 to provide power and communication to some or all electrical components in the CMDS 10, which is described in more detail below.
Prior to the initiation of a military operation or of a mission of the platform 1, the CMDS 10 may be loaded with a set of countermeasure expendables 20 which may be or include one or more of flares (shown as flares 20A), chaff material, programmable decoys, or the like, for countermeasure purposes. In addition, each countermeasure expendable 20 of the set of countermeasure expendables 20 includes an impulse cartridge, such as a squib, for detonating and dispensing the countermeasure material from the platform 1. During military operation, the countermeasure material (e.g., flare 20A and/or chaff material) provides a distraction to an incoming enemy threat (shown as âETâ in FIG. 1), initiated by an enemy âEâ, where the incoming enemy threat is diverted to the flare and/or chaff material countermeasure expendable 20 while allowing the platform 1 to remain relatively unscathed. During the military operation or the aerial mission, the platform 1 may receive a warning from an on-board electronic warfare (EW) system regarding the incoming enemy threat approaching the platform 1. Upon a determination made by the on-board EW system and/or an operator, the CMDS 10 may dispense a calculated amount of countermeasure expendables 20 from the set of countermeasure expendables 20 that are disposed with and carried by the platform 1.
As shown in FIG. 2A, and as discussed further herein, it will be understood that the CMDS 10 is logically powered and controlled by at least one countermeasure controller (CMC) 18 which may be or form a part of an on-board countermeasure system. This system may include suitable devices and apparatuses that are operably engaged with one another to logically control and power the CMDSs (such as CMDS 10) described and illustrated herein. In the illustrated embodiments, CMDSs described and illustrated herein may be logically powered and controlled by on-board components and/or systems retaining a majority of legacy devices and apparatuses that are operably engaged with and in communication with one another, unless explicitly stated otherwise. Examples of legacy devices and apparatuses that may be provided in this system include, but are not limited to, a cockpit interface, discrete components, serial buses, a programmer, and data links. In another instance, a CMDS described and illustrated herein may be logically powered and controlled by a new on-board system having new devices and apparatuses that are operably engaged with one another.
Moreover, it will be understood that the on-board system may also retain and use legacy components of legacy CMDSs currently available. In one instance, a CMDS described and illustrated herein may maintain a legacy dispenser along with a legacy wiring harness A-kit operably engaging the CMDS with the legacy on-board system. In another instance, a CMDS described and illustrated herein may only maintain a legacy wiring harness operably engaging the CMDS with the legacy on-board system. Furthermore, it will be understood that CMDSs described and illustrated herein may also use new components that are not legacy to an aircraft, nor a legacy on-board system provided on the aircraft. Such components of CMDS 10 are described in further details below.
CMDS 10 includes a dispenser assembly 12 that operably engages with the platform 1 inside of the chamber 5 defined in the sidewall 4. As best seen in FIG. 2B, a dispenser 12A of dispenser assembly 12 is configured to hold various assemblies, components, and parts of CMDS 10 inside of the platform 1 for countermeasure operations, which are described in greater detail below. While not illustrated herein, connectors or fasteners may operably engage the dispenser assembly 12 with the platform 1, via a flange of the dispenser 12A, for maintaining the CMDS 10 with the platform 1; such engagement of the dispenser assembly 12 with the platform 1 may be conventional means currently used in the art. In other exemplary embodiments, connectors described previously may be any suitable components that are configured to operably engage a dispenser assembly with a platform for maintaining a CMDS with the platform (e.g., fasteners and other similar components of the like). In one exemplary embodiment, dispenser assembly 12 may be a legacy AN/ALE-47 dispenser used in a standard AN/ALE-47 CMDS. In another exemplary embodiment, dispenser assembly 12 may be a new dispenser assembly that is configured to be used with a new CMDS currently available on platforms discussed herein.
Dispenser assembly 12 also includes a legacy wiring harness 12B that operably engages with the dispenser 12A. Wiring harness 12B is configured to provide an electrical connection between the dispenser 12A and the CMC 18 of CMDS 10 provided on the platform 1 to enable logic communication between each of the dispenser 12A and the sequencer for dispensing and/or ejecting expendables from the CMDS 10. Such dispensing and ejecting of countermeasure expendables from the CMDS 10 is described in greater detail below.
Referring to FIG. 2B, CMDS 10 may include an exemplary breechplate assembly 14 that operably engages with the dispenser assembly 12, particularly with the dispenser of the dispenser assembly 12. Upon assembly, the entire breechplate assembly 14 is housed inside of the dispenser 12A and provides forty-eight firing lines as compared to the legacy thirty fires lines provided in legacy CMDS. Such parts and components of the breechplate assembly 14 are discussed in greater detail below. Particularly, FIG. 2B depicts the Common Carriage (ALE-47 upgrade) program, however there are other dispenser designs with different countermeasure arrangements/form factors in addition to the legacy 30 fire line setup.
Breechplate assembly 14 includes a faceplate 14A. As best seen in FIG. 2B, faceplate 14A operably engages with the dispenser 12A inside of the dispenser 12A. Faceplate 14A also operably engages with a magazine assembly of CMDS and each countermeasure expendable of the set of countermeasure expendables 20 once CMDS 10 is assembled and loaded into the platform 1.
Breechplate assembly 14 also includes a set of firing pin mechanisms 14B that operably engages with the faceplate 14A. In the illustrated embodiment, the set of firing pin mechanisms 14B is configured to operably engage with a set of countermeasure expendables (e.g., the set of countermeasure expendables 20) once loaded into the CMDS 10. The set of firing pin mechanisms 14B may be any suitable firing pin mechanisms 14B that are capable of initiating impulse cartridges to dispense countermeasure material from countermeasure expendables known in the art. In one exemplary embodiment, a set of firing pin mechanisms that may be used include firing pin mechanisms described and illustrated in U.S. patent application Ser. No. 17/345,551. In another exemplary embodiment, a set of firing pin mechanisms that may be used include firing pin mechanisms described and illustrated in U.S. patent application Ser. No. 18/045,194. Both of these applications are incorporated herein by reference. While not illustrated herein, the faceplate 14A may be configured to house any suitable electrical connections and/or electrical wiring that operably engages with each firing pin mechanism of the set of firing pin mechanisms 14B. In one exemplary embodiment, the faceplate 14A described and illustrated herein may define cavities and/or recesses to accommodate and/or house any suitable electrical connections and/or electrical wiring that operably engages with each firing pin mechanism of the set of firing pin mechanisms. In one embodiment, there are two pairs of firing pins of the set of firing pin mechanisms 14B that may then engage with a respective countermeasure expendable from the set of countermeasure expendables 20. There may be a first pair of firing pins of the set of firing pin mechanisms 14B that operably engages with the squib, and a second pair of firing pins the set of firing pin mechanisms 14B operably engages with a port plug of the respective countermeasure expendable from the set of countermeasure expendables 20. The remaining pairs of firing pins of the set of firing pin mechanisms 14B also engage with the remaining countermeasure expendables from the set of countermeasure expendables 20. One pin from the pair of firing pin mechanism contacts a corresponding fire pin on the squib, and the other pin from the pair contacts the conductive annular end of the squib to create a grounded circuit.
Breechplate assembly 14 may also include a rear cover plate 14C that operably engages with the faceplate 14A via connectors (not illustrated). In the illustrated embodiment, rear cover plate 14C is configured to cover and protect a rear surface of the faceplate 14A along with any electrical connections and/or wires that electrically connect to the set of firing pin mechanisms 14B. Upon assembly, the rear cover plate 14C also operably engages with the dispenser 12A inside of said dispenser 12A.
CMDS 10 also includes a magazine assembly 16 that operably engages with the dispenser assembly 12 and the breechplate assembly 14. As best seen in FIG. 2B, magazine assembly 16 is configured to be attached with the breechplate assembly 14 and hold the set of countermeasure expendables 20. Once assembled, the breechplate assembly 14 and the magazine assembly 16 are operably engaged with the dispenser 12A and housed inside of the dispenser 12A with the set of countermeasure expendables 20 loaded inside of the magazine assembly 16. Such components and parts that make up the magazine assembly 16 are described in more detail below.
Magazine assembly 16 includes a magazine 16A. As best seen in FIG. 2B, magazine 16A operably engages with the breechplate assembly 14 and is configured to hold the set of countermeasure expendables 20. More particularly, the magazine 16A operably engages with the faceplate 14A and houses each countermeasure expendables of the set of countermeasure expendables 20. Prior to operably engaging with the faceplate 14A, the set of countermeasure expendables 20 are loaded into the magazine 16A. Once assembled, the breechplate assembly 14 and the magazine assembly 16 operably engage with the dispenser 12A and are housed inside of the dispenser 12A with the plurality of countermeasure expendables 20 being loaded inside of the magazine 16A.
Magazine assembly 16 also includes a set of connectors 16B. As best seen in FIGS. 2A-2B, the set of connectors 16B operably engages the breechplate assembly 14 and the magazine 16A with the dispenser 12A. Upon assembly, a portion of the magazine 16A may protrude outwardly from the dispenser 12A. In one exemplary embodiment, the entire magazine 16A may be disposed inside of the dispenser 12A such that an exterior end or exterior surface of the magazine 16A is flush with a flange of the dispenser 12A upon assembly.
While not illustrated herein, CMDS 10 may include the CMC 18 may be embodied as an embedded fire select multiplexer assembly (EFSM) that operably engages with one or more of the dispenser assembly 12, the breechplate assembly 14, and the magazine assembly 16. CMC 18 assembly may also be configured to electrically connect with each firing pin mechanism of the set of firing pin mechanisms 14B for expanding the number of countermeasure expendables from thirty countermeasure expendables in legacy CMDSs (e.g., AN/ALE-47 systems) up to forty-eight countermeasure expendables while using legacy hardware and components. In one example, CMC 18 is an improvement to a previous controller described and illustrated in U.S. patent application Ser. No. 17/345,551 for expanding the number of countermeasure expendables from thirty countermeasure expendables in legacy CMDSs (e.g., AN/ALE-47 systems) up to forty-eight countermeasure expendables while using legacy hardware and components. In another example, CMC 18 is an improvement to a previous controller described and illustrated in U.S. patent application Ser. No. 18/045,194 for expanding the number of countermeasure expendables from thirty countermeasure expendables in legacy CMDSs (e.g., AN/ALE-47 systems) up to forty-eight countermeasure expendables while using legacy hardware and components. The fire line expansion obtained via the EFSM (30 fire lines to 48 fire lines) is implemented with a circuit card that is directly mounted to the dispenser, 12A. While it is part of the CMDS, it is physically distant from CMC 18 which allows the legacy A-kit wiring (18A in FIG. 2A) to only need 30 fire lines that then get routed to 48 fire locations via the EFSM attached to the back of the dispenser 12A.
As best seen in FIG. 2A, CMC 18 may electrically connect with the breechplate assembly 14 via the wiring harness 12B of dispenser assembly 12. More particularly, CMC 18 may electrically connect with each firing pin of the set of firing pins 14B of breechplate assembly 14 via wiring harness 12B of dispenser assembly 12. It should be understood that CMC 18 may be located at any suitable location on the platform 1 while still being able to electrically connect with the breechplate assembly 14 via the wiring harness 12B of dispenser assembly 12.
As discussed previously, CMDS 10 also includes the set of countermeasure expendables 20 that is loaded into the magazine 16A of magazine assembly 16 for countermeasure operations. Each countermeasure expendable of the set of countermeasure expendables 20 may include countermeasure material (e.g., chaff material, flare material, etc.) for deterring enemy threats away from the platform 1 during combat and/or military operations. Such parts and components of each countermeasure expendable of the set of countermeasure expendables 20 are discussed in greater detail below. Each countermeasure expendable of the set of countermeasure expendable 20 includes a canister 22.
There may be a power and communications interface that allows the use of a multiplexing and modulation scheme to prevent degradation of a data signal while simultaneously keeping the power component below a sure fire level of a squib utilized to launch one or more countermeasure expendables 20 from the dispenser assembly 12 and canisters 22. Accordingly, the utilization of the same path for both power and data may allow the CMC 18 to pre-power or prime the expendable countermeasure system payloads (e.g. the expendables 20) while within the magazine of the dispenser assembly 12 which may allow the expendable 20 to utilize a lower complexity initiator such as a squib while simultaneously allowing any smart payload components to have mission data files updated on the fly and in real time to adapt to specific threat environments. This may enable the use of the present systems in current countermeasure scenarios while further enabling future electronic warfare system parameters to be fed to countermeasure payloads in real time. Providing a highly adaptable countermeasure may be more effective in wider and more technologically advanced situations.
In the current state of the art or environment, there are newer countermeasure controller programs that are making updates to legacy countermeasure programs. These configurations utilize linear regulators that draw a significant amount of power in order to dispense the countermeasure expendable 20 from the canister 22. One challenge with legacy dispensers is that they need to run fire programs that jettison or expel as many countermeasure expendables 20 as quickly as possible. With the legacy setup, there may be up to 30W or more of power that need to be delivered to the squib coupled to the countermeasure expendable 20 and about 100 watts of power that need to be dissipated in the countermeasure controller for a normal squib. Yet, with SSCI squibs, there is less power dissipated in the CMC and more power delivered to the squib, but the fire is still less efficient than a fire done with the modular squib firing source. In legacy systems, this requires that each fire source has to be duty cycled. Additionally, the fired expendables would need to be spaced in time such that not too much power is being drawn from the platform.
Also, mechanical stress may be another driver for spacing out expendable fires since the countermeasure system can only fire so many expendables at once or it risks dislodging the dispenser 12A from the platform 1. That being said, the higher efficiency of the disclosed fire source means that the system of the present disclosure can have a higher availability/duty cycle of a single fire source. This allows the countermeasure system of the present disclosure to perform the jettison faster, perform a similar jettison program timing to legacy with fewer squib firing sources, or some combination of both. Recall, a traditional fire circuit that handles multiple squib fires needs to have high power dissipation capable components. This traditional fire circuity therefore needs elements added to its system design that allow for cooling, dependent upon expected number of successive fires. One technique to help cool a traditional fire source would be to duty cycle/limit their use. As noted herein, using the circuit 30 of the present disclosure leads to a net reduction of the number of fire sources required to accomplish the desired squib firing function. The circuit 30 can be fired without any required downtime so more expendables can be fired in a given amount of time.
Accordingly, the present disclosure provides a fire source circuit 30. One exemplary advantage of the fire source circuit 30 of the various embodiments of the present disclosure is the use of a switching regulator that dissipates very little power so the circuit can be used alone instead of many other legacy circuits to obtain the same number of squib fire instances in the same time period. This also allows faster fires or more squib fires to occur at once on a limited platform breaker. The fire source circuit 30 enables more squibs to be fired at a single time through an exemplary 5-amp breaker on a platform.
FIG. 3 depicts an exemplary circuit 30 that is part of the CMC 18. As will be detailed herein, the circuit 30 can perform squib firing functionality/control, squib polling and SSCI communications, or both. As such, reference can be made to circuit 30 with descriptive prefixes/adjectives that help identify a specific function. For example, circuit 30 may be referred to as a fire source circuit 30 or a polling and SSCI communication circuit 30 depending on the specific functionality being performed by circuit 30. Further, the term circuit 30 can be utilized if performing both functions.
Circuit 30 may include one or more of the following: an input 31, a regulator 32 for squib firing, an input protector 34, a polling regulator 36, a voltage and current control 38, a fire path control 40, a polling and communication switch 42, polling and communication control 44, a voltage discharge/fire test path 46, a digital control that may be embodied in a field programmable gate array (FPGA), and an output 50 that is connected to at least one of the squibs on the countermeasure expendable 20.
As used herein, the term âpathwayâ denotes a conduit through which electrical currents flow or otherwise facilitates the transmission of signals within the fire source circuit 30. These pathways may be formed from cables, traces, or any medium capable of conducting current or signals. The pathways serve as channels for the movement of electrical energy or signals between various components of the circuit 30. In one example, the pathways are defined by copper traces etched onto one or more circuit boards or insulated wires.
Pathway 52 operatively connects the input 31 to the input protector 34. Pathway 54 operatively connects the input protector 34 to the regulator 32 that is operatively connected with the voltage and current control 38. Pathway 56 operatively connects the regulator 32 to the voltage discharge/fire test path 46. Pathway 58 operatively connects the regulator 32 to the fire path control 40. The voltage discharge/fire test path 46 serves as a voltage discharge/reset for different types of squibs. Path 46 also provides a built in test load.
Pathway 60 operatively connects the input 31 to the polling regulator 36. Pathway 62 operatively connects the polling regulator 36 to the polling and communication switch 42 that is operatively connected with the polling and communication control 44. A pathway operatively connects the polling and communication control 44 to the digital control or FPGA. A pathway operatively connects the voltage discharge 46 to the digital control or FPGA. A pathway 68 operatively connects the polling and communication control 44 to the fire control path 40.
Pathway 70 operatively connects the fire control path 40 to the output 50 of at least one of the squibs on the countermeasure expendable 20, wherein one of the squibs may be considered as a load.
FIG. 4 depicts a circuit schematic of the fire source signal circuit 30. The input 31 receives power in the form of electricity from the platform 1. The input 31 may be a DC-DC converter to step down higher voltages provided from the platform 1 to a lower voltage necessary for the operation of the fire source circuit 30. For example, one embodiment provides voltage at 270 volts that is stepped down at the input 31 to 28 volts. In another exemplary embodiment, such as the common carriage scenario, platform 1 voltage is 28 volts that is fed through the input 31. The voltage may travel from the input and outwardly therefrom along pathway 52 and/or pathway 60.
When voltage travels from the input 31 along the pathway 52 to the input protector 34, the input protector 34 may operate as a fire source input arming switch. Effectively, this is a safety mechanism. In one particular embodiment, the input protector 34 may be in operative communication with an external sensor on the platform 1. For example, there may be a sensor to confirm that there is a âweight on wheelsâ signal. This would have the effect of preventing squibs from being discharged or fired when the platform 1 is on the ground. Stated otherwise, when there is weight on the wheels, the sensor knows that the platform 1 is on the ground, and therefore the input protector 34 will be disabled to prevent a fire signal from moving through the fire source circuit 30. Conversely, the input protector 34 will be enabled when the external sensor has determined that the platform is airborne. This will allow the input protector 34 to allow voltage to flow through the regulator 32, which will ultimately cause the fire source circuit 30 to discharge one of the countermeasure expendables 20. Within input protector 34, there is an inrush limiter 72. The limiter 72 has a controller chip that turns on and the input current to capacitor 74 will increase with a gradual ramp or rise. The purpose of the ramp or the rise is to minimize transient stress on the platform and upstream circuitry within the fire source circuit 30, or on downstream circuitry within the fire source circuit 30.
Regarding the inrush limiter 72, any type of limiter can be utilized. In one particular embodiment, an LT4363 inrush limiter is utilized. The inrush limiter 72 is designed to mitigate the impact of sudden current surges when power is initially applied to circuit 30. Inrush current occurs when capacitors are charged during circuit 30 startup, potentially exceeding the nominal load current. The inrush limiter 72, such as LT4363, helps manage this inrush current to prevent voltage rails from falling out of regulation, which could adversely affect the system. The inrush limiter 72 acts as a surge stopper by limiting the current during transient events. It may provide both overvoltage and overcurrent protection to sensitive electronic systems. In the inrush limiter 72, only the controller and the MOSFET experience the high voltage surge, allowing downstream components to have lower voltage ratings. It may utilize an N-channel MOSFET for protection. The inrush limiter 72 quickly reacts to overcurrent and short-circuit faults at the load, limiting current based on a sense resistor. The inrush limiter 72 may use a VDS-accelerated fault timer to limit thermal stress on the power MOSFET. VDS refers to drain-source voltage of the power MOSFET used in the surge stopper. When a fault (such as overcurrent or short-circuit) occurs at the load, the VDS-accelerated fault timer activates. Initially, the timer issues a warning signal, alerting the system to the fault. Its primary role is to limit thermal stress on the power MOSFET. If the fault persists, the timer eventually shuts off the MOSFET, preventing irreversible damage. By shutting off the MOSFET after issuing a warning, it prevents excessive heat buildup and potential failure.
One safety feature of fire source circuit 30 is that it is only activated or on when it is firing squibs, and it is off the remainder of the time. Stated otherwise, power is effectively cut from the circuit unless it needs to be used. As such, the in-rush limiter 72 assists to lower the demanded current to about 1 amp or less when the circuit 30 is activated. The voltage extends from the capacitor 74 along pathway 54 into the regulator 32.
In an exemplary embodiment, the regulator 32 is a switching regulator. In another particular embodiment, the switching regulator 32 is a buck-boost regulator, which may also be known as a buck-boost converter, however other types of switching regulators are possible. The buck-boost regulator 32 is a type of DC-to-DC converter that has an output voltage magnitude that is either greater than, equal to, or less than the input voltage magnitude. It combines the functionalities of a buck converter (which reduces a DC voltage to a lower DC voltage) and a boost converter (which provides an output voltage that is higher than the input). The buck-boost regulator 32 may have four transistor switches that allow for transfer of energy between the inductor and output capacitor, depending upon the input voltage and desired output voltage. There are power transistors within regulator 32 that operate (e.g., switch) in two different states: (i) an on-state and (ii) an off-state. In the on-state, the input voltage source may be directly connected to an inductor, resulting in accumulating energy in the inductor. In this stage (e.g., the on-state), a capacitor supplies energy to the output load. In the off-state, the inductor is connected to the output load and capacitor, so energy is transferred from the inductor to the capacitor and the load. The output voltage 92 of the regulator 32 may be adjustable based on the duty cycle of the switching transistors. In one exemplary embodiment, there are four transistors: two transistors for buck mode and two transistors for boost mode. This buck-boost regulator 32 may simplify the power-supply configuration with integrated components that help shrink overall size, minimize power loss, and improve thermal efficiency (i.e., operate at a cooler temperature). Some exemplary buck-boost regulators that may be sufficient within the circuitry 30 of the present disclosure may include the LTM8055 or LT3790.
Regulator 32 has an input which is shown as the voltage input (Vin) 76, an enable or âRunâ pin 78 that couples with an FPGA enable signal and a hardware (HW) interlock that both need to be present for the regulator 32 to activate or turn on. Thus, the FPGA enable signal makes the final determination that a squib should be fired, but it does not rely exclusively on that signal, as it also relies on hardware interlocks as well.
The regulator 32 may further include a soft start (SS) pin 80. The SS pin works in conjunction with a smoothly changing DAC input to the voltage feedback pin to create a gradual ramp of the fire source output. The SS pin 80 helps in case the DAC is adjusted too fast (stepped from 0V to full voltage setpoint without a gradual ramp applied). The voltage and current control 38 is connected to control pin 82 and the feedback pin 90 in regulator 32, wherein current limit control is implemented via pin 82 and the voltage control is implemented via pin 90. The âgradualâ ramp directly controls the output voltage of the fire source. This means that with a 1 millisecond ramp and a 6 A current setpoint, there should be a linear increase in current delivered to the squib from 0 A to 6 A over the 1 millisecond period. The ramp rate is adjustable and the current setpoint is as well, but gradually adjusting between the two means that over the course of 1 millisecond, a number of small DAC writes are made. For instance, if a fire voltage where our end voltage setpoint is 10V and the ramp rate is 1 millisecond, there may be 50Ă DAC setpoints in increments of 0.2V over the course of 1 millisecond (e.g., new DAC write every 20 microseconds). This is just an example but it should be understood that the setpoint is incrementally changed to create a gradual ramp.
The fire source pulse rise time may be programmable via a FPGA. In one example, a register of this FPGA may write the rise time from a minimum of 10 Όs to a maximum of 2 ms. The fire source pulse fall time may be programmable via this FPGA. In one example, the register of this FPGA may write the fall time from a minimum of 10 Όs to a maximum of 2 ms. In one embodiment, the fire source pulse rise or fall time should be accurate to within ±0.1 ms. In one exemplary implementation, the rise time adjustability range is 350 microseconds to 2 milliseconds.
The dual DAC 84 is part of the voltage and current control 38. The dual DAC 84 has two outputs that can be set. One of the two outputs of the dual DAC 84 is connected with a current control pathway 86 coupled to the control pin 82. The other output of the dual DAC 84 is connected with a voltage control pathway 88 that is connected with a feedback pin 90 on the regulator 32. In one embodiment, the DAC 84 can regulate either a current or a voltage, wherein the current control is shown by pathway 86 (i.e., a current loop) and the voltage control is shown by pathway 88 (i.e., a voltage loop). In this exemplary embodiment, the DAC 84 is a dual DAC that has dual outputs; however, it is entirely possible to utilize two independent DACs, each with a single independent output without departing from the scope of the present disclosure.
When firing a squib, the fire source circuit 30 targets a certain current that is used for firing the type of squib in the countermeasure expendable 20. A squib has a typical maximum âno fireâ current of about 1 amp. Stated otherwise, the no fire current often refers to a maximum current that a squib can experience for a period of time without exploding. Typically, the maximum no fire current is about 1 amp for a period of about 5 minutes. This maximum no fire current can change depending on the application-specific needs of the platform 1 relative to the enemy threat (ET). Squibs may also have âminimum all fireâ currents. A typical minimum all fire current is usually about 3 amps or 4 amps. In one embodiment of the present disclosure, the current sent through the output 92 of the regulator 32 is about 6 amps to ensure that the squibs will appropriately fire.
The fire source circuit 30 may be utilized with any type of squib. For example, it can be used with a conventional squib that operates under approximately a 1-ohm load or it may operate with SSCI squibs. The SSCI squibs have a Zener diode and operate at about 12 to 15 volts in order to fire said SSCI squib. The manner in which either squib is fired begins with the fire voltage control set to 0. Then, the fire source circuit 30, or an electronic control unit (e.g., CMC 18), sets the maximum current that the circuit is targeting, such as a single value of 6 amps. This may occur on a scale from about 0 Volts to about 1.2 Volts, which corresponds to zero to full scale (0 A to about 7.2 A ) for a current setpoint. The voltage and current control 38 may set this current, and more particularly the dual DAC 84 sets the current. The voltage control output via pathway 88 is what causes the output voltage of the fire source to ramp at the desired rate. The current will be set to a static value (desired squib fire current limit) prior to the start of the voltage control ramp. In one exemplary embodiment, the ramp up time is approximately 1 millisecond. It is understood that the 1 millisecond ramp up time strikes a good balance between the firing timeline being sufficiently fast without putting a large transient stress on the platform supply.
The regulator 32, which may be in one example either an LT3790 or an LTM8055, can regulate to either a voltage or current based on the control input pin 82 and/or the feedback control pin 90 which corresponds to voltage control. Either of these pins 82 or 90 receive signals from another source, which in this example is the current control 86 and voltage control from the DAC 84. However, it is to be understood that the dual output of the DAC 84 could input either one of current or voltage along pathway 86 to control pin 82 or pin 90 of the regulator 32 should it be desired for an application-specific purpose or need. Both fire source current control (pathway 86, pin 82 of the regulator 32) and fire source voltage control (pathway 88, pin 90 of fire source) are implemented with the output voltage of a DAC. Amplifiers internal to the fire source regulator 32 convert these low voltage signals into current/voltage control signals that adjust the output voltage or current setpoints accordingly.
In one embodiment, there is a resistor 94 that is part of the feedback loop along pathway 88. Resistor 94 may be part of a resistor-divider network coupled with an output of the dual DAC 84 that enables the system to automatically manipulate or alter the set point of the voltage anywhere between 0 and 23.2 volts in or substantially near real time or âon the fly.â
Regulator 32 also includes a current sense measurement pin 96. Thus, just as the feedback loop is measuring voltage, the current output from the regulator 32 is sensed or measured and compared against the voltage that is provided at the control pin 82.
There may also be a low-voltage current output monitor pin 98. Typically, there is a very small resistor in pathway 56, such as an 8-milliohm resistor, that produces a voltage proportional to the output current of regulator 32, which is then multiplied by some factor, and output onto pin 98. In one particular embodiment, the multiplication factor is approximately 20Ă, which is a built in feature of the LT 3790 buck-boost regulator. Generally, current should be sensed with as small of a resistive element as possible otherwise there will be high power dissipation and cause a voltage drop. This results in a small voltage swing that correlates to current through the path. Even if circuit 30 does not using the LT3790, it would be prudent to take this small voltage (measured across the current sense resistor) and multiply it by some factor in order to make it easier to read the full range of currents by an external device like an Analog to Digital Converter.
In one exemplary embodiment, downstream from the regulator 32 is a second fire source arming switch. This second fire source arming switch may be the fire source output arming switch 100. The fire source output arming switch 100 may be constructed similar to that of the fire source input arming switch that is part of the input protector 34. The output arming switch 100 may be positioned along pathway 58 within the fire path control 40.
The fire path control 40 is coupled with the squib mux 102. The squib mux 102 is a multiplexer that enables the fire source circuit 30 to fire multiple squibs in one or more of the countermeasure expendables 20. For example, in a common carriage application, each one of the fire sources has eight different squib locations that it can fire. Each of the squib mux switches 104 corresponds to a squib. The squib mux switch 104N represents that the number of squib mux switches 104 may be represented by any integer number of switches within the switch mux 102. The output of squib mux 102 is sent downstream along pathway 70 (See FIG. 3) to the load 50 which corresponds to a squib.
The voltage discharge 46 represents a discharge circuit on the output of the voltage pin 92 from the regulator 32. Voltage discharge 46 enables the voltage to be reset to 0 to thereby resetting the wait times between discharges. Thus, when the fire source circuit 30 is turned off, the voltage discharge 46 returns the output to 0 volts rapidly. Another advantage of the voltage discharge 46 is that many countermeasure controllers 18 perform built in tests where they fire their fire source into a simulated squib load. Thus, the voltage discharge 46, and more particularly the discharge circuit in the voltage discharge 46, has a 1-ohm power resistor 110. Thus, if the system operator wants to fire the fire source circuit 30 into a built-in test (BIT) load and check that it is regulating properly, the system enables that feature without having to switch into any squib locations. In one particular example, the BIT load for current capability testing is at 1 ohm. However, other resistance levels are entirely possible.
FIG. 5 depicts a table representing the power efficiencies of the fire source circuit 30 compared to a legacy fire source control circuit. As shown in FIG. 5, the Table identifies one of the advantages of the efficiency of the regulator 32. Legacy systems utilized 168 watts of platform power to dissipate 132 watts at the source for a conventional legacy squib and for a Zener squib 130 watts of platform power needed to be drawn to dissipate 30 watts at the source. For example, when firing a low side 1 ohm squib with 6 A, a legacy source would draw 168W from a 28V platform supply while only delivering 36W to a squib (with the rest dissipated as waste heat in the fire source). Similarly, for a Zener diode squib fire of 5 A / 20 V (4 ohm equivalent load), a legacy fire source would require 130W from a platform in order to deliver 100W to a Zener diode squib, with 30W dissipated in the fire source.
The advantages are shown with fire source circuit 30 having regulator 32 that, for the same low side squib fire (6 A delivered to a 1 ohm squib), only require 42.4W from the platform in order to deliver 36W to a squib. This means that only 6.4W is dissipated in the fire source (instead of the legacy 132W). Likewise, for a Zener squib fire of 5 A , 20V (5 A fire into 4 ohm equivalent load), the new fire source circuit 30 requires 111W of platform power to deliver 100W to a squib, and 11W are dissipated in the fire source. Thus, it can be seen that the addition of the regulator 32, and more particularly the buck boost regulator 32, offers advantages over legacy fire source circuits. Thus, with respect to a normal squib, approximately 4 squibs fires can be accomplished with the same amount of power that was previously required to fire one squib under a legacy fire source control circuit. The cooling referring to the source dissipation only requires 6.4 watts to be dissipated as opposed to previously requiring 132 watts. This is a significant efficiency and advantage of utilizing the regulator 32 in the fire source circuit 30.
In addition to the power efficiencies discussed above, the fire source circuit 30 also improves thermal efficiency. With continued reference to the legacy example of FIG. 5, in a normal squib, 132W is dissipated in the legacy fire circuit during the course of a squib fire (which can be up to 60 milliseconds depending on squib type). This is a significant amount of heat to dissipate (even for short durations). As such, the legacy system had bulky components that had to be used. This heat also imposed fire duty cycle limitations that needed to be implemented for each fire source in order to prevent thermal failure. In contrast, the circuit 30 of the present disclosure only needs to dissipate 6.4W (or Ë5% of the amount of power that the legacy fire source circuit dissipates), which means that the circuit 30 can be more compact and still capable of continuous use without overheating. Not only can the fire source circuit 30 be smaller and/or more compact and be operated 100% of the time if required, but the higher efficiency operation also has positive thermal impacts for other parts of the design as well. Adjacent components on the circuit card will not be heated up as much as they were in a legacy fire source, and upstream power path components (path 52, 31, and platform wiring that hooks up to 31) do not need to deliver as much current to the fire source circuit 30 as they would have for the legacy fire source circuit. This reduces transient heating of the input supply power path components and wiring compared to the legacy fire source circuit. In the normal squib example, 6 A would be drawn from the platform 28V power supply. For the same fire source circuit with circuit 30, only about 1.52 A needs to be drawn. With continued reference to this example, the primary power path component in the legacy circuit tends to be a very large MOSFET (something like a D2PAK package, which takes up 10Ă15 mm of board space) and the exemplary circuit 30 replaces it with smaller power path components (4Ă3.3Ă3.3mm MOSFETS+a 6.5Ă6.7 mm inductor). As such, the power path components are more compact and also capable of continuous operation.
Having thus described the schematics of the circuit 30, when used as a fire source circuit, within the CMC 18, as well as some of its advantages, reference will now be made to its operation, some of which has been previously described.
FIG. 6 is a flowchart that depicts an exemplary method or process for firing a squib with fire source circuit 30, which is shown generally at 600. With respect to squib firing, platform voltage is input at the input 31. The voltage moves along pathway 52 to the input protector 34. The input protector 34 has an FPGA and hardware interlock 112 that is coupled with the fire source input arming switch 114. The FPGA and hardware interlock 112 may be a âgateâ that has a sensor, such as a weight on wheels sensor, and an FPGA input. Thus, the combination of the hardware and the FPGA operate to determine when it is safe to fire one of the squibs. The enabling of the input protector is shown generally at box 602 within method 600.
Method 600 further includes setting the dual DAC 84 to set its current control 86 and its voltage control 88 to specified values. In one embodiment, the voltage control is set to 0 volts and current control is set to 6 amps, or another value that is needed to fire a squib. The current control is transferred from the DAC 84 along pathway 86 to the control pin 82 in the buck boost regulator 32. The voltage control is transferred along pathway 88 along the feedback mechanism or feedback loop from feedback pin 90 on the buck boost regulator 32. Setting the DAC 84 to the specified voltage and current is shown generally at box 604 in method 600. In one exemplary embodiment, the DAC 84 is set to output voltages that are interpreted by the buck-boost regulator 32 as a voltage regulation and current regulation setpoints. The DAC output 86 may be adjusted from 0V to 1.2V to adjust regulator current from 0 A to 7.2 A , and output 88 on the DAC side of resistor 94 will adjust from 4.64V to 0V to set a fire source output voltage between 0V and 23.2V.
After setting the DAC to the specified voltage and current, as represented by box 604, the fire source circuit enables the output arming switch, as represented by box 606, which may also enable the squib mux 102 at the same time. Notably, any one of the switches 104 on the squib mux 102 may be enabled to receive the current and voltage to fire one of the squibs connected to the respective switch 104.
Subsequent to enabling the output arming switch, as shown by box 606, the DAC 84 is slewed at a linear rate to a set ramp rate or set ramp point, which is shown generally at box 608. Slewing the voltage control along pathway 88 for the DAC 84 of the voltage and current control 38 enables the fire pulse to be ramped in response to the slewing of the voltage from the DAC. This reduces transient stress on the fire source circuit 30 and, more particularly, reduces transient stress on the buck boost regulator 32. The slewing of the voltage control also reduces stress upstream of the fire source circuit 30. Namely, there is a reduction of stress on platform power that is input into the input 31. The slewing occurs until the DAC 84 reaches a constant current mode. This allows the full current to be delivered to the squib which will ultimately be fired in response to receipt of that full current. In one exemplary embodiment, the voltage set point should be slightly higher than the minimum voltage to deliver full current to the squib. For example, if the squib has a 1-ohm total path resistance with a minimum fire current of 6 amps, then the set point may be 8 volts. Thus, in Step 608, the DAC 84 slews the voltage control along pathway 88 to set the buck boost regulator 32 output to 8V. Before reaching 8V, the buck boost converter 32 will transition to a constant current mode while delivering the full fire current of 6 A. Thus, the DAC 84 transfers from constant voltage to constant current when the current limit is reached. Transferring into constant current is represented by Box 610.
Once constant current is reached, full current is delivered to the squib, box 612, and the regulator 32 will be in this state until the squib detonates. Once the squib detonates (somewhere before the end of the programmed fire pulse time), the regulator will transition back to constant voltage mode, with a feedback loop, as indicated by box 614. As such, the voltage feedback loop takes over and output voltage increases slightly after squib detonates and constant current load is removed. This may require a slight upward adjustment of the output voltage setpoint, but with no more current being delivered since the load has been removed.
Prior to the end of the electrical pulse, the squib has a pulse duration where the fire source is capable of delivering the full current to the squib that is longer than the squib is specified to discharge or explode. Thus, for example, if the squib is specified to explode when provided with 3 amps for at least 10 milliseconds, then the current is set to 6 amps to provide margin needed to detonate the squib and the pulse will extend for 20 milliseconds or more to ensure that the system has enough time to meet the specified detonation event. When the squib is fired, what was a 1-ohm bridge wire inside the squib is now a disconnected wire. Thus, this results in a high impedance due to the disconnected or exploded wire. At that point, since no current is being delivered, the voltage loop takes over as indicated by Box 614. After the voltage loop takes over at 614, then the squib mux 102 and the arming switch 100 are deactivated at Box 616. In one particular embodiment, the entire prescribed pulse duration (for example, 20 milliseconds) will happen before the fire source circuit 30 begins the deactivation process. Although the fire source circuit 30 has the ability to detect the squib fire and end the fire pulse earlier, operating the fire pulse for the full programmed duration ensures that the fire source circuit 30 fires a mission-critical squib even if the fire detection circuitry is not functioning properly.
After activating the output discharge circuit, the fire source circuit sets the current control of the DAC to 0 amps and it sets the voltage control of the DAC to 0 volts, as indicated by Box 618. This effectively returns the DAC to a ready state to start another pulse to be sent to another squib at another mux location.
After the prescribed amount of time (i.e., the fire pulse duration), in this example 20 milliseconds, the power source should be turned off and the output should be discharged. Accordingly, the output discharge circuit is activated, namely the output voltage discharge 46 is activated, as indicated by Box 620.
Once all the desired squibs or countermeasure expendables 20 have been discharged, the input protector 34 may be disabled, as shown by box 622. Disabling the input protector at box 622 may perform a process that is opposite of the enablement of input protector 34 described with respect to box 602.
In one exemplary embodiment, the fire source pulse current limit may be programmable via a FPGA. The register of this FPGA may write the current to have a minimum fire amount of about 4 amps up to a maximum of about 7 amps. This current may be written by the register of the FPGA in increments of 0.1 amps or less. The accuracy of the fire source, (per the fire source controller datasheet) is a current setpoint accuracy of +/â6%. The range from about 4-7 A is a typical current range that squibs may need to see for âall fireâ (with some additional headroom on the high end). The 0.1 A or less increment is selected based on the resolution of the DAC that drives the current control pin.
In one exemplary embodiment, the fire source pulse voltage limit may be programmable via a FPGA. The register of this FPGA may write the voltage to have a minimum amount of 0V up to a maximum of about 23.2V, although the implementation may decide to keep the voltage lower in order to limit power delivered during the squib fire. This voltage may be written by the register of the FPGA in increments of 0.1 V or less. The voltage setpoint should be accurate within ±2%.
The circuit 30 has just been described above for the instances and modalities for usage in squib firing. However, as mentioned previously, circuit 30 can also be used for squib polling, and/or squib communication. When circuit 30 is performing squib polling, and/or squib SSCI communications, the circuit 30 may be referred to as a polling and communication circuit 30.
Referring back to FIG. 3 and FIG. 4, the polling and communication circuit 30 may perform polling and communication operations. Input voltage from input 31 moves along pathway 60 to the polling regulator 36. Within the polling regulator 36 is a DC/DC regulator 106. In one example, the DC/DC regulator 106 is a LTM8032 regulator. The polling and SSCI communications voltage originates in the regulator 106. The actual voltage of the regulator 106 may vary depending on the application-specific needs of fire source circuit 30. In one particular embodiment, regulator 106 regulates a 10-volt supply from input 31, however other voltages are entirely possible. Polling refers to determining or checking the presence of a squib within one of the countermeasure expendables 20. From the polling regulator 36, pathway 62 extends to the polling and communication switch 42 that includes a resistor bank 108. The resistor bank 108 performs current limiting to inhibit or prevent more than the 10-volt supply divided by the resistance of the bank 108 (e.g., for example, a 100-ohm resistance) to ensure that a safe polling or communication current is significantly less than the 1-amp no fire current that is utilized to fire one of the squibs.
The polling and communication switch 42 is part of the polling and communication control 44. The control 44 enables communications to occur through an SSCI interface, when such an interface is present on the squib. Communication may be accomplished through the use of the same voltage from the front-end polling source originating from regulator 36.
FIG. 7 depicts an exemplary method or process of polling a squib with the fire source circuit 30, which is shown generally at 700. Method 700 includes the step of enabling the poll path, which is shown generally at 702. In one embodiment, enabling the poll path is accomplished by activating the path with an FPGA control signal. Activating the path with an FPGA control signal results in the enabling of the pathway from the input 31 to the squib mux 102 to be activated to receive a polling request to determine the presence of a squib or countermeasure expendable 20 that is coupled to the fire source circuit 30. After enabling the polling pathway 68 by activating the path with an FPGA control signal, method 700 reads the voltage in an analog to digital converter (ADC) at the junction 116 where the squib mux 102 meets the diodes 118, 120. Reading the voltage at junction 116 is shown in method 700 at Box 704. The voltage value that is read or detected at junction 116 is what allows the squib to be polled for its presence. Reading the voltage by the ADC at junction 116 operates as a built-in test check when firing to ensure that firing voltage is sufficiently high, and that the polling voltage measurement is sufficiently low so that the squib will not accidentally fire. For example, at junction 116, a fired squib may read a voltage of approximately 10 volts. This would depend on the voltage that 106 generates (in some implementations this is 16V), and also depends on what the squib's fired resistance looks like. For example, some squibs are specified to have 500 ohms or greater resistance after they fire, so there may be voltages lower than 10V that correspond to a fired squib.
At junction 116, a Zener diode squib (e.g., an SSCI communication enabled squib) would read a voltage reading of about 6.2 volts. At junction 116, a conventional legacy squib would read a voltage of approximately 100 mV (e.g., when using a 10V supply and 100Ω current limiting network, which is what is used in this exemplary instantiation or implementation, but there are other voltages are possible which would result in different voltage readings for the squib). Yet, this voltage of approximately 100 mV is dependent upon the implementation of the squib mux. For example, a legacy squib mux uses P-channel FETs which will add about 2V to 3V to the measurement. If circuit 30 uses N-channel FETs, then a measurement all the way down to 100 mV is possible. Note that circuit 30 can distinguish between a present legacy squib and a short circuit condition, whereas the legacy implementation made it more difficult to distinguish the difference between these the presence of a squib and a short circuit. In circuit 30, if there is a short circuit, junction 116 will read lower than 100 mV that corresponds to a âfaultyâ squib. Thus, based on these observed voltages, the fire source circuit 30 can provide information to the CMC 18 or another component of the CMDS regarding the presence of squib in the countermeasure expendable.
After reading the voltage at box 704, two options are available after reading the voltage at junction 116. The first option, which is represented by box 706, corresponds to changing the squib switch mux logic or FPGA signal to a new switch 104 location. This allows for source pulsing and fast inventory checks without needing to toggle the path on and off. Because this is not operating like the fire pathway, everything does not need to be turned off when looking to poll another squib. Cycling through the different squib switch 104 locations would be accomplished by cycling through various enable signals on each respective independent switch 104. In one embodiment this is accomplished via an analog switch that is only connected to one switch 104 location at a given time to thereby further act as another safety mechanism. This would prevent accidental polling of two squibs at the same time.
Referring back to after the voltage has been read at junction 116, the second option, which is represented by box 708, may turn off the squib mux path and shut off the polling path. This is accomplished by deactivating or turning off the digital control from the FPGA to turn off the polling path. The switch in the squib mux can switch to another squib if a first squib was detected as absent. Additionally, CMCs may periodically poll all squib locations, regardless of the previously reported status.
FIG. 8 depicts an exemplary method or process of performing SSCI communications through the fire source circuit 30. The method is shown generally at 800. Method 800 may include enabling the SSCI regulator 122. The regulator 122 may be a shunt regulator that is part of the polling and communication control 44. The shunt of regulator 122 is represented by the Zener and the two resistors shown in FIG. 4. This exemplary regulator 122 may be a 5.5-volt regulator. Encompassed within the step represented by Box 802 may also be the step of enabling a redundant SSCI path switch which is represented by a redundant transistor 124. This redundant SSCI path switch means that even if the SSCI circuitry is damaged, the redundant switch 124 can be deactivated so as not to disrupt the polling path which would still permit the operation of method 700 detailed previously.
After enabling the SSCI regulator 122, method 800 includes enabling the SSCI path switch which is accomplished by enabling the digital control from the FPGA, which is shown by box 804. The SSCI enable signal moves along pathway 64 between the digital control or FPGA and the polling and communication control 44. The next step of method 800 for SSCI communication with fire source circuit 30 includes the transmission of the SSCI communication signal by the transmitter toggling to pull its bus to about 3.5 volts, which is represented by box 806. This is accomplished by the SSCI FPGA transmitter 126 that is coupled to another shunt regulator 128. In one embodiment, the second shunt regulator 128 regulates a voltage, such as about 3.5 V in response to enablement of the FPGA transmitter 126. When disabled, the bus returns to 5.5V, which is being regulated by 122. In the shown embodiment, the first regulator 122 is on and activated to 5.5 volts during the entirety of the time in which SSCI communications are traveling to the squib. However, the second shunt regulator 128 set to 3.5 volts is only activated when necessary to communicate either a logic 1 (i.e., inactive) or a logic 0 (i.e., active) to the squib. In the idle state (5.5V regulator active, 3.5V TX regulator dormant), the bus is at a logic â1â. When the TX control is activated and the bus is pulled to 3.5V, this represents a logic â0â.
Stated otherwise, the two regulators 122 and 128 operate as a bus that, at idle, sits at 5.5 volts. Then, the communications are triggered and enabled by pulling the voltage down to 3.5 volts. Thus, the transmission of the SSCI signal at box 806 is accomplished by pulling the voltage from a higher first voltage down to a lower second voltage when the communication needs to occur. As part of a typical half-duplex UART communication protocol, the bus is high at idle, and the initiator of communications (platform here) will begin by pulling the bus low prior to transmitting a message. This permits communication with the SSCI squib at 3.5 volts. Subsequent communication may comprise a mixture of 3.5V and 5.5V signal levels, corresponding to a mixture of logic 1s and 0s.
The next step of method 800 includes receiving the SSCI communication in a receiver 130 that is part of the polling and communication control 44. The reception in the receiver 130 is represented by box 808 in method 800. When SSCI communication signals are being transmitted, the SSCI communication path will also observe the transmissions, high and low, in whatever digital device that is controlling and monitoring the FPGA at the receiver 130. In one particular example, this is configured as a half-duplex interface. When embodied as a half-duplex interface, the expendable uses the same pathway or line to communicate back to the polling and communication control 44. Thus, the receiver 130 may be embodied as a comparator to measure the crossing or passing of signals as they are transmitted and received relative to the SSCI capable expendable.
With continued reference to method 800, after the communications are complete and have been received at box 808, the squib mux path may be shut off, as represented by box 810. Shutting off the squib mux may be accomplished by deactivating the digital control or FPGA to thereby shut off the SSCI poll path switch. Shutting off the squib mux path and the SSCI path enables both regulators 122 and 128 to be pulled low to logic 0 to thereby and effectively be turned off.
As described herein, aspects of the present disclosure may include one or more electrical or other similar secondary components and/or systems therein. The present disclosure is therefore contemplated and will be understood to include any necessary operational components thereof. For example, electrical components will be understood to include any suitable and necessary wiring, fuses, or the like for normal operation thereof. Alternatively, where feasible and/or desirable, various components of the present disclosure may be integrally formed as a single unit.
Various inventive concepts may be embodied as one or more methods, of which an example has been provided. The acts performed as part of the method may be ordered in any suitable way. Accordingly, embodiments may be constructed in which acts are performed in an order different than illustrated, which may include performing some acts simultaneously, even though shown as sequential acts in illustrative embodiments.
While various inventive embodiments have been described and illustrated herein, those of ordinary skill in the art will readily envision a variety of other means and/or structures for performing the function and/or obtaining the results and/or one or more of the advantages described herein, and each of such variations and/or modifications is deemed to be within the scope of the inventive embodiments described herein. More generally, those skilled in the art will readily appreciate that all parameters, dimensions, materials, and configurations described herein are meant to be exemplary and that the actual parameters, dimensions, materials, and/or configurations will depend upon the specific application or applications for which the inventive teachings is/are used. Those skilled in the art will recognize or be able to ascertain using no more than routine experimentation, many equivalents to the specific inventive embodiments described herein. It is, therefore, to be understood that the foregoing embodiments are presented by way of example only and that, within the scope of the appended claims and equivalents thereto, inventive embodiments may be practiced otherwise than as specifically described and claimed. Inventive embodiments of the present disclosure are directed to each individual feature, system, article, material, kit, and/or method described herein. In addition, any combination of two or more such features, systems, articles, materials, kits, and/or methods, if such features, systems, articles, materials, kits, and/or methods are not mutually inconsistent, is included within the inventive scope of the present disclosure.
The above-described embodiments can be implemented in any of numerous ways. For example, embodiments of technology disclosed herein may be implemented using hardware, software, firmware or a combination thereof. When implemented in software, the software code or instructions can be executed on any suitable processor or collection of processors, whether provided in a single computer or distributed among multiple computers or in firmware. Furthermore, the instructions or software code can be stored in at least one non-transitory computer readable storage medium.
Also, a computer or smartphone may be utilized to execute the software code or instructions via its processors may have one or more input and output devices. These devices can be used, among other things, to present a user interface. Examples of output devices that can be used to provide a user interface include printers or display screens for visual presentation of output and speakers or other sound generating devices for audible presentation of output. Examples of input devices that can be used for a user interface include keyboards, and pointing devices, such as mice, touch pads, and digitizing tablets. As another example, a computer may receive input information through speech recognition or in other audible format.
Such computers or smartphones may be interconnected by one or more networks in any suitable form, including a local area network or a wide area network, such as an enterprise network, and intelligent network (IN) or the Internet. Such networks may be based on any suitable technology and may operate according to any suitable protocol and may include wireless networks, wired networks or fiber optic networks.
The various methods or processes outlined herein may be coded as software/instructions that is executable on one or more processors that employ any one of a variety of operating systems or platforms. Additionally, such software may be written using any of a number of suitable programming languages and/or programming or scripting tools, and also may be compiled as executable machine language code or intermediate code that is executed on a framework or virtual machine.
In this respect, various inventive concepts may be embodied as a computer readable storage medium (or multiple computer readable storage media) (e.g., a computer memory, one or more floppy discs, compact discs, optical discs, magnetic tapes, flash memories, USB flash drives, SD cards, circuit configurations in Field Programmable Gate Arrays or other semiconductor devices, or other non-transitory medium or tangible computer storage medium) encoded with one or more programs that, when executed on one or more computers or other processors, perform methods that implement the various embodiments of the disclosure discussed above. The computer readable medium or media can be transportable, such that the program or programs stored thereon can be loaded onto one or more different computers or other processors to implement various aspects of the present disclosure as discussed above.
The terms âprogramâ or âsoftwareâ or âinstructionsâ are used herein in a generic sense to refer to any type of computer code or set of computer-executable instructions that can be employed to program a computer or other processor to implement various aspects of embodiments as discussed above. Additionally, it should be appreciated that according to one aspect, one or more computer programs that when executed perform methods of the present disclosure need not reside on a single computer or processor but may be distributed in a modular fashion amongst a number of different computers or processors to implement various aspects of the present disclosure.
Computer-executable instructions may be in many forms, such as program modules, executed by one or more computers or other devices. Generally, program modules include routines, programs, objects, components, data structures, etc. that perform particular tasks or implement particular abstract data types. Typically, the functionality of the program modules may be combined or distributed as desired in various embodiments. As such, one aspect or embodiment of the present disclosure may be a computer program product including least one non-transitory computer readable storage medium in operative communication with a processor, the storage medium having instructions stored thereon that, when executed by the processor, implement a method or process described herein, wherein the instructions comprise the steps to perform the method(s) or process(es) detailed herein.
Also, data structures may be stored in computer-readable media in any suitable form. For simplicity of illustration, data structures may be shown to have fields that are related through location in the data structure. Such relationships may likewise be achieved by assigning storage for the fields with locations in a computer-readable medium that convey relationship between the fields. However, any suitable mechanism may be used to establish a relationship between information in fields of a data structure, including through the use of pointers, tags or other mechanisms that establish relationship between data elements.
All definitions, as defined and used herein, should be understood to control over dictionary definitions, definitions in documents incorporated by reference, and/or ordinary meanings of the defined terms.
âLogicâ, as used herein, includes but is not limited to hardware, firmware, software, and/or combinations of each to perform a function(s) or an action(s), and/or to cause a function or action from another logic, method, and/or system. For example, based on a desired application or needs, logic may include a software controlled microprocessor, discrete logic like a processor (e.g., microprocessor), an application specific integrated circuit (ASIC), a programmed logic device, a memory device containing instructions, an electric device having a memory, or the like. Logic may include one or more gates, combinations of gates, or other circuit components. Logic may also be fully embodied as software. Where multiple logics are described, it may be possible to incorporate the multiple logics into one physical logic. Similarly, where a single logic is described, it may be possible to distribute that single logic between multiple physical logics.
Furthermore, the logic(s) presented herein for accomplishing various methods of this system may be directed towards improvements in existing computer-centric or internet-centric technology that may not have previous analog versions. The logic(s) may provide specific functionality directly related to structure that addresses and resolves some problems identified herein. The logic(s) may also provide significantly more advantages to solve these problems by providing an exemplary inventive concept as specific logic structure and concordant functionality of the method and system. Furthermore, the logic(s) may also provide specific computer implemented rules that improve existing technological processes. The logic(s) provided herein extends beyond merely gathering data, analyzing the information, and displaying the results. Further, portions or all of the present disclosure may rely on underlying equations that are derived from the specific arrangement of the equipment or components as recited herein. Thus, portions of the present disclosure as it relates to the specific arrangement of the components are not directed to abstract ideas. Furthermore, the present disclosure and the appended claims present teachings that involve more than performance of well-understood, routine, and conventional activities previously known to the industry. In some of the method or process of the present disclosure, which may incorporate some aspects of natural phenomenon, the process or method steps are additional features that are new and useful.
The articles âaâ and âan,â as used herein in the specification and in the claims, unless clearly indicated to the contrary, should be understood to mean âat least one.â The phrase âand/or,â as used herein in the specification and in the claims (if at all), should be understood to mean âeither or bothâ of the elements so conjoined, i.e., elements that are conjunctively present in some cases and disjunctively present in other cases. Multiple elements listed with âand/orâ should be construed in the same fashion, i.e., âone or moreâ of the elements so conjoined. Other elements may optionally be present other than the elements specifically identified by the âand/orâ clause, whether related or unrelated to those elements specifically identified. Thus, as a non-limiting example, a reference to âA and/or Bâ, when used in conjunction with open-ended language such as âcomprisingâ can refer, in one embodiment, to A only (optionally including elements other than B); in another embodiment, to B only (optionally including elements other than A); in yet another embodiment, to both A and B (optionally including other elements); etc. As used herein in the specification and in the claims, âorâ should be understood to have the same meaning as âand/orâ as defined above. For example, when separating items in a list, âorâ or âand/orâ shall be interpreted as being inclusive, i.e., the inclusion of at least one, but also including more than one of a number or list of elements, and, optionally, additional unlisted items. Only terms clearly indicated to the contrary, such as âonly one ofâ or âexactly one of,â or, when used in the claims, âconsisting of,â will refer to the inclusion of exactly one element of a number or list of elements. In general, the term âorâ as used herein shall only be interpreted as indicating exclusive alternatives (i.e. âone or the other but not bothâ) when preceded by terms of exclusivity, such as âeither,â âone of,â âonly one of,â or âexactly one of.â âConsisting essentially of,â when used in the claims, shall have its ordinary meaning as used in the field of patent law.
As used herein in the specification and in the claims, the phrase âat least one,â in reference to a list of one or more elements, should be understood to mean at least one element selected from any one or more of the elements in the list of elements, but not necessarily including at least one of each and every element specifically listed within the list of elements and not excluding any combinations of elements in the list of elements. This definition also allows that elements may optionally be present other than the elements specifically identified within the list of elements to which the phrase âat least oneâ refers, whether related or unrelated to those elements specifically identified. Thus, as a non-limiting example, âat least one of A and Bâ (or, equivalently, âat least one of A or B,â or, equivalently âat least one of A and/or Bâ) can refer, in one embodiment, to at least one, optionally including more than one, A, with no B present (and optionally including elements other than B); in another embodiment, to at least one, optionally including more than one, B, with no A present (and optionally including elements other than A); in yet another embodiment, to at least one, optionally including more than one, A, and at least one, optionally including more than one, B (and optionally including other elements); etc.
While components of the present disclosure are described herein in relation to each other, it is possible for one of the components disclosed herein to include inventive subject matter, if claimed alone or used alone. In keeping with the above example, if the disclosed embodiments teach the features of components A and B, then there may be inventive subject matter in the combination of A and B, A alone, or B alone, unless otherwise stated herein.
As used herein in the specification and in the claims, the term âeffectingâor a phrase or claim element beginning with the term âeffectingâ should be understood to mean to cause something to happen or to bring something about. For example, effecting an event to occur may be caused by actions of a first party even though a second party actually performed the event or had the event occur to the second party. Stated otherwise, effecting refers to one party giving another party the tools, objects, or resources to cause an event to occur. Thus, in this example a claim element of âeffecting an event to occurâ would mean that a first party is giving a second party the tools or resources needed for the second party to perform the event, however the affirmative single action is the responsibility of the first party to provide the tools or resources to cause said event to occur.
When a feature or element is herein referred to as being âonâ another feature or element, it can be directly on the other feature or element or intervening features and/or elements may also be present. In contrast, when a feature or element is referred to as being âdirectly onâ another feature or element, there are no intervening features or elements present. It will also be understood that, when a feature or element is referred to as being âconnectedâ, âattachedâ or âcoupledâ to another feature or element, it can be directly connected, attached or coupled to the other feature or element or intervening features or elements may be present. In contrast, when a feature or element is referred to as being âdirectly connectedâ, âdirectly attachedâ or âdirectly coupledâ to another feature or element, there are no intervening features or elements present. Although described or shown with respect to one embodiment, the features and elements so described or shown can apply to other embodiments. It will also be appreciated by those of skill in the art that references to a structure or feature that is disposed âadjacentâ another feature may have portions that overlap or underlie the adjacent feature.
Spatially relative terms, such as âunderâ, âbelowâ, âlowerâ, âoverâ, âupperâ, âaboveâ, âbehindâ, âin front ofâ, and the like, may be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. For example, if a device in the figures is inverted, elements described as âunderâ, or âbeneathâ other elements or features would then be oriented âoverâ the other elements or features. Thus, the exemplary term âunderâ can encompass both an orientation of over and under. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly. Similarly, the terms âupwardlyâ, âdownwardlyâ, âverticalâ, âhorizontalâ, âlateralâ, âtransverseâ, âlongitudinalâ, and the like are used herein for the purpose of explanation only unless specifically indicated otherwise.
Although the terms âfirstâ and âsecondâ may be used herein to describe various features/elements, these features/elements should not be limited by these terms, unless the context indicates otherwise. These terms may be used to distinguish one feature/element from another feature/element. Thus, a first feature/element discussed herein could be termed a second feature/element, and similarly, a second feature/element discussed herein could be termed a first feature/element without departing from the teachings of the present invention.
An embodiment is an implementation or example of the present disclosure. Reference in the specification to âan embodiment,â âone embodiment,â âsome embodiments,â âone particular embodiment,â âan exemplary embodiment,â or âother embodiments,â or the like, means that a particular feature, structure, or characteristic described in connection with the embodiments is included in at least some embodiments, but not necessarily all embodiments, of the invention. The various appearances âan embodiment,â âone embodiment,â âsome embodiments,â âone particular embodiment,â âan exemplary embodiment,â or âother embodiments,â or the like, are not necessarily all referring to the same embodiments.
If this specification states a component, feature, structure, or characteristic âmayâ, âmightâ, or âcouldâ be included, that particular component, feature, structure, or characteristic is not required to be included. If the specification or claim refers to âaâ or âanâ element, that does not mean there is only one of the element. If the specification or claims refer to âan additionalâ element, that does not preclude there being more than one of the additional element.
As used herein in the specification and claims, including as used in the examples and unless otherwise expressly specified, all numbers may be read as if prefaced by the word âaboutâ or âapproximately,â even if the term does not expressly appear. The phrase âaboutâ or âapproximatelyâ may be used when describing magnitude and/or position to indicate that the value and/or position described is within a reasonable expected range of values and/or positions. For example, a numeric value may have a value that is +/â0.1% of the stated value (or range of values), +/â1% of the stated value (or range of values), +/â2% of the stated value (or range of values), +/â5% of the stated value (or range of values), +/â10% of the stated value (or range of values), etc. Any numerical range recited herein is intended to include all sub-ranges subsumed therein.
Additionally, the method of performing the present disclosure may occur in a sequence different than those described herein. Accordingly, no sequence of the method should be read as a limitation unless explicitly stated. It is recognizable that performing some of the steps of the method in a different order could achieve a similar result.
In the claims, as well as in the specification above, all transitional phrases such as âcomprising,â âincluding,â âcarrying,â âhaving,â âcontaining,â âinvolving,â âholding,â âcomposed of,â and the like are to be understood to be open-ended, i.e., to mean including but not limited to. Only the transitional phrases âconsisting ofâ and âconsisting essentially ofâ shall be closed or semi-closed transitional phrases, respectively, as set forth in the United States Patent Office Manual of Patent Examining Procedures.
To the extent that the present disclosure has utilized the term âinventionâin various titles or sections of this specification, this term was included as required by the formatting requirements of word document submissions pursuant the guidelines/requirements of the United States Patent and Trademark Office and shall not, in any manner, be considered a disavowal of any subject matter.
In the foregoing description, certain terms have been used for brevity, clearness, and understanding. No unnecessary limitations are to be implied therefrom beyond the requirement of the prior art because such terms are used for descriptive purposes and are intended to be broadly construed.
Moreover, the description and illustration of various embodiments of the disclosure are examples and the disclosure is not limited to the exact details shown or described.
1. A fire source circuit comprising:
an input and an output, wherein one or more signal pathways that extend downstream from the input to the output;
a switching regulator electrically connected to a signal pathway, wherein the switching regulator creates squib fire pulses that are transmitted downstream along the signal pathway to a squib; and
a voltage and current control connected to the switching regulator to control voltage and current settings of a fire source for the squib.
2. The fire source circuit of claim 1, wherein the switching regulator is a buck-boost regulator.
3. The fire source circuit of claim 1, further comprising:
a voltage loop operatively connecting the switching regulator and the voltage and current control.
4. The fire source circuit of claim 1, further comprising:
a current loop operatively connecting the switching regulator and the voltage and current control.
5. The fire source circuit of claim 1, wherein the voltage and current control includes:
a dual digital to analog converter (DAC) that sets an operational current and voltage, wherein the dual DAC generates a gradual ramp up in current or voltage over a ramp up time.
6. The fire source circuit of claim 5, wherein the ramp up time is about 1 ms.
7. The fire source circuit of claim 1, further comprising:
a feedback loop connected to an output of the switching regulator and connected to the voltage and current control;
wherein feedback loop enables the voltage and current control to alter a voltage set point in or substantially near real time.
8. The fire source circuit of claim 1, further comprising:
an input protector located along at least one pathway between the input and the switching regulator.
9. The fire source circuit of claim 8, further comprising:
an in-rush limiter in the input protector.
10. The fire source circuit of claim 1, further comprising:
a squib multiplexer (MUX); and
an output current that exceeds a minimum fire current of a squib that is in electrical communication with the squib MUX.
11. The fire source circuit of claim 1, further comprising:
an output protector located along at least one pathway between the switching regulator and the output of the fire source circuit.
12. A method comprising:
installing a fire source circuit in a countermeasure system, wherein after the fire source circuit is installed in the countermeasure system, a processor of the countermeasure system shall execute instructions to:
set, via a dual digital to analog converter (DAC), an operational current and voltage of the fire source circuit, wherein the dual DAC generates a gradual ramp up in current or voltage over a ramp up time at a ramp rate;
enable a switching regulator in the fire source circuit;
slew, at the dual DAC, voltage from a starting voltage value to a setpoint voltage value; and
deliver current from the switching regulator to a squib connected to a countermeasure expendable, wherein the squib explodes when the current exceeds a minimum fire current value for a period of time.
13. The method of claim 12, wherein after the fire source circuit is installed in the countermeasure system, the processor of the countermeasure system shall execute additional instructions to:
transition to constant current after the dual DAC has slewed to the set voltage value.
14. The method of claim 12, wherein the setpoint voltage value exceeds a minimum voltage needed to meet a squib dependent current setpoint.
15. The method of claim 12, wherein after the fire source circuit is installed in the countermeasure system, the processor of the countermeasure system shall execute additional instructions to:
enable an input protector located along at least one pathway between the input and the switching regulator.
14. The method of claim 12, wherein after the fire source circuit is installed in the countermeasure system, the processor of the countermeasure system shall execute additional instructions to:
enable an output protector located along at least one pathway between the switching regulator and the output of the fire source circuit.
15. The method of claim 12, wherein after the fire source circuit is installed in the countermeasure system, the processor of the countermeasure system shall execute additional instructions to:
enable a squib multiplexer (MUX); and
transfer, via a switch in the squib MUX, current to the squib that is thereto having current delivered.
16. The method of claim 12, wherein after the fire source circuit is installed in the countermeasure system, the processor of the countermeasure system shall execute additional instructions to:
disable, after the squib has triggered, an input protector located upstream from the switching regulator and disabling an output protector located downstream from the switching regulator.
17. The method of claim 12, wherein after the fire source circuit is installed in the countermeasure system, the processor of the countermeasure system shall execute additional instructions to:
control constant current delivered to the squib with a feedback loop that is operatively connected with the switching regulator.
18. The method of claim 12, wherein the switching regulator is a buck-boost regulator.