San Jose, California
United States
42
2013-02-28
41
2014-07-22
These are the the leading inventors for applications assigned to PERICOM SEMICONDUCTOR CORP.:
PERICOM SEMICONDUCTOR CORP. based in San Jose, US has been assigned the rights to these inventions. The list includes both Pending Applications and Patent Grants:
In-situ cable unplug detector operating during normal signaling mode
#2 | 2012-09-27 ✅ Patent 8,362,813 granted on 2013-01-29Re-driver with pre-emphasis injected through a transformer and tuned by an L-C tank
#3 | 2012-09-20 ✅ Patent 8,610,463 granted on 2013-12-17Redriver with output receiver detection that mirrors detected termination on output to input
#4 | 2012-04-12 ✅ Patent 8,675,714 granted on 2014-03-18Trace canceller with equalizer adjusted for trace length driving variable-gain amplifier with automatic gain control loop
#5 | 2010-12-09Dual-Output Triple-Vdd Charge Pump
#6 | 2010-05-27 ✅ Patent 7,808,282 granted on 2010-10-05Out-of-band signaling using detector with equalizer, multiplier and comparator
#7 | 2010-04-29 ✅ Patent 8,212,587 granted on 2012-07-03Redriver with output receiver detection that mirrors detected termination on output to input
#8 | 2009-06-09 ✅ Patent 7,545,834 granted on 2009-06-09Multiple channel switch using differential de-mux amplifier and differential mux equalizer
#9 | 2009-02-03 ✅ Patent 7,485,007 granted on 2009-02-03Swiveling offset adapter dongle for reducing blockage of closely-spaced video connectors
#10 | 2009-01-20 ✅ Patent 7,480,303 granted on 2009-01-20Pseudo-ethernet switch without ethernet media-access-controllers (MAC's) that copies ethernet context registers between PCI-express ports
#11 | 2008-12-09 ✅ Patent 7,464,174 granted on 2008-12-09Shared network-interface controller (NIC) using advanced switching (AS) turn-pool routing field to select from among multiple contexts for multiple processors
#12 | 2008-06-24 ✅ Patent 7,391,251 granted on 2008-06-24Pre-emphasis and de-emphasis emulation and wave shaping using a programmable delay without using a clock
#13 | 2008-05-20 ✅ Patent 7,375,563 granted on 2008-05-20Duty cycle correction using input clock and feedback clock of phase-locked-loop (PLL)
#14 | 2008-04-22 ✅ Patent 7,363,417 granted on 2008-04-22Optimized topographies for dynamic allocation of PCI express lanes using differential muxes to additional lanes to a host
#15 | 2007-12-11 ✅ Patent 7,308,523 granted on 2007-12-11Flow-splitting and buffering PCI express switch to reduce head-of-line blocking
#16 | 2007-08-21 ✅ Patent 7,259,589 granted on 2007-08-21Visual or multimedia interface bus switch with level-shifted ground and input protection against non-compliant transmission-minimized differential signaling (TMDS) transmitter
#17 | 2007-07-24 ✅ Patent 7,246,434 granted on 2007-07-24Method of making a surface mountable PCB module
#18 | 2007-03-29 ✅ Patent 7,332,977 granted on 2008-02-19Crystal clock generator operating at third overtone of crystal's fundamental frequency
#19 | 2007-02-06 ✅ Patent 7,173,495 granted on 2007-02-06Redundant back-up PLL oscillator phase-locked to primary oscillator with fail-over to back-up oscillator without a third oscillator
#20 | 2007-02-06 ✅ Patent 7,174,411 granted on 2007-02-06Dynamic allocation of PCI express lanes using a differential mux to an additional lane to a host
#21 | 2007-01-11 ✅ Patent 7,265,620 granted on 2007-09-04Wide-band high-gain limiting amplifier with parallel resistor-transistor source loads
#22 | 2006-12-12 ✅ Patent 7,149,956 granted on 2006-12-12Converging error-recovery for multi-bit-incrementing gray code
#23 | 2006-11-07 ✅ Patent 7,132,835 granted on 2006-11-07PLL with built-in filter-capacitor leakage-tester with current pump and comparator
#24 | 2006-10-24 ✅ Patent 7,126,829 granted on 2006-10-24Adapter board for stacking Ball-Grid-Array (BGA) chips
#25 | 2006-09-12 ✅ Patent 7,107,384 granted on 2006-09-12Dynamic PCI-bus pre-fetch with separate counters for commands of commands of different data-transfer lengths
#26 | 2006-06-27 ✅ Patent 7,068,064 granted on 2006-06-27Memory module with dynamic termination using bus switches timed by memory clock and chip select
#27 | 2006-05-30 ✅ Patent 7,053,725 granted on 2006-05-304X crystal frequency multiplier with op amp buffer between 2X multiplier stages
#28 | 2006-03-28 ✅ Patent 7,020,208 granted on 2006-03-28Differential clock signals encoded with data
#29 | 2006-03-21 ✅ Patent 7,015,766 granted on 2006-03-21CMOS voltage-controlled oscillator (VCO) with a current-adaptive resistor for improved linearity
#30 | 2006-02-21 ✅ Patent 7,002,423 granted on 2006-02-21Crystal clock generator operating at third overtone of crystal's fundamental frequency
#31 | 2006-02-21 ✅ Patent 7,002,422 granted on 2006-02-21Current-mirrored crystal-oscillator circuit without feedback to reduce power consumption
#32 | 2006-02-16 ✅ Patent 7,076,870 granted on 2006-07-18Manufacturing process for a surface-mount metal-cavity package for an oscillator crystal blank
#33 | 2006-01-24 ✅ Patent 6,989,692 granted on 2006-01-24Substrate-sensing voltage sensor for voltage comparator with voltage-to-current converters for both reference and input voltages
#34 | 2006-01-24 ✅ Patent 6,989,979 granted on 2006-01-24Active ESD shunt with transistor feedback to reduce latch-up susceptibility
#35 | 2005-11-15 ✅ Patent 6,965,253 granted on 2005-11-15Reduced-capacitance bus switch in isolated P-well shorted to source and drain during switching
#36 | 2005-09-06 ✅ Patent 6,940,318 granted on 2005-09-06Accurate voltage comparator with voltage-to-current converters for both reference and input voltages
#37 | 2005-08-16 ✅ Patent 6,930,550 granted on 2005-08-16Self-biasing differential buffer with transmission-gate bias generator
#38 | 2005-08-09 ✅ Patent 6,927,992 granted on 2005-08-09Trace-impedance matching at junctions of multi-load signal traces to eliminate termination
#39 | 2005-04-19 ✅ Patent 6,882,229 granted on 2005-04-19Divide-by-X.5 circuit with frequency doubler and differential oscillator
#40 | 2005-03-15 ✅ Patent 6,867,957 granted on 2005-03-15Stacked-NMOS-triggered SCR device for ESD-protection
#41 | 2005-02-22 ✅ Patent 6,859,109 granted on 2005-02-22Double-data rate phase-locked-loop with phase aligners to reduce clock skew
#42 | 2005-01-11 ✅ Patent 6,842,059 granted on 2005-01-11Muxed-output double-date-rate-2 (DDR2) register with fast propagation delay
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