Assignee profile:

AnaGlobe Technology, Inc.

City:

Hsinchu

Country:

Taiwan

Published Applications:

12

Last publication date:

2024-08-08

Patent Grants:

11

Last grant date:

2026-02-10

Top Inventors for applications by AnaGlobe Technology, Inc.

These are the the leading inventors for applications assigned to AnaGlobe Technology, Inc.:

Recent patent applications by AnaGlobe Technology, Inc.

AnaGlobe Technology, Inc. based in Hsinchu, TW has been assigned the rights to these inventions. The list includes both Pending Applications and Patent Grants:

#1 | 2024-08-08 ✅ Patent 12,547,811 granted on 2026-02-10
US20240265186A1
Physics

METHOD FOR ROUTING OF REDISTRIBUTION LAYERS IN IC PACKAGE

#2 | 2024-03-14 ✅ Patent 12,475,291 granted on 2025-11-18
US20240086606A1
Physics

METHOD FOR GENERATING ANALOG SCHEMATIC DIAGRAM BASED ON BUILDING BLOCK CLASSIFICATION AND REINFORCEMENT LEARNING

#3 | 2023-09-07 ✅ Patent 12,346,646 granted on 2025-07-01
US20230281371A1
Physics

METHOD OF WARPAGE-AWARE FLOORPLANNING FOR HETEROGENEOUS INTEGRATION STRUCTURE

#4 | 2023-08-31 ✅ Patent 12,190,033 granted on 2025-01-07
US20230274056A1
Physics

Method for parallelism-aware wavelength-routed optical networks-on-chip design

#5 | 2021-11-16 ✅ Patent 11,177,901 granted on 2021-11-16
US17074126
Electricity

Method of wavelength-division-multiplexing-aware clustering for on-chip optical routing

#6 | 2019-12-05 ✅ Patent 10,558,779 granted on 2020-02-11
US20190370433A1
Physics

Method of redistribution layer routing for 2.5-dimensional integrated circuit packages

#7 | 2019-04-18 ✅ Patent 10,635,771 granted on 2020-04-28
US20190114381A1
Physics

Method for parasitic-aware capacitor sizing and layout generation

#8 | 2018-06-14 ✅ Patent 10,216,963 granted on 2019-02-26
US20180165477A1
Physics

Method to protect an IC layout

#9 | 2018-02-01 ✅ Patent 9,928,334 granted on 2018-03-27
US20180032660A1
Physics

Redistribution layer routing for integrated fan-out wafer-level chip-scale packages

#10 | 2013-11-07 ✅ Patent 8,910,303 granted on 2014-12-09
US20130298262A1
Physics

System and method for manipulating security of integrated circuit layout

#11 | 2010-11-11
US20100287519A1
Physics

METHOD AND SYSTEM FOR CONSTRUCTING A CUSTOMIZED LAYOUT FIGURE GROUP

#12 | 2006-11-16 ✅ Patent 7,222,321 granted on 2007-05-22
US20060259882A1
Physics

System and method for manipulating an integrated circuit layout

Also check out AnaGlobe Technology, Inc.'s (Hsinchu, Taiwan) applicant profile with 11 patent applications submitted.

AssigneeID:

131802 ⎘