San Jose, California
United States
29
2026-03-03
29
2026-03-03
These are the the leading inventors for applications assigned to PARADE TECHNOLOGIES, LTD.:
PARADE TECHNOLOGIES, LTD. based in San Jose, US has been assigned the rights to these inventions. The list includes both Pending Applications and Patent Grants:
Methods and systems for determining orientation information of passive styluses
#2 | 2025-10-02 ✅ Patent 12,572,236 granted on 2026-03-10Methods and Systems for Controlling Waveforms for Reducing Electromagnetic Interference Harmonics
#3 | 2025-04-03 ✅ Patent 12,554,670 granted on 2026-02-17Controlling Electrical Idle States in Retimer Outputs
#4 | 2025-03-06 ✅ Patent 12,449,878 granted on 2025-10-21Exiting of Low Power Modes of Redrivers and Retimers
#5 | 2024-11-21 ✅ Patent 12,647,304 granted on 2026-06-02Dynamic In-Situ Adaptation of Data Interface
#6 | 2024-10-17 ✅ Patent 12,137,157 granted on 2024-11-05Clock recovery optimization in data interfaces
#7 | 2024-10-03 ✅ Patent 12,362,970 granted on 2025-07-15Adaptive Preset-Based Feed-Forward Equalization
#8 | 2024-09-19 ✅ Patent 12,206,409 granted on 2025-01-21Floating voltage suppression in high speed multiplexers
#9 | 2024-07-04 ✅ Patent 12,166,490 granted on 2024-12-10Controlling duty cycle distortion with digital circuit
#10 | 2024-07-04 ✅ Patent 12,235,781 granted on 2025-02-25Power consumption control for transmitters of retimers in high speed data communication
#11 | 2024-06-04 ✅ Patent 12,003,241 granted on 2024-06-04Controlling duty cycle distortion with a mixed-signal circuit
#12 | 2024-05-30 ✅ Patent 12,278,636 granted on 2025-04-15Receiver circuit with automatic DC offset cancellation in display port applications
#13 | 2024-05-14 ✅ Patent 11,983,365 granted on 2024-05-14Methods and systems for determining stylus orientation information
#14 | 2024-02-15 ✅ Patent 12,456,977 granted on 2025-10-28Continuous Time Linear Equalizers (CTLEs) of Data Interfaces
#15 | 2023-11-02 ✅ Patent 12,052,020 granted on 2024-07-30Methods and systems for controlling frequency and phase variations for PLL reference clocks
#16 | 2023-11-02 ✅ Patent 12,040,804 granted on 2024-07-16Methods and systems for controlling frequency variation for a PLL reference clock
#17 | 2023-07-20 ✅ Patent 12,222,611 granted on 2025-02-11Variable pitch fan-out routing for display panels having narrow borders
#18 | 2023-02-16 ✅ Patent 12,560,844 granted on 2026-02-24Dual-Side Folded Source Driver Outputs of a Display Panel Having a Narrow Border
#19 | 2022-12-01 ✅ Patent 11,676,974 granted on 2023-06-13Distributed and multi-group pad arrangement
#20 | 2022-12-01 ✅ Patent 11,592,715 granted on 2023-02-28Pad arrangement in fan-out areas of display devices
#21 | 2022-04-21 ✅ Patent 11,683,204 granted on 2023-06-20High speed data links with low-latency retimer
#22 | 2020-04-02 ✅ Patent 10,732,750 granted on 2020-08-04Common electrode driving in integrated display arrays
#23 | 2019-06-06 ✅ Patent 10,540,314 granted on 2020-01-21System transparent retimer
#24 | 2019-03-07 ✅ Patent 11,157,108 granted on 2021-10-26Modified sensor electrodes for optimized edge detection in touch-sensitive displays
#25 | 2019-02-28 ✅ Patent 11,681,380 granted on 2023-06-20Adaptive electrode arrangement in a capacitive sense array
#26 | 2018-12-20 ✅ Patent 10,613,695 granted on 2020-04-07Integrated touch sensing and force sensing in a touch detection device
#27 | 2018-09-27 ✅ Patent 10,338,439 granted on 2019-07-02Touch detection using common electrodes of display device
#28 | 2011-06-23 ✅ Patent 8,982,932 granted on 2015-03-17Active auxiliary channel buffering
#29 | 2011-06-23 ✅ Patent 8,144,625 granted on 2012-03-27DisplayPort auxiliary channel active buffer with auxiliary channel/display data channel combiner for fast auxiliary channel
Also check out Parade Technologies, Ltd.'s (San Jose, United States) applicant profile with 33 patent applications submitted.
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