Fremont, California
United States
82
2011-11-03
69
2012-03-06
These are the the leading inventors for applications assigned to CHIPPAC, INC.:
CHIPPAC, INC. based in Fremont, US has been assigned the rights to these inventions. The list includes both Pending Applications and Patent Grants:
Wire bond interconnection and method of manufacture thereof
#2 | 2010-09-09 ✅ Patent 7,986,047 granted on 2011-07-26Wire bond interconnection
#3 | 2010-08-12 ✅ Patent 7,935,572 granted on 2011-05-03Semiconductor multi-package module having package stacked over die-up flip chip ball grid array package and having wire bond interconnect between stacked packages
#4 | 2010-06-03 ✅ Patent 7,829,382 granted on 2010-11-09Method for making semiconductor multipackage module including die and inverted land grid array package stacked over ball grid array package
#5 | 2010-04-08 ✅ Patent 7,958,628 granted on 2011-06-14Bonding tool for mounting semiconductor chips
#6 | 2009-01-29 ✅ Patent 7,749,807 granted on 2010-07-06Method of fabricating a semiconductor multipackage module including a processor and memory package assemblies
#7 | 2008-12-04 ✅ Patent 7,691,681 granted on 2010-04-06Chip scale package having flip chip interconnect on die paddle
#8 | 2008-06-12 ✅ Patent 7,745,322 granted on 2010-06-29Wire bond interconnection
#9 | 2008-02-14 ✅ Patent 7,732,254 granted on 2010-06-08Semiconductor multi-package module having package stacked over die-up flip chip ball grid array package and having wire bond interconnect between stacked packages
#10 | 2008-01-24 ✅ Patent 7,494,847 granted on 2009-02-24Method for making a semiconductor multi-package module having inverted wire bond carrier second package
#11 | 2007-12-20 ✅ Patent 8,143,100 granted on 2012-03-27Method of fabricating a semiconductor multi-package module having wire bond interconnect between stacked packages
#12 | 2007-12-06 ✅ Patent 7,692,279 granted on 2010-04-06Semiconductor multipackage module including die and inverted land grid array package stacked over ball grid array package
#13 | 2007-08-02 ✅ Patent 8,030,756 granted on 2011-10-04Plastic ball grid array package with integral heatsink
#14 | 2007-07-05 ✅ Patent 7,638,363 granted on 2009-12-29Semiconductor multi-package module having package stacked over ball grid array package and having wire bond interconnect between stacked packages
#15 | 2007-07-05 ✅ Patent 7,436,048 granted on 2008-10-14Multichip leadframe package
#16 | 2007-05-24 ✅ Patent 7,364,946 granted on 2008-04-29Method of fabricating a semiconductor multi-package module having inverted land grid array (LGA) package stacked over ball grid array (BGA) package
#17 | 2007-05-24 ✅ Patent 7,358,115 granted on 2008-04-15Method of fabricating a semiconductor assembly including chip scale package and second substrate with exposed substrate surfaces on upper and lower sides
#18 | 2007-05-17 ✅ Patent 7,351,610 granted on 2008-04-01Method of fabricating a semiconductor multi-package module having a second package substrate with an exposed metal layer wire bonded to a first package substrate
#19 | 2007-04-17 ✅ Patent 7,205,647 granted on 2007-04-17Semiconductor multi-package module having package stacked over ball grid array package and having wire bond interconnect between stacked packages
#20 | 2007-01-25 ✅ Patent 8,030,134 granted on 2011-10-04Stacked semiconductor package having adhesive/spacer structure and insulation
#21 | 2007-01-18 ✅ Patent 8,623,704 granted on 2014-01-07Adhesive/spacer island structure for multiple die package
#22 | 2007-01-18Stacked Semiconductor Package having Adhesive/Spacer Structure and Insulation
#23 | 2006-12-28 ✅ Patent 7,678,611 granted on 2010-03-16Spacer die structure and method for attaching
#24 | 2006-11-16Packaging structure and method
#25 | 2006-08-31Lead-free solder system
#26 | 2006-08-31 ✅ Patent 7,880,313 granted on 2011-02-01Semiconductor flip chip package having substantially non-collapsible spacer
#27 | 2006-08-31 ✅ Patent 8,067,823 granted on 2011-11-29Chip scale package having flip chip interconnect on die paddle
#28 | 2006-08-31Encapsulation method for semiconductor device having center pad
#29 | 2006-08-31 ✅ Patent 7,671,451 granted on 2010-03-02Semiconductor package having double layer leadframe
#30 | 2006-08-24 ✅ Patent 7,420,263 granted on 2008-09-02DBG system and method with adhesive layer severing
#31 | 2006-08-03 ✅ Patent 7,279,361 granted on 2007-10-09Method for making a semiconductor multi-package module having wire bond interconnect between stacked packages
#32 | 2006-08-03 ✅ Patent 7,169,642 granted on 2007-01-30Method of fabricating a semiconductor multi-package module having inverted land grid array (LGA) package stacked over ball grid array (BGA) package
#33 | 2006-08-03 ✅ Patent 7,166,494 granted on 2007-01-23Method of fabricating a semiconductor stacked multi-package module having inverted second package
#34 | 2006-08-03 ✅ Patent 7,163,842 granted on 2007-01-16Method of fabricating a semiconductor multi-package module having inverted second package stacked over die-up flip-chip ball grid array (BGA)
#35 | 2006-08-03 ✅ Patent 7,372,170 granted on 2008-05-13Flip chip interconnection pad layout
#36 | 2006-08-03 ✅ Patent 7,682,873 granted on 2010-03-23Semiconductor multi-package module having package stacked over die-down flip chip ball grid array package and having wire bond interconnect between stacked packages
#37 | 2006-07-27 ✅ Patent 7,605,480 granted on 2009-10-20Flip chip interconnection pad layout
#38 | 2006-07-20 ✅ Patent 7,247,519 granted on 2007-07-24Method for making a semiconductor multi-package module having inverted bump chip carrier second package
#39 | 2006-07-13 ✅ Patent 7,306,973 granted on 2007-12-11Method for making a semiconductor multipackage module including a processor and memory package assemblies
#40 | 2006-06-29 ✅ Patent 7,288,434 granted on 2007-10-30Method for making semiconductor multi-package module having inverted second package and including additional die or package stacked on second package
#41 | 2006-06-29Semiconductor multi-package module having inverted second package stacked over die-up flip-chip ball grid array (BGA) package
#42 | 2006-06-20 ✅ Patent 7,064,426 granted on 2006-06-20Semiconductor multi-package module having wire bond interconnect between stacked packages
#43 | 2006-06-13 ✅ Patent 7,061,088 granted on 2006-06-13Semiconductor stacked multi-package module having inverted second package
#44 | 2006-06-06 ✅ Patent 7,057,269 granted on 2006-06-06Semiconductor multi-package module having inverted land grid array (LGA) package stacked over ball grid array (BGA) package
#45 | 2006-06-01 ✅ Patent 7,453,156 granted on 2008-11-18Wire bond interconnection
#46 | 2006-05-30 ✅ Patent 7,053,477 granted on 2006-05-30Semiconductor multi-package module having inverted bump chip carrier second package
#47 | 2006-05-30 ✅ Patent 7,053,476 granted on 2006-05-30Semiconductor multi-package module having package stacked over die-down flip chip ball grid array package and having wire bond interconnect between stacked packages
#48 | 2006-05-23 ✅ Patent 7,049,691 granted on 2006-05-23Semiconductor multi-package module having inverted second package and including additional die or stacked package on second package
#49 | 2006-05-16 ✅ Patent 7,045,887 granted on 2006-05-16Semiconductor multi-package module having inverted second package stacked over die-up flip-chip ball grid array (BGA) package
#50 | 2006-05-04 ✅ Patent 7,256,108 granted on 2007-08-14Method for reducing semiconductor die warpage
#51 | 2006-04-25 ✅ Patent 7,033,859 granted on 2006-04-25Flip chip interconnection structure
#52 | 2006-04-20 ✅ Patent 7,208,821 granted on 2007-04-24Multichip leadframe package
#53 | 2006-01-26 ✅ Patent 7,217,598 granted on 2007-05-15Method for manufacturing plastic ball grid array package with integral heatsink
#54 | 2006-01-19 ✅ Patent 7,253,511 granted on 2007-08-07Semiconductor multipackage module including die and inverted land grid array package stacked over ball grid array package
#55 | 2005-12-08Stacked semiconductor package having adhesive/spacer structure and insulation
#56 | 2005-12-08 ✅ Patent 8,552,551 granted on 2013-10-08Adhesive/spacer island structure for stacking over wire bonded die
#57 | 2005-12-06 ✅ Patent 6,972,481 granted on 2005-12-06Semiconductor multi-package module including stacked-die package and having wire bond interconnect between stacked packages
#58 | 2005-11-24Multiple die package with adhesive/spacer structure and insulated die surface
#59 | 2005-11-24Adhesive/spacer island structure for multiple die package
#60 | 2005-11-22 ✅ Patent 6,967,126 granted on 2005-11-22Method for manufacturing plastic ball grid array with integral heatsink
#61 | 2005-10-13Die with discrete spacers and die spacing method
#62 | 2005-10-13Spacer die structure and method for attaching
#63 | 2005-10-06 ✅ Patent 7,650,688 granted on 2010-01-26Bonding tool for mounting semiconductor chips
#64 | 2005-10-06 ✅ Patent 7,407,877 granted on 2008-08-05Self-coplanarity bumping shape for flip-chip
#65 | 2005-10-06 ✅ Patent 7,211,901 granted on 2007-05-01Self-coplanarity bumping shape for flip chip
#66 | 2005-10-06 ✅ Patent 7,190,058 granted on 2007-03-13Spacer die structure and method for attaching
#67 | 2005-10-06 ✅ Patent 7,407,080 granted on 2008-08-05Wire bond capillary tip
#68 | 2005-09-22 ✅ Patent 7,306,971 granted on 2007-12-11Semiconductor chip packaging method with individually placed film adhesive pieces
#69 | 2005-09-22Die to substrate attach using printed adhesive
#70 | 2005-09-08 ✅ Patent 7,074,695 granted on 2006-07-11DBG system and method with adhesive layer severing
#71 | 2005-09-06 ✅ Patent 6,940,178 granted on 2005-09-06Self-coplanarity bumping shape for flip chip
#72 | 2005-08-23 ✅ Patent 6,933,598 granted on 2005-08-23Semiconductor stacked multi-package module having inverted second package and electrically shielded first package
#73 | 2005-07-21 ✅ Patent 7,690,551 granted on 2010-04-06Die attach by temperature gradient lead free soft solder metal sheet or film
#74 | 2005-07-07 ✅ Patent 7,101,731 granted on 2006-09-05Semiconductor multi-package module having inverted second package stacked over die-up flip-chip ball grid array (BGA) package
#75 | 2005-06-23 ✅ Patent 8,970,049 granted on 2015-03-03Multiple chip package module having inverted package stacked over die
#76 | 2005-06-14 ✅ Patent 6,906,416 granted on 2005-06-14Semiconductor multi-package module having inverted second package stacked over die-up flip-chip ball grid array (BGA) package
#77 | 2005-05-26 ✅ Patent 7,368,817 granted on 2008-05-06Bump-on-lead flip chip interconnection
#78 | 2005-05-12 ✅ Patent 7,034,391 granted on 2006-04-25Flip chip interconnection pad layout
#79 | 2005-03-24Integral heatsink ball grid array
#80 | 2005-03-17Super-thin high speed flip chip package
#81 | 2005-02-03 ✅ Patent 7,367,489 granted on 2008-05-06Method and apparatus for flip chip attachment by post collapse re-melt and re-solidification of bumps
#82 | 2005-01-04 ✅ Patent 6,838,761 granted on 2005-01-04Semiconductor multi-package module having wire bond interconnect between stacked packages and having electrical shield
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