Assignee profile:

Progressant Technologies, Inc.

City:

Mountain View, California

Country:

United States

Published Applications:

22

Last publication date:

2007-05-31

Patent Grants:

20

Last grant date:

2007-09-04

Top Inventors for applications by Progressant Technologies, Inc.

These are the the leading inventors for applications assigned to Progressant Technologies, Inc.:

Recent patent applications by Progressant Technologies, Inc.

Progressant Technologies, Inc. based in Mountain View, US has been assigned the rights to these inventions. The list includes both Pending Applications and Patent Grants:

#1 | 2007-05-31 ✅ Patent 7,266,010 granted on 2007-09-04
US20070121371A1
Physics

Compact static memory cell with non-volatile storage capability

#2 | 2006-09-19 ✅ Patent 7,109,078 granted on 2006-09-19
US10754229
-

CMOS compatible process for making a charge trapping device

#3 | 2006-09-07
US20060197122A1
Electricity

Charge Trapping Device

#4 | 2006-06-27 ✅ Patent 7,067,873 granted on 2006-06-27
US10753948
-

Charge trapping device

#5 | 2006-03-14 ✅ Patent 7,012,833 granted on 2006-03-14
US10321031
-

Integrated circuit having negative differential resistance (NDR) devices with varied peak-to-valley ratios (PVRs)

#6 | 2006-02-28 ✅ Patent 7,005,711 granted on 2006-02-28
US10324485
-

N-channel pull-up element and logic circuit

#7 | 2006-02-09 ✅ Patent 7,095,659 granted on 2006-08-22
US20060028881A1
Physics

Variable voltage supply bias and methods for negative differential resistance (NDR) based memory device

#8 | 2006-01-24 ✅ Patent 6,990,016 granted on 2006-01-24
US10884574
-

Method of making memory cell utilizing negative differential resistance devices

#9 | 2006-01-12 ✅ Patent 7,098,472 granted on 2006-08-29
US20060007773A1
Physics

Negative differential resistance (NDR) elements and memory device using the same

#10 | 2005-12-27 ✅ Patent 6,980,467 granted on 2005-12-27
US10314735
-

Method of forming a negative differential resistance device

#11 | 2005-12-08 ✅ Patent 7,453,083 granted on 2008-11-18
US20050269628A1
Physics

Negative differential resistance field effect transistor for implementing a pull up element in a memory cell

#12 | 2005-12-06 ✅ Patent 6,972,465 granted on 2005-12-06
US10760090
-

CMOS process compatible, tunable negative differential resistance (NDR) device and method of operating same

#13 | 2005-11-24 ✅ Patent 7,186,621 granted on 2007-03-06
US20050260798A1
Electricity

Method of forming a negative differential resistance device

#14 | 2005-11-17 ✅ Patent 7,113,423 granted on 2006-09-26
US20050253133A1
Electricity

Method of forming a negative differential resistance device

#15 | 2005-07-21 ✅ Patent 7,015,536 granted on 2006-03-21
US20050156158A1
Electricity

Charge trapping device and method of forming the same

#16 | 2005-07-14 ✅ Patent 7,220,636 granted on 2007-05-22
US20050153461A1
Electricity

Process for controlling performance characteristics of a negative differential resistance (NDR) device

#17 | 2005-07-07
US20050145955A1
Physics

Negative differential resistance (NDR) memory device with reduced soft error rate

#18 | 2005-06-16 ✅ Patent 7,012,842 granted on 2006-03-14
US20050128797A1
Physics

Enhanced read and write methods for negative differential resistance (NDR) based memory device

#19 | 2005-06-09 ✅ Patent 7,187,028 granted on 2007-03-06
US20050121664A1
Physics

Silicon on insulator (SOI) negative differential resistance (NDR) based memory device with reduced body effects

#20 | 2005-05-19 ✅ Patent 7,060,524 granted on 2006-06-13
US20050106765A1
Electricity

Methods of testing/stressing a charge trapping device

#21 | 2005-05-17 ✅ Patent 6,894,327 granted on 2005-05-17
US10827713
-

Negative differential resistance pull up element

#22 | 2005-03-08 ✅ Patent 6,864,104 granted on 2005-03-08
US10215137
-

Silicon on insulator (SOI) negative differential resistance (NDR) based memory device with reduced body effects

AssigneeID:

280607 ⎘