Los Gatos, California
United States
26
2024-02-15
15
2025-05-06
These are the the leading inventors for applications assigned to HYPERION CORE, INC.:
HYPERION CORE, INC. based in Los Gatos, US has been assigned the rights to these inventions. The list includes both Pending Applications and Patent Grants:
HIGH PERFORMANCE PROCESSOR
#2 | 2023-12-21PROVIDING CODE SECTIONS FOR MATRIX OF ARITHMETIC LOGIC UNITS IN A PROCESSOR
#3 | 2021-12-30 ✅ Patent 12,293,193 granted on 2025-05-06Advanced processor architecture
#4 | 2021-09-16 ✅ Patent 11,797,474 granted on 2023-10-24High performance processor
#5 | 2021-01-28 ✅ Patent 11,687,346 granted on 2023-06-27Providing code sections for matrix of arithmetic logic units in a processor
#6 | 2020-07-30 ✅ Patent 10,908,914 granted on 2021-02-02Issuing instructions to multiple execution units
#7 | 2020-02-06OPTIMIZATION OF LOOPS AND DATA FLOW SECTIONS IN MULTI-CORE PROCESSOR ENVIRONMENT
#8 | 2019-12-12EXECUTION OF INSTRUCTIONS BASED ON PROCESSOR AND DATA AVAILABILITY
#9 | 2019-06-27PARALLEL MEMORY SYSTEMS
#10 | 2019-06-06TOOL-LEVEL AND HARDWARE-LEVEL CODE OPTIMIZATION AND RESPECTIVE HARDWARE MODIFICATION
#11 | 2019-03-14PROVIDING CODE SECTIONS FOR MATRIX OF ARITHMETIC LOGIC UNITS IN A PROCESSOR
#12 | 2018-06-28 ✅ Patent 10,409,608 granted on 2019-09-10Issuing instructions to multiple execution units
#13 | 2018-02-08SYSTEM AND METHOD FOR A CACHE IN A MULTI-CORE PROCESSOR
#14 | 2017-12-21TOOL-LEVEL AND HARDWARE-LEVEL CODE OPTIMIZATION AND RESPECTIVE HARDWARE MODIFICATION
#15 | 2017-09-14 ✅ Patent 10,331,615 granted on 2019-06-25Optimization of loops and data flow sections in multi-core processor environment
#16 | 2016-10-20PROVIDING CODE SECTIONS FOR MATRIX OF ARITHMETIC LOGIC UNITS IN A PROCESSOR
#17 | 2016-02-18 ✅ Patent 9,898,297 granted on 2018-02-20Issuing instructions to multiple execution units
#18 | 2016-01-07 ✅ Patent 9,734,064 granted on 2017-08-15System and method for a cache in a multi-core processor
#19 | 2015-10-22 ✅ Patent 9,672,188 granted on 2017-06-06Optimization of loops and data flow sections in multi-core processor environment
#20 | 2014-11-27ADVANCED PROCESSOR ARCHITECTURE
#21 | 2014-10-16 ✅ Patent 9,703,538 granted on 2017-07-11Tool-level and hardware-level code optimization and respective hardware modification
#22 | 2014-02-20 ✅ Patent 10,031,888 granted on 2018-07-24Parallel memory systems
#23 | 2013-08-08 ✅ Patent 9,348,587 granted on 2016-05-24Providing code sections for matrix of arithmetic logic units in a processor
#24 | 2013-07-25 ✅ Patent 9,043,769 granted on 2015-05-26Optimization of loops and data flow sections in multi-core processor environment
#25 | 2012-08-23 ✅ Patent 9,152,427 granted on 2015-10-06Instruction issue to array of arithmetic cells coupled to load/store cells with associated registers as extended register file
#26 | 2012-05-31 ✅ Patent 9,086,973 granted on 2015-07-21System and method for a cache in a multi-core processor
Also check out Hyperion Core Inc.'s (Los Gatos, United States) applicant profile with 9 patent applications submitted.
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