Sunnyvale, California
United States
35
2008-05-20
35
2008-05-20
These are the the leading inventors for applications assigned to Synplicity, Inc.:
Synplicity, Inc. based in Sunnyvale, US has been assigned the rights to these inventions. The list includes both Pending Applications and Patent Grants:
Methods and apparatuses for automated circuit optimization and verification
#2 | 2008-04-29 ✅ Patent 7,366,997 granted on 2008-04-29Methods and apparatuses for thermal analysis based circuit design
#3 | 2008-03-25 ✅ Patent 7,350,173 granted on 2008-03-25Method and apparatus for placement and routing cells on integrated circuit chips
#4 | 2007-09-25 ✅ Patent 7,275,233 granted on 2007-09-25Methods and apparatuses for designing integrated circuits
#5 | 2007-08-28 ✅ Patent 7,263,673 granted on 2007-08-28Method and apparatus for automated synthesis and optimization of datapaths
#6 | 2007-07-31 ✅ Patent 7,251,800 granted on 2007-07-31Method and apparatus for automated circuit design
#7 | 2007-07-03 ✅ Patent 7,240,303 granted on 2007-07-03Hardware/software co-debugging in a hardware description language
#8 | 2007-06-26 ✅ Patent 7,237,214 granted on 2007-06-26Method and apparatus for circuit partitioning and trace assignment in circuit design
#9 | 2007-05-22 ✅ Patent 7,222,315 granted on 2007-05-22Hardware-based HDL code coverage and design analysis
#10 | 2007-05-15 ✅ Patent 7,217,887 granted on 2007-05-15Power and ground shield mesh to remove both capacitive and inductive signal coupling effects of routing in integrated circuit device
#11 | 2007-04-03 ✅ Patent 7,200,822 granted on 2007-04-03Circuits with modular redundancy and methods and apparatuses for their automated synthesis
#12 | 2007-02-13 ✅ Patent 7,178,118 granted on 2007-02-13Method and apparatus for automated circuit design
#13 | 2007-01-09 ✅ Patent 7,162,704 granted on 2007-01-09Method and apparatus for circuit design and retiming
#14 | 2006-12-05 ✅ Patent 7,146,589 granted on 2006-12-05Reducing equivalence checking complexity using inverse function
#15 | 2006-11-16 ✅ Patent 7,398,445 granted on 2008-07-08Method and system for debug and test using replicated logic
#16 | 2006-10-31 ✅ Patent 7,131,078 granted on 2006-10-31Method and apparatus for circuit design and synthesis
#17 | 2006-10-03 ✅ Patent 7,117,463 granted on 2006-10-03Verification of digital circuitry using range generators
#18 | 2006-09-12 ✅ Patent 7,107,570 granted on 2006-09-12Method and system for user-defined triggering logic in a hardware description language
#19 | 2006-08-24 ✅ Patent 7,213,216 granted on 2007-05-01Method and system for debugging using replicated logic and trigger logic
#20 | 2006-08-15 ✅ Patent 7,093,204 granted on 2006-08-15Method and apparatus for automated synthesis of multi-channel circuits
#21 | 2006-07-25 ✅ Patent 7,082,582 granted on 2006-07-25Reducing clock skew in clock gating circuits
#22 | 2006-07-04 ✅ Patent 7,072,818 granted on 2006-07-04Method and system for debugging an electronic system
#23 | 2006-06-20 ✅ Patent 7,065,481 granted on 2006-06-20Method and system for debugging an electronic system using instrumentation circuitry and a logic analyzer
#24 | 2006-05-23 ✅ Patent 7,051,296 granted on 2006-05-23Method and apparatus for parallel carry chains
#25 | 2006-03-07 ✅ Patent 7,010,769 granted on 2006-03-07Methods and apparatuses for designing integrated circuits
#26 | 2006-02-28 ✅ Patent 7,007,254 granted on 2006-02-28Method and apparatus for the design and analysis of digital circuits with time division multiplexing
#27 | 2006-02-09 ✅ Patent 7,278,120 granted on 2007-10-02Methods and apparatuses for transient analyses of circuits
#28 | 2005-12-20 ✅ Patent 6,978,430 granted on 2005-12-20Methods and apparatuses for designing integrated circuits
#29 | 2005-12-06 ✅ Patent 6,973,632 granted on 2005-12-06Method and apparatus to estimate delay for logic circuit optimization
#30 | 2005-08-23 ✅ Patent 6,934,183 granted on 2005-08-23Method and apparatus for resetable memory and design approach for same
#31 | 2005-08-16 ✅ Patent 6,931,572 granted on 2005-08-16Design instrumentation circuitry
#32 | 2005-06-09 ✅ Patent 7,069,526 granted on 2006-06-27Hardware debugging in a hardware description language
#33 | 2005-06-07 ✅ Patent 6,904,577 granted on 2005-06-07Hardware debugging in a hardware description language
#34 | 2005-06-07 ✅ Patent 6,904,576 granted on 2005-06-07Method and system for debugging using replicated logic
#35 | 2005-01-13 ✅ Patent 7,356,786 granted on 2008-04-08Method and user interface for debugging an electronic system
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