Santa Clara, California
United States
8
2007-07-19
8
2009-03-24
These are the the leading inventors for applications assigned to Sequence Design, Inc.:
Sequence Design, Inc. based in Santa Clara, US has been assigned the rights to these inventions. The list includes both Pending Applications and Patent Grants:
Design method and architecture for power gate switch placement and interconnection using tapless libraries
#2 | 2007-05-22 ✅ Patent 7,222,318 granted on 2007-05-22Circuit optimization for minimum path timing violations
#3 | 2007-05-22 ✅ Patent 7,222,311 granted on 2007-05-22Method and apparatus for interconnect-driven optimization of integrated circuit design
#4 | 2007-02-01 ✅ Patent 7,323,909 granted on 2008-01-29Automatic extension of clock gating technique to fine-grained power gating
#5 | 2006-02-21 ✅ Patent 7,003,741 granted on 2006-02-21Method for determining load capacitance
#6 | 2005-06-23 ✅ Patent 7,117,457 granted on 2006-10-03Current scheduling system and method for optimizing multi-threshold CMOS designs
#7 | 2005-05-31 ✅ Patent 6,901,565 granted on 2005-05-31RTL power analysis using gate-level cell power models
#8 | 2005-02-03 ✅ Patent 7,185,300 granted on 2007-02-27Vectorless instantaneous current estimation
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