San Jose, California
United States
23
2023-08-24
23
2026-06-16
These are the the leading inventors for applications assigned to NEO Semiconductor, Inc.:
NEO Semiconductor, Inc. based in San Jose, US has been assigned the rights to these inventions. The list includes both Pending Applications and Patent Grants:
3D MEMORY CELLS AND ARRAY ARCHITECTURES
#2 | 2023-01-26 ✅ Patent 12,217,808 granted on 2025-02-04Methods and apparatus for NAND flash memory
#3 | 2022-11-03 ✅ Patent 12,165,717 granted on 2024-12-10Methods and apparatus for a novel memory array
#4 | 2022-02-10 ✅ Patent 12,142,329 granted on 2024-11-12Methods and apparatus for NAND flash memory
#5 | 2022-01-27 ✅ Patent 12,002,525 granted on 2024-06-04Methods and apparatus for NAND flash memory
#6 | 2021-12-16 ✅ Patent 11,972,811 granted on 2024-04-30Methods and apparatus for NAND flash memory
#7 | 2021-10-21 ✅ Patent 12,100,460 granted on 2024-09-24Methods and apparatus for NAND flash memory
#8 | 2021-01-14 ✅ Patent 11,232,835 granted on 2022-01-25Methods and apparatus for reading NAND flash memory
#9 | 2020-05-21 ✅ Patent 11,056,190 granted on 2021-07-06Methods and apparatus for NAND flash memory
#10 | 2019-12-12 ✅ Patent 10,734,088 granted on 2020-08-04CMOS anti-fuse cell
#11 | 2019-01-24 ✅ Patent 10,395,744 granted on 2019-08-27CMOS anti-fuse cell
#12 | 2018-06-14 ✅ Patent 10,199,104 granted on 2019-02-05Method and apparatus for providing multi-page read and write using SRAM and nonvolatile memory devices
#13 | 2018-01-18 ✅ Patent 10,109,363 granted on 2018-10-23CMOS anti-fuse cell
#14 | 2017-12-07 ✅ Patent 10,163,509 granted on 2018-12-25Method and apparatus for storing information using a memory able to perform both NVM and DRAM functions
#15 | 2017-06-22 ✅ Patent 10,163,916 granted on 2018-12-25Compact anti-fuse memory cell using CMOS process
#16 | 2016-10-27 ✅ Patent 9,715,933 granted on 2017-07-25Dual function hybrid memory cell
#17 | 2016-10-20 ✅ Patent 9,972,392 granted on 2018-05-15SONOS byte-erasable EEPROM
#18 | 2016-10-13 ✅ Patent 9,793,001 granted on 2017-10-17CMOS anti-fuse cell
#19 | 2016-10-06 ✅ Patent 9,704,577 granted on 2017-07-11Two transistor SONOS flash memory
#20 | 2016-03-17 ✅ Patent 9,928,911 granted on 2018-03-27Method and apparatus for providing multi-page read and write using SRAM and nonvolatile memory devices
#21 | 2016-03-10 ✅ Patent 10,242,743 granted on 2019-03-26Method and apparatus for writing nonvolatile memory using multiple-page programming
#22 | 2016-03-10 ✅ Patent 10,008,265 granted on 2018-06-26Method and apparatus for providing three-dimensional integrated nonvolatile memory (NVM) and dynamic random access memory (DRAM) memory device
#23 | 2016-03-10 ✅ Patent 9,761,310 granted on 2017-09-12Method and apparatus for storing information using a memory able to perform both NVM and DRAM functions
Also check out NEO Semiconductor, Inc.'s (San Jose, United States) applicant profile with 29 patent applications submitted.
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