Kaoshiung
Taiwan
74
2021-07-01
64
2022-04-12
These are the the leading inventors for applications assigned to ADVANCED SEMICONDUCTOR ENGINEERING, INC.:
ADVANCED SEMICONDUCTOR ENGINEERING, INC. based in Kaoshiung, TW has been assigned the rights to these inventions. The list includes both Pending Applications and Patent Grants:
Semiconductor package structure and method for manufacturing the same
#2 | 2020-07-23 ✅ Patent 10,872,915 granted on 2020-12-22Optical package structure and method for manufacturing the same
#3 | 2020-07-23 ✅ Patent 11,024,586 granted on 2021-06-01Semiconductor device package and method of manufacturing the same
#4 | 2015-07-30 ✅ Patent 9,891,048 granted on 2018-02-13Measurement equipment
#5 | 2014-01-09 ✅ Patent 8,889,488 granted on 2014-11-18Method for manufacturing semiconductor package
#6 | 2009-05-21 ✅ Patent 7,829,977 granted on 2010-11-09Low temperature co-fired ceramics substrate and semiconductor package
#7 | 2007-10-18 ✅ Patent 8,800,638 granted on 2014-08-12Heatsink and heatsink-positioning system
#8 | 2007-09-11 ✅ Patent 7,268,418 granted on 2007-09-11Multi-chips stacked package
#9 | 2007-08-28 ✅ Patent 7,261,828 granted on 2007-08-28Bumping process
#10 | 2007-08-28 ✅ Patent 7,262,497 granted on 2007-08-28Bumpless assembly package
#11 | 2007-08-02Multi-chips stacked package
#12 | 2007-08-02Multi-chips module package and manufacturing method thereof
#13 | 2007-07-31 ✅ Patent 7,250,677 granted on 2007-07-31Die package structure
#14 | 2007-07-26 ✅ Patent 7,446,404 granted on 2008-11-04Three-dimensional package and method of making the same
#15 | 2007-07-19 ✅ Patent 7,514,771 granted on 2009-04-07Leadless lead-frame
#16 | 2007-03-29 ✅ Patent 7,365,422 granted on 2008-04-29Package of leadframe with heatsinks
#17 | 2007-03-01 ✅ Patent 7,491,568 granted on 2009-02-17Wafer level package and method for making the same
#18 | 2006-12-21Semiconductor wafer package and manufacturing method thereof
#19 | 2006-12-14 ✅ Patent 7,446,397 granted on 2008-11-04Leadless semiconductor package
#20 | 2006-12-05 ✅ Patent 7,144,801 granted on 2006-12-05Bumping process to increase bump height
#21 | 2006-10-17 ✅ Patent 7,122,459 granted on 2006-10-17Semiconductor wafer package and manufacturing method thereof
#22 | 2006-09-26 ✅ Patent 7,112,523 granted on 2006-09-26Bumping process
#23 | 2006-08-31Method of forming an encapsulation layer on a back side of a wafer
#24 | 2006-07-04 ✅ Patent 7,072,780 granted on 2006-07-04Impedance standard substrate and correction method for vector network analyzer
#25 | 2006-06-22 ✅ Patent 7,291,926 granted on 2007-11-06Multi-chip package structure
#26 | 2006-06-15 ✅ Patent 7,368,806 granted on 2008-05-06Flip chip package with anti-floating structure
#27 | 2006-05-11 ✅ Patent 7,416,919 granted on 2008-08-26Method for wafer level stack die placement
#28 | 2006-05-04Thermal enhance package and manufacturing method thereof
#29 | 2006-05-04 ✅ Patent 7,218,006 granted on 2007-05-15Multi-chip stack package
#30 | 2006-05-02 ✅ Patent 7,037,750 granted on 2006-05-02Method for manufacturing a package
#31 | 2006-04-27 ✅ Patent 7,235,989 granted on 2007-06-26Electrical test device having isolation slot
#32 | 2006-04-27 ✅ Patent 7,446,409 granted on 2008-11-04Cavity-down multiple-chip package
#33 | 2006-04-13 ✅ Patent 7,352,056 granted on 2008-04-01Semiconductor package structure with microstrip antennan
#34 | 2006-04-04 ✅ Patent 7,023,079 granted on 2006-04-04Stacked semiconductor chip package
#35 | 2006-02-16 ✅ Patent 7,251,576 granted on 2007-07-31System and method for testing CMOS image sensor
#36 | 2006-02-02 ✅ Patent 7,109,740 granted on 2006-09-19Method for retesting semiconductor device
#37 | 2005-12-06 ✅ Patent 6,972,583 granted on 2005-12-06Method for testing electrical characteristics of bumps
#38 | 2005-10-20Flip chip package, semiconductor package with bumps and method for manufacturing semiconductor package with bumps
#39 | 2005-09-20 ✅ Patent 6,946,729 granted on 2005-09-20Wafer level package structure with a heat slug
#40 | 2005-09-13 ✅ Patent 6,942,478 granted on 2005-09-13Packaging mold with electrostatic discharge protection
#41 | 2005-08-18Semiconductor device for wire-bonding and flip-chip bonding package and manufacturing method thereof
#42 | 2005-08-16 ✅ Patent 6,929,980 granted on 2005-08-16Manufacturing method of flip chip package
#43 | 2005-08-16 ✅ Patent 6,930,389 granted on 2005-08-16Under bump metallization structure of a semiconductor wafer
#44 | 2005-08-04 ✅ Patent 7,193,282 granted on 2007-03-20Contact sensor package
#45 | 2005-08-02 ✅ Patent 6,924,557 granted on 2005-08-02Semiconductor package
#46 | 2005-06-30 ✅ Patent 7,105,424 granted on 2006-09-12Method for preparing arylphosphonite antioxidant
#47 | 2005-06-30 ✅ Patent 7,235,426 granted on 2007-06-26Method of backside grinding a bumped wafer
#48 | 2005-06-30 ✅ Patent 7,253,529 granted on 2007-08-07Multi-chip package structure
#49 | 2005-06-30Chip assembly package
#50 | 2005-06-30 ✅ Patent 7,129,583 granted on 2006-10-31Multi-chip package structure
#51 | 2005-06-30 ✅ Patent 7,193,302 granted on 2007-03-20Leadless semiconductor package
#52 | 2005-06-21 ✅ Patent 6,908,842 granted on 2005-06-21Bumping process
#53 | 2005-06-16 ✅ Patent 7,115,484 granted on 2006-10-03Method of dicing a wafer
#54 | 2005-06-09 ✅ Patent 7,045,391 granted on 2006-05-16Multi-chips bumpless assembly package and manufacturing method thereof
#55 | 2005-05-12 ✅ Patent 7,015,571 granted on 2006-03-21Multi-chips module assembly package
#56 | 2005-05-05 ✅ Patent 7,326,590 granted on 2008-02-05Method for manufacturing ball grid array package
#57 | 2005-04-28 ✅ Patent 7,015,065 granted on 2006-03-21Manufacturing method of ball grid array package
#58 | 2005-04-28 ✅ Patent 7,144,239 granted on 2006-12-05Molding apparatus with a molding flowability sensor for packaging semiconductor device
#59 | 2005-04-21 ✅ Patent 7,187,070 granted on 2007-03-06Stacked package module
#60 | 2005-04-12 ✅ Patent 6,879,031 granted on 2005-04-12Multi-chips package
#61 | 2005-04-12 ✅ Patent 6,878,963 granted on 2005-04-12Device for testing electrical characteristics of chips
#62 | 2005-04-07 ✅ Patent 7,102,241 granted on 2006-09-05Leadless semiconductor package
#63 | 2005-03-31Method of forming an encapsulation layer on a back side of a wafer
#64 | 2005-03-24 ✅ Patent 7,049,689 granted on 2006-05-23Chip on glass package
#65 | 2005-03-17Bumped wafer with adhesive layer encompassing bumps and manufacturing method thereof
#66 | 2005-03-03 ✅ Patent 7,291,924 granted on 2007-11-06Flip chip stacked package
#67 | 2005-03-03 ✅ Patent 7,145,222 granted on 2006-12-05Leadless semiconductor package
#68 | 2005-03-01 ✅ Patent 6,861,761 granted on 2005-03-01Multi-chip stack flip-chip package
#69 | 2005-02-24 ✅ Patent 7,033,914 granted on 2006-04-25Method of making a package structure by dicing a wafer from the backside surface thereof
#70 | 2005-02-17 ✅ Patent 7,429,342 granted on 2008-09-30Method for cleaning and regenerating a mold
#71 | 2005-02-15 ✅ Patent 6,856,027 granted on 2005-02-15Multi-chips stacked package
#72 | 2005-02-03 ✅ Patent 7,221,041 granted on 2007-05-22Multi-chips module package and manufacturing method thereof
#73 | 2005-01-18 ✅ Patent 6,844,617 granted on 2005-01-18Packaging mold with electrostatic discharge protection
#74 | 2005-01-13 ✅ Patent 7,223,683 granted on 2007-05-29Wafer level bumping process
Also check out ADVANCED SEMICONDUCTOR ENGINEERING, INC.'s (Kaoshiung, Taiwan) applicant profile with 2 patent applications submitted.
51322 ⎘