Assignee profile:

CELERINT, LLC.

City:

New York, New York

Country:

United States

Published Applications:

15

Last publication date:

2024-10-31

Patent Grants:

15

Last grant date:

2025-07-15

Top Inventors for applications by CELERINT, LLC.

These are the the leading inventors for applications assigned to CELERINT, LLC.:

Recent patent applications by CELERINT, LLC.

CELERINT, LLC. based in New York, US has been assigned the rights to these inventions. The list includes both Pending Applications and Patent Grants:

#1 | 2024-10-31 ✅ Patent 12,360,162 granted on 2025-07-15
US20240361386A1
Physics

METHOD FOR SEMICONDUCTOR DEVICE INTERFACE CIRCUITRY FUNCTIONALITY AND COMPLIANCE TESTING

#2 | 2022-07-28 ✅ Patent 12,061,231 granted on 2024-08-13
US20220236325A1
Physics

Device interface board compliance testing using impedance response profiling

#3 | 2021-11-18 ✅ Patent 11,555,856 granted on 2023-01-17
US20210356524A1
Physics

Method for in situ functionality testing of switches and contacts in semiconductor interface hardware

#4 | 2021-11-04 ✅ Patent 11,448,688 granted on 2022-09-20
US20210341531A1
Physics

Method for continuous tester operation during long soak time testing

#5 | 2021-06-17 ✅ Patent 12,025,663 granted on 2024-07-02
US20210181252A1
Physics

Method for semiconductor device interface circuitry functionality and compliance testing

#6 | 2018-11-01 ✅ Patent 10,386,405 granted on 2019-08-20
US20180313888A1
Physics

Method for continuous tester operation during multiple stage temperature testing

#7 | 2017-06-15 ✅ Patent 10,197,622 granted on 2019-02-05
US20170168111A1
Physics

Modular multiplexing interface assembly for reducing semiconductor testing index time

#8 | 2017-05-11 ✅ Patent 9,817,062 granted on 2017-11-14
US20170131346A1
Physics

Parallel concurrent test system and method

#9 | 2016-11-17 ✅ Patent 10,043,722 granted on 2018-08-07
US20160336243A1
Electricity

Method for testing semiconductor wafers using temporary sacrificial bond pads

#10 | 2016-10-06 ✅ Patent 9,818,631 granted on 2017-11-14
US20160293461A1
Electricity

Semiconductor device handler throughput optimization

#11 | 2014-08-07 ✅ Patent 9,551,740 granted on 2017-01-24
US20140218063A1
Physics

Parallel concurrent test system and method

#12 | 2014-02-13 ✅ Patent 10,422,828 granted on 2019-09-24
US20140046613A1
Physics

Method and system for utilizing stand-alone controller in multiplexed handler test cell for indexless tandem semiconductor test

#13 | 2011-08-25 ✅ Patent 9,753,081 granted on 2017-09-05
US20110204914A1
Physics

Muxing interface platform for multiplexed handlers to reduce index time system and method

#14 | 2011-08-11 ✅ Patent 9,733,301 granted on 2017-08-15
US20110193584A1
Physics

Universal multiplexing interface system and method

#15 | 2009-12-17 ✅ Patent 8,400,180 granted on 2013-03-19
US20090309620A1
Physics

Tandem handler system and method for reduced index time

Also check out CELERINT, LLC's (New York, United States) applicant profile with 10 patent applications submitted.

AssigneeID:

55268 ⎘