ClassID:

189961

G06F11/085 - CPC Classification

Classification description:

Error detection; Error correction; Monitoring; Responding to the occurrence of a fault, e.g. fault tolerance; Error detection or correction by redundancy in data representation, e.g. by using checking codes using codes with inherent redundancy, e.g. n-out-of-m codes

Recent Application in this class:
#1
20250245097
2025-07-31

CONTROL REGISTER RELATED COMPUTING SYSTEM AND METHOD

#2
20250208948
2025-06-26

DATA CORRUPTION INDICATION

#3
20250156268
2025-05-15

NONVOLATILE MEMORY WITH DISTRIBUTED XOR PROTECTION

#4
20240232002
2024-07-11

METHOD AND APPARATUS FOR STORING BLOCKCHAIN DATA BASED ON ERROR CORRECTION CODE

#5
20240176693
2024-05-30

SECURITY CONTROL METHOD AND APPARATUS FOR INTEGRATED CIRCUIT, STORAGE MEDIUM, AND ELECTRONIC DEVICE

#6
20240134739
2024-04-25

Method and apparatus for storing blockchain data based on error correction code

#7
20240045758
2024-02-08

Method and Chip for Cyclic Code Encoding, Circuit Component, and Electronic Device

#8
20220237076
2022-07-28

Polar code construction method and apparatus

#9
20210382784
2021-12-09

PROCESSING DEVICE, NON-TRANSITORY STORAGE MEDIUM, AND SYSTEM

#10
20210281280
2021-09-09

Decoder performing iterative decoding, and storage device using the same

#11
20210081272
2021-03-18

System for memory access bandwidth management using ECC

#12
20210074380
2021-03-11

Reverse concatenation of error-correcting codes in DNA data storage

#13
20200379841
2020-12-03

Performing error detection during deterministic program execution

#14
20200192748
2020-06-18

Memory system and operating method thereof

#15
20200192747
2020-06-18

Memory system and operating method thereof

#16
20200192746
2020-06-18

Memory system and operating method thereof

#17
20190361606
2019-11-28

Erasure coding magnetic tapes for minimum latency and adaptive parity protection feedback

#18
20190294493
2019-09-26

Hierarchical buffering scheme to normalize non-volatile media raw bit error rate transients

#19
20190196909
2019-06-27

Control plane method and apparatus for providing erasure code protection across multiple storage devices

#20
20190196896
2019-06-27

Flash memory testing according to error type pattern

#21
20190132008
2019-05-02

Decoder performing iterative decoding, and storage device using the same

#22
20180300200
2018-10-18

Memory system and operating method thereof

#23
20180210785
2018-07-26

Control plane method and apparatus for providing erasure code protection across multiple storage devices

#24
20180113757
2018-04-26

Field programmable gate array

#25
20180011758
2018-01-11

System and method for reducing ECC overhead and memory access bandwidth

#26
20170083244
2017-03-23

MITIGATING THE IMPACT OF A SINGLE POINT OF FAILURE IN AN OBJECT STORE

#27
20170039074
2017-02-09

Data returned responsive to executing a start subchannel instruction

#28
20160253227
2016-09-01

Error detection circuitry for use with memory

#29
20160217030
2016-07-28

Memory system and method of operating the memory system

#30
20160210191
2016-07-21

Search device and search method searching data based on key

#31
20160062821
2016-03-03

Invoking an error handler to handle an uncorrectable error

#32
20150301896
2015-10-22

Load balancing on disks in raid based on linear block codes

#33
20150286440
2015-10-08

Data returned responsive to executing a start subchannel instruction

#34
20150254128
2015-09-10

Storage apparatus, storage system, and data management method

#35
20150082115
2015-03-19

Systems and methods for fragmented data recovery

#36
20150081626
2015-03-19

Systems and methods for recovered data stitching

#37
20140331101
2014-11-06

Semiconductor memory devices, memory systems including the same and method of writing data in the same

#38
20140317472
2014-10-23

Encoder, decoder and semiconductor device including the same

#39
20140208182
2014-07-24

Controller, information processing system, method of controlling controller, and program

#40
20140101481
2014-04-10

Per-rank channel marking in a memory system

#41
20130262938
2013-10-03

Method for providing a value for determining whether an error has occurred in the execution of a program

#42
20130219231
2013-08-22

Method for storing and propagating error information in computer programs

#43
20130191685
2013-07-25

PER-RANK CHANNEL MARKING IN A MEMORY SYSTEM

#44
20130151887
2013-06-13

Peripheral interface alert message for downstream device

#45
20130117642
2013-05-09

Data returned responsive to executing a Start Subchannel instruction

#46
20120317393
2012-12-13

Data returned responsive to executing a start subchannel instruction

#47
20120210195
2012-08-16

Method, device, and system for forward error correction

#48
20110225469
2011-09-15

Peripheral interface alert message for downstream device

#49
20100077264
2010-03-25

SERIALIZATION ALGORITHM FOR FUNCTIONAL ESD ROBUSTNESS

#50
20080281896
2008-11-13

Industrial controller

#51
20060288098
2006-12-21

Peripheral interface alert message for downstream device

#52
20060179366
2006-08-10

Methods and systems for secure control of system modes and sub-modes

#53
14856445
2018-05-15

Techniques for usage metering and control in data storage systems

#54
14274218
2016-11-08

File recovery using diverse erasure encoded fragments

#55
13831686
2016-01-19

Compressing data from multiple reads for error control management in memory systems

#56
13535200
2014-08-12

Scheduled or gradual redundancy encoding schemes for data storage