189968 ⎘
Error detection; Error correction; Monitoring; Responding to the occurrence of a fault, e.g. fault tolerance; Error detection or correction by redundancy in data representation, e.g. by using checking codes; Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using codes or arrangements adapted for a specific type of error Identification of the type of error
ECC CONFIGURATION IN MEMORIES
#2Detection and remediation of runtime crashes in heterogeneous operating environments
#3Memory device and module life expansion
#4SYSTEM AND METHOD FOR HANDLING EXCEPTIONS DURING HEALTHCARE RECORD PROCESSING
#5ECC configuration in memories
#6APPARATUSES AND METHODS FOR CONFIGURABLE ECC MODES
#7Collection of forensic data after a processor freeze
#8Memory system and memory control method
#9System and method for handling exceptions during healthcare record processing
#10MONITORING FOR INTERCEPTION OF IMAGE DISPLAY PIPELINE AND INDICATING TO USER
#11Memory error processing method and apparatus
#12Method, device, and computer program product for error evaluation
#13Memory modules and methods of operating memory systems including the same
#14Solid state drive with improved LLR tables
#15Method for performing data management in memory device, associated memory device and controller thereof
#16Facilitating detection of data errors using existing data
#17Systems and methods for mitigating faults in combinatory logic
#18Dispersed storage network with access control and methods for use therewith
#19METHOD FOR PERFORMING DATA MANAGEMENT IN MEMORY DEVICE, ASSOCIATED MEMORY DEVICE AND CONTROLLER THEREOF
#20Memory system and method for error correction of memory
#21Dynamic cache row fail accumulation due to catastrophic failure
#22Apparatus and method for detecting and mitigating bit-line opens in flash memory
#23Dynamic cache row fail accumulation due to catastrophic failure
#24Error monitoring of a memory device containing embedded error correction
#25Memory device having error notification function
#26Tiered ECC single-chip and double-chip Chipkill scheme
#27Data recovery once ECC fails to correct the data
#28Method of detecting bit errors, an electronic circuit for detecting bit errors, and a data storage device
#29Method, apparatus and device for data processing
#30Memory device having adjustable refresh period and method of operating the same
#31Dispersed storage network with slice rebuilding and methods for use therewith
#32Fault handling at a transaction level by employing a token and a source-to-destination paradigm in a processor-based system
#33Memory system having NAND-type flash memory and memory controller with shift read controller and threshold voltage comparison module
#34Memory devices with selective error correction code
#35Semiconductor device and operating method thereof
#36Fault position determining circuit, storage device and information processing apparatus
#37Authenticating use of a dispersed storage network
#38Verification of dispersed storage network access control information
#39Updating dispersed storage network access control information
#40Memory system with ECC-unit and further processing arrangement
#41DISABLING PORTIONS OF MEMORY WITH DEFECTS
#42Probabilistic error correction in multi-bit-per-cell flash memory
#43Probabilistic error correction in multi-bit-per-cell flash memory
#44Probabilistic error correction in multi-bit-per-cell flash memory
#45Disabling portions of memory with defects
#46Probabilistic error correction in multi-bit-per-cell flash memory
#47Probabilistic error correction in multi-bit-per-cell flash memory
#48Disabling portions of memory with non-deterministic errors
#49Memory system anti-aliasing scheme
#50Probabilistic error correction in multi-bit-per-cell flash memory
#51Persistent error detection in digital memory
#52Method and apparatus for classifying memory errors
#53Buffer and method of diagnosing buffer failure
#54System and method for handling exceptions during healthcare record processing