189970 ⎘
Error detection; Error correction; Monitoring; Responding to the occurrence of a fault, e.g. fault tolerance; Error detection or correction by redundancy in data representation, e.g. by using checking codes; Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using codes or arrangements adapted for a specific type of error Simple parity
SEMICONDUCTOR DEVICE WITH MODIFIED ACCESS AND ASSOCIATED METHODS AND SYSTEMS
#2PAUSING MEMORY SYSTEM BASED ON CRITICAL EVENT
#3APPARATUSES, SYSTEMS, AND METHODS FOR ERROR CORRECTION
#4STORAGE CONTROLLER FOR RECOVERING DATA USING BIT COMBINATIONS AND METHOD OF OPERATING THE SAME
#5METHOD OF AND SYSTEM FOR PARITY REPAIR FOR FUNCTIONAL LIMITATION DETERMINATION AND INJURY PROFILE REPORTS IN WORKER'S COMPENSATION CASES
#6DYNAMIC RAIN FOR ZONED STORAGE SYSTEMS
#7Semiconductor memory device and method of operating semiconductor memory device
#8SEMICONDUCTOR DEVICE WITH MODIFIED ACCESS AND ASSOCIATED METHODS AND SYSTEMS
#9Pausing memory system based on critical event
#10Encoding system data in parity symbols
#11Dynamic rain for zoned storage systems
#12MEMORY SYSTEM WITH ERROR DETECTION
#13Method of and system for parity repair for functional limitation determination and injury profile reports in worker's compensation cases
#14Memory system
#15Memory system with error detection
#16Serializing and deserializing stage testing
#17Metadata aware copyback for memory devices
#18Apparatuses, systems, and methods for error correction
#19Customizable backup and restore from nonvolatile logic array
#20Apparatuses, systems, and methods for error correction
#21Data protection system and method thereof for 3D semiconductor device
#22Error correction circuit and method for operating the same
#23Parity protection
#24Memory system with error detection
#25Memory system
#26Metadata aware copyback for memory devices
#27Semiconductor device with modified access and associated methods and systems
#28Semiconductor memory devices and memory systems including the same
#29System and method for facilitating elastic error correction code in memory
#30METHOD AND SYSTEM FOR PERFORMING DATA DEDUPLICATION AND COMPRESSION IN A DATA CLUSTER
#31System and method for performing erasure coding in a distributed storage system
#32Bit block stream bit error detection method and device
#33Serializing and deserializing stage testing
#34Apparatuses, systems, and methods for error correction
#35Apparatuses, systems, and methods for error correction
#36Parity protection
#37Semiconductor device with modified access and associated methods and systems
#38Encoder for memory system and method thereof
#39Memory system
#40Integrated circuit control latch protection
#41Memory apparatus having hierarchical error correction code layer
#42Implementing dynamic SEU detection and correction method and circuit
#43Processing device with nonvolatile logic array backup
#44Bit block stream bit error detection method and device
#45Memory systems performing reconfigurable error correction operation using ECC engine with fixed error correction capability
#46Methods for parity error synchronization and memory devices and systems employing the same
#47Methods for parity error alert timing interlock and memory devices and systems employing the same
#48Semiconductor memory devices and memory systems including the same
#49Combined secure mac and device correction using encrypted parity with multi-key domains
#50Communication apparatus, communication method, program, and communication system
#51Facilitation of data deletion for distributed erasure coding
#52Communication device, communication method, program, and communication system
#53Processing device with nonvolatile logic array backup
#54Self-configuring error control coding
#55Priority based backup in nonvolatile logic arrays
#56Storage system and method for reducing XOR recovery time by excluding invalid data from XOR parity
#57Parity for instruction packets
#58Nonvolatile logic array based computing over inconsistent power supply
#59Configuration bit sequencing control of nonvolatile domain and array wakeup and backup
#60Error vector readout from a memory device
#61Error vector readout from a memory device
#62Customizable backup and restore from nonvolatile logic array
#63Using error correcting codes for parity purposes
#64Using error correcting codes for parity purposes
#65Error detection in stored data values
#66Method for handling interrupted writes using multiple cores
#67Validating persistent memory content for processor main memory
#68Semiconductor device and semiconductor system including the same
#69Semiconductor integrated circuit and method of processing in semiconductor integrated circuit
#70Method and apparatus to recover from an erroneous logic state in an electronic system
#71Customizable backup and restore from nonvolatile logic array
#72Nonvolatile backup of a machine state when a power supply drops below a threshhold
#73Non-volatile array wakeup and backup sequencing control
#74Nonvolatile logic array and power domain segmentation in processing device
#75Configuration bit sequencing control of nonvolatile domain and array wakeup and backup
#76Processing device with nonvolatile logic array backup
#77Priority based backup in nonvolatile logic arrays
#78Methods and apparatus for temporarily storing parity information for data stored in a storage device
#79Recoverable parity and residue error
#80Read/write operations in solid-state storage devices
#81Error tolerant flip-flops
#82REDUNDANCY LOGIC
#83Validating persistent memory content for processor main memory
#84FLASH MEMORY SYSTEM AND DATA WRITING METHOD THEREOF
#85Method of detecting an attack by fault injection on a memory device, and corresponding memory device
#86METHOD FOR HANDLING INTERRUPTED WRITES USING MULTIPLE CORES
#87Flash memory system and data writing method thereof
#88Semiconductor memory, operating method of semiconductor memory, and system
#89Semiconductor memory device
#90Memory device having terminals for transferring multiple types of data
#91RAM diagnosis device and RAM diagnosis method
#92System and method of storing reliability data
#93Register read mechanism
#94Data recovery circuit
#95Error Detection/Correction Method
#96Data error measuring circuit for semiconductor memory apparatus
#97Ferroelectric memory with spare memory cell array and ECC circuit
#98Flash memory system and data writing method thereof
#99Automated hardware parity and parity error generation technique for high availability integrated circuits
#100Method, system and program product for autonomous error recovery for memory devices
#101ECC coding for high speed implementation
#102Access control apparatus, access control system, processor, access control method, memory access control apparatus, memory access control system, and memory access control method
#103Semiconductor memory device
#104Memory device having terminals for transferring multiple types of data
#105Memory device having terminals for transferring multiple types of data
#106Apparatus and method for detecting data error
#107System for improving memory interface data integrity in PLDS
#108System and method for enhanced error detection in memory peripherals
#109Memory device having terminals for transferring multiple types of data
#110Semiconductor memory device
#111Fault tolerant non volatile memories and methods
#112Memory device having terminals for transferring multiple types of data
#113Memory device having terminals for transferring multiple types of data
#114Error correction circuit and method
#115Semiconductor memory having sub-party cell array error correction
#116Semiconductor memory having an error correction function
#117Converting merge buffer system-kill errors to process-kill errors
#118Storage apparatus having microprocessor redundancy for recovery from soft errors
#119Method and apparatus for a modified parity check
#120Method, system and program product for autonomous error recovery for memory devices
#121Display driver and electronic instrument
#122Memory device having terminals for transferring multiple types of data
#123Semiconductor memory device for correcting errors using ECC (error correcting code) circuit
#124Memory error detection reporting
#125Adaptive runtime repairable entry register file
#126System and method for detecting multiple data bit errors in memory
#127System and method for backup which synchronously or asynchronously stores additional information depending on the target backup data
#128Flash memory system and data writing method thereof
#129Storage-free message authenticators for error-correcting-codes
#130Method of and system for parity repair for functional limitation determination and injury profile reports in worker's compensation cases
#131Facilitation of data deletion for distributed erasure coding
#132Generic encoder for low-density parity-check (LDPC) codes
#133Generic encoder for low-density parity-check (LDPC) codes
#134Importance-based data storage verification