190024 ⎘
Error detection; Error correction; Monitoring; Responding to the occurrence of a fault, e.g. fault tolerance; Error detection or correction of the data by redundancy in operation Details of time redundant execution on a single processing unit
SYSTEMS AND METHODS FOR SCALABLE BLOCK-BASED PERMANENT SAFETY FAULT TOLERANCE
#2Buffer Checker for Task Processing Fault Detection
#3Buffer checker for task processing fault detection
#4PROCESSOR AND METHOD OF DETECTING SOFT ERROR USING THE SAME
#5DEVICE AND METHOD FOR COMPUTING DRIVING PARAMETERS
#6REDUNDANT COMMUNICATIONS FOR MULTI-CHIP SYSTEMS
#7Information processing device, control method, and non-transitory computer readable medium
#8Buffer checker for task processing fault detection
#9Redundant communications for multi-chip systems
#10Buffer checker for task processing fault detection
#11Method, apparatus, and computer-readable storage medium having instructions for cancelling a redundancy of two or more redundant modules
#12Railway safety critical systems with task redundancy and asymmetric communications capability
#13DATA REPLICATION BASED ON DATA-DRIVEN RECOVERY OBJECTIVES
#14System and methods for hardware-software cooperative pipeline error detection
#15Apparatus and method for enhancing reliability of watchdog circuit for controlling central processing device for vehicle
#16Method and device for recognizing hardware errors in microprocessors
#17Automated test generation for multi-interface and multi-platform enterprise virtualization management environment
#18Automated test generation for multi-interface and multi-platform enterprise virtualization management environment
#19Memory and data reading method including performing N read operations on an address and determining whether the data is consistent
#20Railway safety critical systems with task redundancy and asymmetric communications capability
#21Automated test generation for multi-interface enterprise virtualization management environment
#22Metric payload ingestion and replay
#23Automated test generation for multi-interface enterprise virtualization management environment
#24Automated test generation for multi-interface enterprise virtualization management environment
#25Method for performing failsafe calculations
#26Fault tolerant processor for real-time systems
#27UTILIZING A PROCESSOR WITH A TIME OF DAY CLOCK ERROR
#28Synchronization and order detection in a memory system
#29Redundant transactions for detection of timing sensitive errors
#30Power reduction in thyristor random access memory
#31Electronic fault detection unit
#32Railway safety critical systems with task redundancy and asymmetric communications capability
#33Microprocessor device with reset timer
#34Redundant transactions for detection of timing sensitive errors
#35Adaptive operation of three dimensional memory
#36Adaptive operation of three dimensional memory
#37Fault-tolerant system and fault-tolerant operating method capable of synthesizing result by at least two calculation modules
#38Railway safety critical systems with task redundancy and asymmetric communications capability
#39DYNAMIC SCALING PROCESSOR DEVICE AND PROCESSING METHOD THEREOF
#40Redundant execution for reliability in a super FMA ALU
#41Comparison for redundant threads
#42Hardware recovery in multi-threaded processor
#43Error recovery in a data processing apparatus
#44Error recovery upon reaching oldest instruction marked with error or upon timed expiration by flushing instructions in pipeline pending queue and restarting execution
#45Data migration management apparatus and information processing system
#46RFID TAG, TAG READER/WRITER, DATA MANAGEMENT SYSTEM AND DATA MANAGEMENT METHOD
#47DATA MIGRATION MANAGEMENT APPARATUS AND INFORMATION PROCESSING SYSTEM
#48Method and device for performing failsafe hardware-independent floating-point arithmetic
#49Control system
#50Detecting soft errors via selective re-execution
#51Data processing system having selective redundancy and method therefor
#52Redundant multithreading processor
#53Tolerating soft errors by selective duplication
#54Performing aggressive code optimization with an ability to rollback changes made by the aggressive optimizations
#55Radiation hard and fault tolerant multicore processor and method for ionizing radiation environment
#56READING TO AND WRITING FROM PERIPHERALS WITH TEMPORALLY SEPARATED REDUNDANT PROCESSOR EXECUTION
#57Method and apparatus for handling an output mismatch
#58Transparent recovery of transport connections using packet translation techniques
#59Architecture and method for hardware-assisted processor checkpointing and rollback
#60RADIATION-HARDENED HYBRID PROCESSOR
#61RADIATION-HARDENED HYBRID PROCESSOR
#62Recovering from an error in a fault tolerant computer system
#63SECURE SYSTEM FOR DATA TRANSMISSION
#64Data migration management apparatus and information processing system
#65Reliable execution using compare and transfer instruction on an SMT machine
#66Dynamic addition of redundant network in distributed system communications
#67Microprocessor in a security-sensitive system
#68Information processing apparatus, method for controlling the information processing apparatus, and storage medium
#69Two-phase clock-stalling technique for error detection and error correction
#70Data processing control unit for controlling multiple data processing operations
#71Defending smart cards against attacks by redundant processing
#72Logic circuit protected against transient disturbances
#73Information processing apparatus and error processing
#74COMMUNICATION CONTROL APPARATUS AND COMMUNICATION CONTROL METHOD
#75Virtual computer system and a method of controlling a virtual computer system on movement of a virtual computer
#76METHOD OF SECURING A COMPUTER PROGRAM. AND CORRESPONDING DEVICE, METHOD OF UPDATING AND UPDATE SERVER
#77PROCESSOR INCLUDING HYBRID REDUNDANCY FOR LOGIC ERROR PROTECTION
#78Method and system for generating a valid signal
#79Detecting soft errors via selective re-execution
#80Method and apparatus for monitoring software and signal integrity in a distributed control module system for a powertrain system
#81Transient fault detection by integrating an SRMT code and a non SRMT code in a single application
#82Apparatus and method for redundant multi-threading with recovery
#83Write filter cache method and apparatus for protecting the microprocessor core from soft errors
#84Write filter cache method and apparatus for protecting the microprocessor core from soft errors
#85Logic circuit protected against transitory perturbations
#86Apparatus and method for redundant software thread computation
#87Method and control system for recognizing a fault when processing data in a processing system
#88Inertial sensor software architecture security method
#89Controlled execution of a program used for a virtual machine on a portable data carrier
#90Fault free store data path for software implementation of redundant multithreading environments
#91Method for monitoring the execution of a program by comparing a request with a response and introducing a falsification in a response
#92Secure data write apparatus and methods for use in safety instrumented process control systems
#93Detecting floating point hardware failures
#94Buffering unchecked stores for fault detection in redundant multithreading systems using speculative memory support
#95Variable delay instruction for implementation of temporal redundancy
#96Managing external memory updates for fault detection in redundant multithreading systems using speculative memory support
#97Fault-detecting computer system
#98Error detection method and system for processors that employ alternating threads
#99SEU and SEFI fault tolerant computer
#100System and method for event-driven live migration of multi-process applications
#101System and method for event-driven live migration of multi-process applications
#102System and method for event-driven live migration of multi-process applications
#103System and method for event-driven live migration of multi-process applications
#104System and method for event-driven live migration of multi-process applications
#105Cache protection through cache