190026 ⎘
Error detection; Error correction; Monitoring; Responding to the occurrence of a fault, e.g. fault tolerance; Error detection or correction of the data by redundancy in hardware where the fault affects the clock signals of a processing unit and the redundancy is at or within the level of clock signal generation hardware
NETWORK HEALTH SERVICES AND LIFECYCLE CORRECTNESS
#2AI INFERENCE COMPILER AND RUNTIME TOOL CHAIN
#3Switching System, Method and Apparatus of Clock Circuit, and Non-transitory Readable Storage Medium
#4METHOD TO MOVE THE TIME OF THE DAY (TOD) ACROSS ASYNCHRONOUS CLOCK DOMAINS WITH NO LOSS IN ACCURACY
#5CLOCK PROTECTION CIRCUIT, CLOCK PROTECTION METHOD, STORAGE MEDIUM AND ELECTRONIC DEVICE
#6FAULT INTERFACE ARCHITECTURE IN SAFETY-RELEVANT SYSTEMS
#7METHOD AND APPARATUS FOR EARLY DETECTION OF SIGNAL EXCURSION OUT OF FREQUENCY RANGE
#8TIMING-DRIFT CALIBRATION
#9CLOCK SIGNAL MONITORING UNIT
#10CLOCK DATA RECOVERY CIRCUIT
#11METHOD FOR MONITORING A CLOCK GENERATOR MODULE OF AN ELECTRONIC CIRCUIT
#12QUADRATURE ERROR CORRECTION CIRCUIT AND MEMORY DEVICE HAVING THE SAME
#13Method and apparatus for early detection of signal excursion out of frequency range
#14Method and system for tracing error of logic system design
#15Failure recovery in a scaleout system using a matrix clock
#16Control system
#17CLOCK SWITCHING METHOD, DEVICE, AND STORAGE MEDIUM
#18Clock data recovery circuit
#19Timing-drift calibration
#20Heterogeneous computing systems and methods for clock synchronization
#21Fault-tolerant time server for a real-time computer sytem
#22Clock data recovery circuit
#23Clock frequency counting during high-voltage operations for immediate leakage detection and response
#24Robust soft error tolerant multi-bit D flip-flop circuit
#25Timing-drift calibration
#26Clock recovery using between-interval timing error estimation
#27Method, clock recovery module as well as computer program for recovering a clock signal from a data signal
#28IPS SOC PLL monitoring and error reporting
#29Communication node for critical systems
#30Counter circuitry and methods including a master counter providing initialization data and fault detection data and wherein a threshold count difference of a fault detection count is dependent upon the fault detection data
#31Fail-safe clock monitor with fault injection
#32Lockstep processing systems and methods
#33Reducing chip latency at a clock boundary by reference clock phase adjustment
#34Data Transmission Between Computation Units Having Safe Signaling Technology
#35SIGNAL RECEIVING APPARATUS AND SIGNAL PROCESSING METHOD THEREOF
#36Fault tolerant clock monitor system
#37Clock generation circuit and clock signal generation method
#38Method, and a synchronous digital circuit, for preventing propagation of set-up timing data errors
#39Voltage reference reconfiguration fault-tolerant control method for multi-level inverter
#40Timing-drift calibration
#41Clock jitter emulation
#42Programmable clock monitor
#43System and method for false pass detection in lockstep dual core or triple modular redundancy (TMR) systems
#44Frequency converter
#45Data sampling alignment method for memory interface
#46BIOS real-time clock update
#47Clock jitter emulation
#48Brushless motor drive device
#49Systems and methods for serial data transfer margin increase
#50Error recovery within integrated circuit
#51Synchronization and order detection in a memory system
#52Serial interface with bit-level acknowledgement and error correction
#53Clock distribution network for multi-frequency multi-processor systems
#54UTILIZING A PROCESSOR WITH A TIME OF DAY CLOCK ERROR
#55UTILIZING A PROCESSOR WITH A TIME OF DAY CLOCK ERROR
#56Redundant watchdog method and system utilizing safety partner controller
#57Synchronization and order detection in a memory system
#58Reestablishing synchronization in a memory system
#59Pulsed-latch based razor with 1-cycle error recovery scheme
#60Method and apparatus for enabling temporal alignment of debug information
#61Timing-drift calibration
#62Error recovery within integrated circuit
#63Load control backup signal generating circuit
#64Load-control backup signal generation circuit
#65Load-control backup signal generation circuit
#66Interface calibration using configurable on-die terminations
#67Group write technique for a bus interface system
#68Timing-drift calibration
#69Method and system for robust precision time protocol synchronization
#70Timing-drift calibration
#71Error detecting apparatus for gate driver, display apparatus having the same and method of detecting error of gate driver
#72Storage control device and control device for detecting abnormality of signal line
#73Pulsed-latch based razor with 1-cycle error recovery scheme
#74Pulsed-latch based razor with 1-cycle error recovery scheme
#75INTEGRATED CIRCUIT
#76Reestablishing synchronization in a memory system
#77Error recovery within integrated circuit
#78Automatic selection of on-chip clock in synchronous digital systems
#79Clock distribution network for multi-frequency multi-processor systems
#80Multi-frequency clock skew control for inter-chip communication in synchronous digital systems
#81Error recovery within integrated circuit
#82Timing-drift calibration
#83Method and virtualization software for providing independent time sources for virtual runtime environments
#84Computer system for configuring a clock
#85Timer module and method for testing output signals of a timer module
#86Repurposing data lane as clock lane by migrating to reduced speed link operation
#87Measuring device electronics for a measuring device as well as measuring device formed therewith
#88System and method for duplexed replicated computing
#89Apparatus and method for redundant and spread spectrum clocking
#90Providing fault-tolerant spread spectrum clock signals in a system
#91Method and apparatus for providing system clock failover
#92Homogeneous recovery in a redundant memory system
#93Heterogeneous recovery in a redundant memory system
#94Control device
#95Error recovery within integrated circuit
#96Clock supervision unit
#97Method for checking suitability of a data processing device for performing failsafe automation processes
#98Clock supply method and information processing apparatus
#99Circuit for detecting clock and apparatus for providing clock
#100Oscillator phase matching
#101Decentralised fault-tolerant clock pulse generation in VLSI chips
#102Apparatus and method for redundant and spread spectrum clocking
#103Redundant clock switch circuit
#104Fault tolerant time synchronization mechanism in a scaleable multi-processor computer
#105Method and apparatus for fault tolerant time synchronization mechanism in a scaleable multi-processor computer
#106Real-time clock calibration method and system
#107Blade Clustering System with SMP Capability and Redundant Clock Distribution Architecture Thereof
#108Providing independent clock failover for scalable blade servers
#109Control unit for generating a clock pulse as a function of output signals outputted from at least two clock outputs
#110Systems and methods of synchronizing reference frequencies
#111Systems and methods for clock generation using hot-swappable oscillators
#112Clock loss detection and switchover circuit
#113Redundant oscillator distribution in a multi-processor server system
#114Method and apparatus for fault tolerant time synchronization mechanism in a scaleable multi-processor computer
#115Systems and methods for providing distributed control signal redundancy among electronic circuits
#116Feature implementation in a real time stamp distribution system
#117Redundant synchronous clock distribution method, a related clock module and a related clock slave device
#118Seamless clock
#119Fail-operational global time reference in a redundant synchronous data bus system
#120Clock loss detection and switchover circuit
#121Differential clock skew detector
#122I/O synchronization for high integrity multicore processing
#123Consistency determination
#124System and method for DDR memory timing acquisition and tracking