ClassID:

190449

G06F15/17387 - CPC Classification

Classification description:

Digital computers in general ; Data processing equipment in general; Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs; Interprocessor communication using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake; Indirect interconnection networks non hierarchical topologies Three dimensional, e.g. hypercubes

Recent Application in this class:
#1
20200301876
2020-09-24

Digital processing connectivity

#2
20200228435
2020-07-16

I/O routing in a multidimensional torus network

#3
20200192717
2020-06-18

Information processing apparatus, information processing method and non-transitory computer-readable storage medium for storing information processing program of determining relations among nodes in N-dimensional torus structure

#4
20190260666
2019-08-22

I/O routing in a multidimensional torus network

#5
20190012293
2019-01-10

Method and system for high performance real time pattern recognition

#6
20190007273
2019-01-03

High-performance data repartitioning for cloud-scale clusters

#7
20180241661
2018-08-23

I/O routing in a multidimensional torus network

#8
20180189068
2018-07-05

Methods and apparatus for adjacency network delivery of operands to instruction specified destinations that reduces storage of temporary variables

#9
20180048556
2018-02-15

I/O routing in a multidimensional torus network

#10
20170272327
2017-09-21

Network topology system and method

#11
20160357569
2016-12-08

Methods and apparatus for signal flow graph pipelining in an array processing unit that reduces storage of temporary variables

#12
20160255138
2016-09-01

Data transfer control apparatus that control transfer of data between nodes and parallel computing system

#13
20160011996
2016-01-14

Multi-petascale highly efficient parallel supercomputer

#14
20150333956
2015-11-19

Configuration of a cluster server using cellular automata

#15
20150039855
2015-02-05

Methods and apparatus for signal flow graph pipelining that reduce storage of temporary variables

#16
20140244971
2014-08-28

Array of processor core circuits with reversible tiers

#17
20130283010
2013-10-24

3-D stacked multiprocessor structures and methods for multimodal operation of same

#18
20130283009
2013-10-24

3-D stacked multiprocessor structures and methods for multimodal operation of same

#19
20130159450
2013-06-20

Optimized data communications in a parallel computer

#20
20130159448
2013-06-20

Optimized data communications in a parallel computer

#21
20120317399
2012-12-13

Performing a local reduction operation on a parallel computer

#22
20120278059
2012-11-01

System and method for examining concurrent system states

#23
20120023260
2012-01-26

DIAGONALLY ENHANCED CONCENTRATED HYPERCUBE TOPOLOGY

#24
20110258245
2011-10-20

Performing a local reduction operation on a parallel computer

#25
20110219208
2011-09-08

Multi-petascale highly efficient parallel supercomputer

#26
20110173349
2011-07-14

I/O routing in a multidimensional torus network

#27
20090066366
2009-03-12

Reprogrammable three dimensional intelligent system on a chip

#28
20080091842
2008-04-17

Optimized scalable network switch