ClassID:

190477

G06F15/7864 - CPC Classification

Classification description:

Digital computers in general ; Data processing equipment in general; Architectures of general purpose stored program computers comprising a single central processing unit with memory on more than one IC chip

Recent Application in this class:
#1
20250383882
2025-12-18

METHOD AND SYSTEM TO SUPPORT DATA STREAMING FOR MATRIX OPERATIONS VIA A MACHINE LEARNING HARDWARE

#2
20250284499
2025-09-11

STREAMING ENGINE FOR MACHINE LEARNING ARCHITECTURE

#3
20230409515
2023-12-21

SCALABLE 2.5D INTERFACE CIRCUITRY

#4
20230089800
2023-03-23

Performing testing utilizing staggered clocks

#5
20220121616
2022-04-21

Scalable 2.5D interface circuitry

#6
20210263883
2021-08-26

Peripheral component interconnect (PCI) backplane connectivity system on chip (SoC)

#7
20210011878
2021-01-14

Scalable 2.5D interface circuitry

#8
20200401552
2020-12-24

Methods and system for an integrated circuit

#9
20200387472
2020-12-10

Bit string accumulation in memory array periphery

#10
20200226094
2020-07-16

Scalable 2.5D interface circuitry

#11
20200192859
2020-06-18

Peripheral component interconnect (PCI) backplane connectivity system on chip (SoC)

#12
20200073851
2020-03-05

Scalable 2.5D interface circuitry

#13
20190244141
2019-08-08

Systems and methods for programmable hardware architecture for machine learning

#14
20190244130
2019-08-08

Architecture for dense operations in machine learning inference engine

#15
20190244118
2019-08-08

Architecture of crossbar of inference engine

#16
20190244117
2019-08-08

Streaming engine for machine learning architecture

#17
20190243871
2019-08-08

Architecture for irregular operations in machine learning inference engine

#18
20190243800
2019-08-08

Array-based inference engine for machine learning

#19
20190243653
2019-08-08

Single instruction set architecture (ISA) format for multiple ISAS in machine learning inference engine

#20
20180239738
2018-08-23

Methods and apparatus for controlling interface circuitry

#21
20170315840
2017-11-02

Locality-aware scheduling for NIC teaming

#22
20170127550
2017-05-04

Modular computer system and server module

#23
20150370754
2015-12-24

INTEGRATED CIRCUIT APPARATUS, THREE-DIMENSIONAL INTEGRATED CIRCUIT, THREE-DIMENSIONAL PROCESSOR DEVICE, AND PROCESS SCHEDULER, WITH CONFIGURATION TAKING ACCOUNT OF HEAT

#24
20150012681
2015-01-08

Common idle state, active state and credit management for an interface

#25
20140289435
2014-09-25

Issuing requests to a fabric

#26
20140281383
2014-09-18

Ground-referenced single-ended signaling connected graphics processing unit multi-chip module

#27
20130185542
2013-07-18

External auxiliary execution unit interface for format conversion of instruction from issue unit to off-chip auxiliary execution unit

#28
20130086586
2013-04-04

Issuing requests to a fabric

#29
20130086139
2013-04-04

Common idle state, active state and credit management for an interface

#30
20090055157
2009-02-26

Server Having Remotely Manageable Emulated Functions

#31
20080030510
2008-02-07

Multi-GPU rendering system

#32
20070162678
2007-07-12

Computer system and memory bridge for processor socket thereof

#33
20070130404
2007-06-07

Portable notebook computer motherboard

#34
20070113048
2007-05-17

Pipelined access by FFT and filter units in co-processor and system bus slave to memory blocks via switch coupling based on control register content

#35
20070038843
2007-02-15

Accelerated processing with scheduling to configured coprocessor for molecular data type by service and control coprocessor upon analysis of software code

#36
20060277401
2006-12-07

System and method for information handling system interoperable firmware storage

#37
20060161710
2006-07-20

Single board computer for industry personal computer

#38
20060149883
2006-07-06

Systems and methods for providing co-processors to computing systems

#39
20060122814
2006-06-08

Method and apparatus for digital signal processing analysis and development

#40
20060106591
2006-05-18

System with PPU/GPU architecture

#41
20050273542
2005-12-08

Configurable components for embedded system design

#42
20050268072
2005-12-01

Apparatus and method for interconnecting a processor to co-processors using shared memory

#43
20050216702
2005-09-29

Complex domain floating point VLIW DSP with data/program bus multiplexer and microprocessor interface

#44
20050119870
2005-06-02

Processor system with execution-reservable accelerator

#45
18379936
2026-05-05

Method and system for in-line data conversion outside of a machine learning hardware

#46
17590994
2024-10-08

Method and apparatus for performing machine learning operations in parallel on machine learning hardware

#47
17511111
2024-05-28

Method and apparatus for performing machine learning operations in parallel on machine learning hardware

#48
17248045
2024-12-17

Instruction set architecture (ISA) format for multiple instruction set architectures in machine learning inference engine

#49
16447008
2020-07-21

Methods and system for an integrated circuit

#50
14960175
2018-05-15

Scalable 2.5D interface circuitry