ClassID:

190498

G06F15/8084 - CPC Classification

Classification description:

Digital computers in general ; Data processing equipment in general; Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors; Vector processors; Details on data register access Special arrangements thereof, e.g. mask or switch

Recent Application in this class:
#1
20250231906
2025-07-17

GENERAL-PURPOSE SYSTOLIC ARRAY

#2
20240184578
2024-06-06

NEOHARRY: HIGH-PERFORMANCE PARALLEL MULTI-LITERAL MATCHING ALGORITHM

#3
20240078212
2024-03-07

General-purpose systolic array

#4
20230325347
2023-10-12

General-purpose systolic array

#5
20200174965
2020-06-04

Processor core design optimized for machine learning applications

#6
20200097290
2020-03-26

METHOD AND APPARATUS FOR PERFORMING A VECTOR PERMUTE WITH AN INDEX AND AN IMMEDIATE

#7
20200019530
2020-01-16

Method and system for partial wavefront merger

#8
20190369994
2019-12-05

Providing multi-element multi-vector (MEMV) register file access in vector-processor-based devices

#9
20190171614
2019-06-06

Arithmetic unit

#10
20180342270
2018-11-29

Memories and methods for performing vector atomic memory operations with mask control and variable data length and data unit size

#11
20180309461
2018-10-25

Apparatus and method for vector compression

#12
20180225255
2018-08-09

Hardware processors and methods for tightly-coupled heterogeneous computing

#13
20180144006
2018-05-24

Methods and systems for fast set-membership tests using one or more processors that support single instruction multiple data instructions

#14
20180144005
2018-05-24

Methods and systems for fast set-membership tests using one or more processors that support single instruction multiple data instructions

#15
20180067743
2018-03-08

Systems, apparatuses, and methods for setting an output mask in a destination writemask register from a source write mask register using an input writemask and immediate

#16
20180032342
2018-02-01

System and method of loop vectorization by compressing indices and data elements from iterations based on a control mask

#17
20170091124
2017-03-30

Exception preserving parallel data processing of string and unstructured text

#18
20160292128
2016-10-06

Multithreading in vector processors

#19
20160188532
2016-06-30

Method and apparatus for performing a vector bit shuffle

#20
20160188530
2016-06-30

Method and apparatus for performing a vector permute with an index and an immediate

#21
20160179527
2016-06-23

Method and apparatus for efficiently managing architectural register state of a processor

#22
20160094241
2016-03-31

Apparatus and method for vector compression

#23
20160085722
2016-03-24

Data packet processing

#24
20150088926
2015-03-26

Methods and systems for fast set-membership tests using one or more processors that support single instruction multiple data instructions

#25
20140223139
2014-08-07

Systems, apparatuses, and methods for setting an output mask in a destination writemask register from a source write mask register using an input writemask and immediate

#26
20140095850
2014-04-03

System and method of loop vectorization by compressing indexes and data elements from iterations based on a control mask

#27
20140095828
2014-04-03

Vector move instruction controlled by read and write masks

#28
20140059323
2014-02-27

Systems and methods of data extraction in a vector processor

#29
20140059322
2014-02-27

APPARATUS AND METHOD FOR BROADCASTING FROM A GENERAL PURPOSE REGISTER TO A VECTOR REGISTER

#30
20140040603
2014-02-06

Vector processing in an active memory device

#31
20140040601
2014-02-06

Predication in a vector processor

#32
20140040598
2014-02-06

Vector processing in an active memory device

#33
20140040597
2014-02-06

Predication in a vector processor

#34
20140006748
2014-01-02

Apparatus and method of vector unit sharing

#35
20120272046
2012-10-25

Vector completion mask handling

#36
20120102275
2012-04-26

Memories and methods for performing vector atomic memory operations with mask control and variable data length and data unit size

#37
20100115233
2010-05-06

DYNAMICALLY-SELECTABLE VECTOR REGISTER PARTITIONING

#38
20090249039
2009-10-01

Providing extended precision in SIMD vector arithmetic operations

#39
20080189513
2008-08-07

Result data forwarding in parallel vector data processor based on scalar operation issue order

#40
20080098200
2008-04-24

Two dimensional addressing of a matrix-vector register array

#41
20080091924
2008-04-17

Vector processor and system for vector processing

#42
20080082785
2008-04-03

Vector completion mask handling

#43
20080046681
2008-02-21

Two dimensional addressing of a matrix-vector register array

#44
20070245087
2007-10-18

Data buffer device, cache device, and data buffer control method

#45
20070150700
2007-06-28

System and method for performing efficient conditional vector operations for data parallel architectures involving both input and conditional vector values

#46
20060184765
2006-08-17

Method and apparatus for producing an index vector for use in performing a vector permute operation

#47
20060129787
2006-06-15

Providing extended precision in SIMD vector arithmetic operations

#48
20060015705
2006-01-19

Arrangement, system and method for vector permutation in single-instruction multiple-data mircoprocessors

#49
20050108503
2005-05-19

Two dimensional addressing of a matrix-vector register array

#50
15944315
2020-08-18

Core for a data processing engine in an integrated circuit

#51
13459987
2018-03-27

Constrained backup image defragmentation optimization within deduplication system