191186 ⎘
Indexing scheme relating to group ; Methods or arrangements for data conversion without changing the order or content of the data handled; Indexing scheme relating to groups - Details of pointers, i.e. structure of the address generators
Methods, devices, and media for hardware-supported object metadata retrieval
#2Binary-to-gray conversion circuit, related FIFO memory, integrated circuit and method
#3Data transfer device and wireless communication circuit
#4Bi-synchronous electronic device with burst indicator and related methods
#5Dual-buffer serialization and consumption of variable-length data records produced by multiple parallel threads
#6Dual-buffer serialization and consumption of variable-length data records produced by multiple parallel threads
#7Buffer for ordering out-of-order data, and corresponding integrated circuit and method for managing a buffer
#8Buffer manager and methods for managing memory
#9System and method for determining a time for safely sampling a signal of a clock domain
#10DEVICE AND METHOD FOR A HALF-RATE CLOCK ELASTICITY FIFO
#11Data storage system, electronic system, and telecommunications system
#12Circular buffer in a redundant virtualization environment
#13Buffer manager and methods for managing memory
#14Data storage system, electronic system, and telecommunications system
#15Synchronising between clock domains
#16Memory control method and memory control device
#17Method and apparatus for address FIFO for high bandwidth command/address busses in digital storage system
#18Ring buffer circuit and control circuit for ring buffer circuit
#19Apparatus and method for initializing an elastic buffer
#20Buffer controller and management method thereof
#21Data receiver apparatus and data transmitter apparatus
#22Concurrent read and write access to a linked list where write process updates the linked list by swapping updated version of the linked list with internal list
#23Pointer computation method and system for a scalable, programmable circular buffer
#24Method and apparatus for address FIFO for high-bandwidth command/address busses in digital storage system
#25Method and apparatus for queue depth detection in a memory system
#26FIFO with multiple data inputs and method thereof
#27Buffer controller and management method thereof
#28FIFO module, deskew circuit and rate matching circuit having the same
#29Spacecake coprocessor communication
#30Methods and circuitry for implementing first-in first-out structure
#31Methods and circuitry for implementing first-in first-out structure
#32First-in first-out memory system with shift register fill indication
#33First-in first-out memory system with single bit collision detection
#34Methods and circuitry for implementing first-in first-out structure
#35Apparatus and method for initializing an elastic buffer
#36Apparatus and method for efficient data storage using a FIFO memory
#37Non-blocking concurrent queues with direct node access by threads
#38FIFO circuit for DDR memory system
#39Methods and apparatuses for shared state information among concurrently running processes or threads