191609 ⎘
Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units; Interrupt Generation of an interrupt or a group of interrupts after a predetermined number of interrupts
INTERRUPT AND EXCEPTION CLUSTERING IN A PROCESSOR USING TIMING GROUPS
#2INTERRUPT AND EXCEPTION CLUSTERING IN A PROCESSOR USING EXTERNAL EVENT GROUPS
#3INTERRUPT AND EXCEPTION CLUSTERING IN A PROCESSOR USING MEMBERSHIP GROUPS
#4USB power control analog subsystem architecture
#5USB power control analog subsystem architecture
#6Troubleshooting method, computer system, baseboard management controller, and system
#7Synchronization of interrupt processing to reduce power consumption
#8Determining when to throttle interrupts to limit interrupt processing to an interrupt processing time period
#9Pessimistic interrupt affinity for devices
#10Determining when to throttle interrupts to limit interrupt processing to an interrupt processing time period
#11Pessimistic interrupt affinity for devices