ClassID:

191671

G06F2217/72 - CPC Classification

Classification description:

Recent Application in this class:
#1
20180157779
2018-06-07

Programmable logic integrated circuit, design support system, and configuration method

#2
20180053278
2018-02-22

Safety analysis system for wiring

#3
20170062582
2017-03-02

Dummy gate placement methodology to enhance integrated circuit performance

#4
20170061062
2017-03-02

Reliability of an electronic device

#5
20170012856
2017-01-12

Network stochastic cross-layer optimization for meeting traffic flow availability target at minimum cost

#6
20160314234
2016-10-27

Methods for modifying an integrated circuit layout design

#7
20160267212
2016-09-15

Method and apparatus for placing and routing partial reconfiguration modules

#8
20150187585
2015-07-02

Dummy gate placement methodology to enhance integrated circuit performance

#9
20150070048
2015-03-12

Verifying partial good voltage island structures

#10
20150040091
2015-02-05

Methods for modifying an integrated circuit layout design

#11
20140237441
2014-08-21

Method and apparatus for placing and routing partial reconfiguration modules

#12
20130212414
2013-08-15

Reducing performance degradation in backup semiconductor chips

#13
20130134595
2013-05-30

Methods and apparatus to improve reliability of isolated vias

#14
20110055785
2011-03-03

Method and apparatus for performing redundant via insertion during circuit design

#15
20100100859
2010-04-22

Methodology for preventing functional failure caused by CDM ESD

#16
12041167
2015-08-25

Method of generating data for estimating resource requirements for a circuit design