189287 ⎘
Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements; Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers; Interfaces specially adapted for storage systems adopting a particular infrastructure; In-line storage system Single storage device
Sub-classes:METHODS AND APPARATUS FOR MANAGING DATA IN STACKED DRAMS
#2REDUNDANCY AND SWAPPING SCHEME FOR MEMORY REPAIR
#3SYSTEMS, APPARATUSES AND METHODS FOR DETERMINING AND STORING STRESS VALUES FOR MEMORY OF A MEMORY DEVICE
#4SELF-TUNING FOR PERFORMANCE AND POWER IN A HIGH-BANDWIDTH MEMORY DEVICE
#5REDUCED POWER ADDRESSING
#6STORAGE DEVICE, MEMORY DEVICE, AND COMPUTING SYSTEM INCLUDING THE SAME
#7APPARATUSES AND METHODS FOR ACTIVATION COUNT INITIALIZATION DURING SOFT POST-PACKAGE REPAIR
#8MEMORY CONTROLLER PERFORMING A PRIORITY BASED DATA PREFETCH AND ASSOCIATED METHODS AND SYSTEMS
#9MEMORY MAPPING FOR MICRO-SCALING NUMERICS FORMAT
#10ENHANCED DATA STORAGE PROCESSING USING AN AUGMENTED DATA CONTROLLER AND AUGMENTED INSTRUCTIONS
#11STORAGE DEVICE CONTROLLING INPUT ORDER OF COMMANDS AND METHOD FOR OPERATING THE STORAGE DEVICE
#12MEMORY CONTROLLER CIRCUIT AND OPERATION METHOD OF THE SAME
#13MEMORY DEVICE
#14DATA TRANSFERS AMONG PROCESSORS
#15EFFICIENT PROCESSING OF STORAGE REQUESTS AND COMPLETION NOTIFICATIONS INCLUDING AGGREGATION OF STORAGE REQUESTS AND COMPLETION NOTIFICATIONS
#16MEMORY, MEMORY OPERATION METHOD, AND STORAGE DEVICE
#17ENHANCED DATA STORAGE PROCESSING USING AN AUGMENTED DATA CONTROLLER AND AUGMENTED INSTRUCTIONS
#18Memory Controller and Command Buffer for Parallel Metadata Access and Enhanced Error Correction
#19IDENTIFY PROVIDER AGNOSTIC DEPARTMENTAL MULTI-TENANCY MANAGEMENT OF STORAGE RESOURCES
#20COMBINING DATA BLOCK I/O AND CHECKSUM BLOCK I/O INTO A SINGLE I/O OPERATION DURING PROCESSING BY A STORAGE STACK
#21RESOURCE DISTRIBUTION IN MULTI-PORT MEMORY WITH HOST FEEDBACK
#22SINGLE-BIT ERROR INDICATION FOR A MEMORY BUILT-IN SELF-TEST
#23LOAD-REDUCED DRAM STACK
#24STORAGE DEVICE AND OPERATING METHOD OF STORAGE DEVICE
#25MEMORY DEVICE AND OPERATING METHOD WITH DATA FORMAT OPERATION
#26ENABLING LOGICAL OPERATIONS IN LOW-POWER, DOUBLE DATA RATE (LPDDR) MEMORY
#27SEMICONDUCTOR MEMORY DEVICE HAVING MEMORY CELL ARRAY AND METHOD OF OPERATING SEMICONDUCTOR MEMORY DEVICE
#28SEGMENTED DATA LINES IN MEMORY SYSTEMS
#29MEMORY SYSTEM WITH A DYNAMIC CAPACITY
#30A Deep Neural Network Oriented Memory Access Management Method for Heterogeneous Multi-core Systems
#31RESEQUENCING DATA PROGRAMMED TO MULTIPLE LEVEL MEMORY CELLS AT A MEMORY SUB-SYSTEM
#32MEMORY DEVICE WITH NEAR-MEMORY PROCESSING UNIT AND MEMORY MANAGEMENT
#33COMPLETE AND INCOMPLETE SUPERBLOCK GENERATION
#34ELECTRONIC DEVICE COMPRISING NEURAL PROCESSING UNIT, AND OPERATING METHOD THEREOF
#35EVENT LOG DATA STORAGE
#36MEMORY MODULE AND MEMORY EXPANSION BOARD OF SERVER
#37SELF-MANAGED DRAM MODULES WITH BUILT-IN DATA COMPRESSION AND TIERED CACHING
#38MEMORY MANAGEMENT
#39MEASURING CHANGE IN A CHANNEL CHARACTERISTIC TO DETECT MEMORY DEVICE ATTACK
#40Circuits And Methods For Correcting Errors In Memory
#41Dynamically Switching A Software Service Between Stateful Mode And Stateless Mode
#42METHOD FOR GENERATING FIRMWARE-DEDICATED STORAGE PROTOCOL QUEUES FOR VIRTUAL DEVICES
#43Converting DIX to DIF for Host Device
#44MEMORY DEVICES AND METHODS FOR MEMORY DEVICES
#45STORAGE OPTIMIZATION VIA DATA DEDUPLICATION
#46USER FEEDBACK IN MEMORY TRAINING STARTUP SEQUENCES
#47MEMORY CAPACITY ADJUSTMENT METHOD AND APPARATUS, AND SERVER, ELECTRONIC DEVICE AND STORAGE MEDIUM
#48ACTIVITY-BASED DATA RANDOM ACCESS MEMORY (RAM) RETENTION
#49SLUMBER MODE FOR MEMORY TO REDUCE LEAKAGE IN ACTIVE MODE
#50METHOD AND ELECTRONIC DEVICE FOR SECURE ON-DEVICE STORAGE FOR MACHINE LEARNING MODELS
#51REQUEST PROCESSING METHOD, APPARATUS, AND SYSTEM
#52SKEW RESISTANCE PROCESSING IN DIMM DEVICE AND PROCESSING METHOD
#53DEVICE AND METHOD WITH HOTNESS TRACKING
#54DATA ACCESS APPARATUS AND OPERATING METHOD THEREOF
#55COMPRESSION RATIO BY USING PATTERN-BASED DATA DEDUPLICATION IN MEMORY DEVICE
#56Predictive Decompression of Data for Access via Computer Express Link Fabric
#57CONFIGURABLE SUBSTRATE BIASING AT A MEMORY SYSTEM
#58MEMORY SLOT CONTROL METHOD AND APPARATUS, ELECTRONIC DEVICE, AND STORAGE MEDIUM
#59PERFORMANCE-BASED SCALING AND MIGRATION IN VIRTUAL STORAGE SYSTEMS
#60METHOD AND APPARATUS FOR IMPROVING MEMORY BANDWIDTH WHILE MEETING QOS BY MANAGING QUEUE SPACE
#61MEMORY APPARATUS, MEMORY SYSTEM AND OPERATION METHOD THEREOF
#62PROCESSOR
#63Efficient Data Access for Accelerated Administrative Commands
#64MEMORY DEVICE, MEMORY SYSTEM AND DATA OUTPUTTING METHOD
#65SRAM SAFETY ARCHITECTURE FOR HIGH INTEGRITY
#66MANAGING MULTI-RANK OPERATIONS IN MEMORY SYSTEMS
#67STORAGE DEVICE STORING RANDOMLY READ DATA UNITS AND METHOD FOR OPERATING STORAGE DEVICE
#68TECHNIQUES FOR ADAPTIVE COALESCING OF LOGGING OPERATIONS
#69POWER LOSS PROTECTION SYSTEM AND ELECTRONIC DEVICE INCLUDING THE SAME
#70DATA WRITE METHOD AND APPARATUS, COMPUTER DEVICE, AND STORAGE MEDIUM
#71Dynamically Determining an Input/Output Path
#72OPERATING IN A WRITE THROUGH MODE TRANSITION WHILE MAINTAINING DATA INTEGRITY AFTER AN ABRUPT SHUTDOWN ON A STORAGE DEVICE
#73METHOD AND APPARATUS FOR SCHEDULING I/O REQUEST, ELECTRONIC DEVICE, STORAGE MEDIUM, SYSTEM AND COMPUTER PROGRAM PRODUCT
#74LOW-POWER DIGITAL SORTING
#75REGISTER GROUPING AND VIRTUAL REGISTER
#76PRINTING HEAD AND DATA RECOGNITION METHOD
#77Adaptive Host Memory Buffer Traffic Control
#78STORAGE DEVICE FOR WRITING DATA TO SUPER MEMORY BLOCKS CORRESPONDING TO TAGS, AND METHOD FOR OPERATING THE STORAGE DEVICE
#79METHODS AND APPARATUS FOR DDR6 COMMAND ADDRESS AND CHIP SELECT TRAINING
#80SELF-MANAGED DRAM MODULES WITH BUILT-IN ADAPTIVE DATA COMPRESSION
#81Intelligent Data Duplication/Backup
#82VARIABLE MEMORY ACCESS GRANULARITY
#83MANAGING DISTRIBUTION OF PAGE ADDRESSES AND PARTITION NUMBERS IN A MEMORY SUB-SYSTEM
#84STORAGE DEVICE AND METHOD FOR OPERATING STORAGE DEVICE
#85SAME BANK REFRESH COMMAND SCHEDULING
#86METHOD AND SYSTEM FOR EXTRACTING PRIVILEGED INFORMATION FROM A MOBILE DEVICE AND DETERMINING PROOF OF SECURE ERASURE
#87STORAGE DEVICE CONTROL METHOD AND ELECTRONIC DEVICE USING THE STORAGE DEVICE CONTROL METHOD
#88MEMORY DEVICE INCLUDING MODE REGISTER AND METHOD OF READING MODE REGISTER THEREOF
#89Memory Controller with Dynamic Signaling Schemes
#90PIPELINED READ-MODIFY-WRITE OPERATIONS IN CACHE MEMORY
#91METADATA COMMUNICATION BY A MEMORY DEVICE
#92COMMUNICATIONS PROTOCOL CONVERSION OVER A MESH INTERCONNECT
#93Two-Activate Timing Window for DRAM
#94Configurable Memory Provisioning
#95Data Storage Device and Method for Speculation-Driven Partial Shutdown
#96APPARATUS AND METHOD FOR IMPROVING COMPATIBILITY OF COMPUTER-MEMORY LINK-BASED DEVICE
#97SYSTEMS AND METHODS FOR PROVIDING EXTENDED MEMORY ACCESS IN A PARALLEL PROCESSOR
#98BANK-BASED REFRESH FOR A MEMORY DEVICE
#99STORAGE DEVICE INCLUDING THE VOLATILE MEMORY AND OPERATING METHOD OF STORAGE DEVICE
#100SYSTEM AND METHOD FOR OPTIMIZING MEMORY UTILIZATION IN A DISTRIBUTED FILE SYSTEM
#101SEARCH FOR AN OPTIMIZED READ VOLTAGE
#102METHODS AND SYSTEMS FOR IMPLEMENTING STREAM DATA UPDATES
#103METHOD AND APPARATUS FOR MANAGEMENT OF CONCURRENT DEPENDENT WRITES
#104PERFORMING MEMORY ACCESS OPERATIONS BASED ON QUAD-LEVEL CELL TO SINGLE-LEVEL CELL MAPPING TABLE
#105APPARATUSES, SYSTEMS, AND METHODS FOR STORING MEMORY METADATA
#106EFFICIENT DATA MOVEMENT FOR AI ACCELERATORS
#107INTEGRATED CIRCUIT
#108MEMORY CONTROLLER HAVING A WRITE BUFFERS
#109MEMORY RECLAIM METHOD AND ELECTRONIC DEVICE
#110APPARATUSES, SYSTEMS, AND METHODS FOR STORING MEMORY METADATA
#111MEMORY DEVICE, MEMORY SYSTEM INCLUDING MEMORY DEVICE, AND METHOD OF OPERATING MEMORY DEVICE
#112LOW OVERHEAD PAGE RECOMPRESSION
#113SYSTEM AND METHODS FOR DRAM-LESS GARBAGE COLLECTION WITH IMPROVED PERFORMANCE
#114MEMORY MANAGEMENT METHOD AND COMPUTER DEVICE
#115DYNAMIC REPARTITION OF MEMORY PHYSICAL ADDRESS MAPPING
#116CANCELLING UNUSED READ COMMANDS FOR ACCESSING DATA IN MEMORY
#117TECHNIQUES FOR OPTIMIZED STORAGE UTILIZATION IN LIVE ORIGIN SERVERS
#118MEMORY SYSTEM FOR CONTROLLING READ AND WRITE OPERATIONS BASED ON PRIORITIES AND OPERATION METHOD THEREOF
#119STORAGE DEVICE CONTROLLING ACCESS TO HOST MEMORY BUFFER, SYSTEM, AND METHOD FOR OPERATING STORAGE DEVICE
#120DEALLOCATION OF A MEMORY DEVICE WITH A SEGMENTED MAPPING TABLE
#121SYSTEMS AND METHODS FOR ENABLING OBSERVABILITY OF BACKEND STORAGE EVENT TO FRONT-END HOST
#122STORAGE SYSTEM, MAP GENERATION DEVICE, AND MAP GENERATION METHOD
#123DATA STORAGE DEVICE AND METHOD OF OPERATING THE SAME
#124Reporting Multiple Events associated with Mitigating Usage-Based Disturbance
#125OPTIMIZING DATA PLACEMENT BASED ON DATA TEMPERATURE AND LIFETIME PREDICTION
#126DYNAMIC ADDRESS-BASED DATA RELIABILITY
#127Safeguarded Snapshot Generation within a Flash-based Storage System to Protect Against Ransomware
#128AI-Powered Generation of Storage Insights associated with Unusual Activity Within a Flash-based Storage System
#129METHODS FOR PERFORMING MULTIPLE MEMORY OPERATIONS IN RESPONSE TO A SINGLE COMMAND AND MEMORY DEVICES AND SYSTEMS EMPLOYING THE SAME
#130READ BROADCAST OPERATIONS ASSOCIATED WITH A MEMORY DEVICE
#131Prefetching Data for Submission Queues in Communications between a Memory Sub-System and a Host System
#132Dynamic Management of Buffers for Submission Queues in Communications between a Memory Sub-System and a Host System
#133PROCESSING SYSTEM AND PROCESSING METHOD FOR NEURAL NETWORK
#134DATA PROCESSING METHOD AND DEVICE BASED ON MULTI-MESSAGE QUEUE SYSTEM
#135ELECTRONIC DEVICE AND COMPUTING SYSTEM INCLUDING SAME
#136CONTROL DEVICE, MEMORY DEVICE AND MEMORY SYSTEM
#137MEMORY SYSTEM AND METHOD FOR PROCESSING READ COMMANDS FOR A TARGET ADDRESS
#138COMMUNICATION USING NON-CACHE-COHERENT DISAGGREGATED MEMORY
#139SAMPLING-BASED READ ENABLING WINDOW GENERATION METHOD
#140STORAGE DEVICE AND METHOD OF OPERATING THE SAME
#141STORAGE CAPACITY TRACKING IN STORAGE SYSTEMS
#142APPARATUS WITH REFRESH MANAGEMENT MECHANISM
#143REVERSE LINKAGE OF AUXILIARY RESOURCES TO A RESOURCE LOCATION AND RESOURCE-RECEIVING ENTITY
#144MEMORY CONTROLLER, STORAGE DEVICE INCLUDING THE SAME, AND OPERATING METHOD THEREOF
#145SYSTEM AND METHOD FOR PROTECTION OF AN AUDIT TRAIL DURING PERFORMANCE OPTIMIZATION OF STANDARDS-COMPLIANT DATA SANITIZATION OF INFORMATION STORAGE MEDIA
#146SYSTEMS, METHODS, AND APPARATUS FOR COPY DESTINATION ATOMICITY IN DEVICES
#147SEMICONDUCTOR MEMORY DEVICE AND MEMORY SYSTEM
#148Power Save Mode By Disabling Multi-Channel Memory
#149SEMICONDUCTOR APPARATUS
#150CONTROLLER, STORAGE DEVICE AND COMPUTING SYSTEM
#151MEMORY WITH REDUNDANT REPLACEMENT RESOURCES AND ELECTRONIC DEVICE
#152DATA STORAGE APPARATUS WITH IMPROVED WRITE EFFICIENCY, OPERATING METHOD THEREOF, AND MEMORY CONTROLLER THEREFOR
#153PORTIONED ERASE OPERATION FOR A MEMORY SYSTEM
#154APPARATUSES, METHODS, AND SYSTEMS FOR PERFORMING MODIFIED REFRESH SEQUENCE FOLLOWING SELF-REFRESH EXIT
#155ORGANIZING INFORMATION USING HIERARCHICAL DATA SPACES
#156METHOD AND SEMICONDUCTOR MEMORY DEVICE HAVING MEMORY CELL ARRAY INCLUDING SUB-ARRAY BLOCKS
#157DATA PROCESSING METHOD AND APPARATUS, SERVER, AND STORAGE MEDIUM
#158Method for Optimizing Memory Access Based on Machine Learning Model and Related Device
#159PROCESSING WRITE REQUESTS BASED ON QUEUE IDENTIFIER
#160QUALITY OF SERVICE ENHANCEMENT THROUGH DYNAMIC HOST MEMORY BUFFER CONFIGURATION
#161PERFORMING DATA-STORAGE BACKGROUND ACTIVITIES
#162SYSTEM AND METHOD OF ADDRESS MAPPING FOR SAVING MEMORY MACRO ADDRESS BUS TOGGLE POWER
#163ROW-PRESS MITIGATION CIRCUIT DEVICE AND METHOD FOR SECURING DRAM AGAINST DATA-DISTURBANCE ERRORS
#164STORAGE SYSTEM AND OPERATING METHOD THEREOF
#165OPERATING METHOD OF PAGE BUFFER FOR READ OPERATION OF SEMICONDUCTOR DEVICE
#166DETERMINING VOLTAGE OFFSET FOR A MEMORY OPERATION USING MEMORY BIN AND MEMORY POSITION
#167Merged Driver Circuit for Accessing Usage-Based-Disturbance Data
#168PARTIAL BLOCK ALLOCATIONS FOR MEMORY SYSTEMS
#169SELF-SYNCHRONIZING REMOTE MEMORY OPERATIONS IN A MULTIPROCESSOR SYSTEM
#170SETTING TERMINATION IMPEDANCE BASED ON ENCODING BITS IN A COMMAND
#171SYSTEMS AND METHODS FOR MULTI-PRECISION MEMORY RETRIEVAL
#172STORAGE DEVICE SUPPORTING SPECULATIVE READ OPERATION
#173CONJOINED MEMORY SYSTEMS SUPPORTING DATA STORAGE IN LARGER MEMORY SYSTEM WHEN SMALLER MEMORY SYSTEM IS UNAVAILABLE AND WITH SMALLER MEMORY SYSTEM READ LATENCY, AND RELATED PROCESSOR-BASED SYSTEMS AND METHODS
#174MEMORY SUB-SYSTEM FOR ADJUSTING MEMORY DEVICE PROGRAMMING PARAMETERS
#175LATENCY DETERMINATION
#176MACHINE LEARNING DRIVEN DEVICE FOR OPTIMIZING MEMORY SUB-SYSTEMS
#177HARDWARE TRAFFIC GENERATOR USING LINEAR FEEDBACK SHIFT REGISTERS FOR TESTING OF MEMORY SUBSYSTEMS
#178MODIFYING MACHINE LEARNING PARAMETERS IN MEMORY SYSTEMS
#179METHODS AND APPARATUS FOR DYNAMIC CHIP SELECT MODES
#180CONTROLLING USER SPACE I/O CAPABILITIES FOR STORAGE SYSTEMS
#181MITIGATION METHODS FOR IMPACT OF QUICK CHARGE LOSS ON READ ERRORS
#182READ BOOSTER FOR OPERATIONAL DATA OF A MEMORY SYSTEM
#183HOST CONFIGURED CURRENT LIMITS
#184METHOD OF SELECTING TRIMMINGS IN NON-VOLATILE MEMORIES, CORRESPONDING DEVICE AND COMPUTER PROGRAM PRODUCT
#185Power-Efficient Monitoring for Usage-Based-Disturbance Mitigation
#186DATA BLOCK VALIDITY FOR MAINTENANCE OPERATIONS
#187MEMORY CONTROLLER FOR USE WITH ROW-BUFFER MEMORY
#188INTERNALLY MODIFYING ACCESS COMMAND LATENCY
#189COMPUTING DEVICE WITH INDEPENDENTLY COHERENT NODES
#190READ OPERATIONS FOR COMPUTATIONAL MODELS
#191MEMORY SYSTEM WITH REGION-SPECIFIC MEMORY ACCESS SCHEDULING
#192SYSTEM AND METHOD OF PERFORMING DECOMPRESSION OF PAGE DATA ASSOCIATED WITH A PLURALITY OF APPLICATIONS
#193DATA STORAGE SYSTEM AND OPERATING METHOD OF DATA STORAGE SYSTEM
#194MEMORY DEVICE
#195Multi-Modal Refresh of Dynamic, Random-Access Memory
#196Memory Calibration and Margin Check
#197STORAGE USAGE
#198SYSTEMS AND METHODS FOR MANAGING METRIC DATA
#199SECURE FLUID MEMORY SUBSETS FOR SELECT DATA-SETS IN MEMORY CENTRIC SYSTEM ARCHITECTURES/FABRIC ATTACHED MEMORY
#200PRE-ERASING MEMORY BLOCKS
#201MEMORY CONTROLLER FOR MEMORY WITH MEDIUM GRANULARITY REFRESH COMMANDS
#202MEMORY DEVICE ACTIVE COMMAND TRACKING
#203COMMAND PRIORITIZATION TECHNIQUES FOR REDUCING LATENCY IN A MEMORY SYSTEM
#204QUAD-CHANNEL MEMORY MODULE WITH INTERLEAVED DATA COMMUNICATION
#205DYNAMIC RECOVERY OF CONTROL INFORMATION IN STORAGE SYSTEMS
#206CACHE REFRESH SYSTEM AND PROCESSES
#207MEMORY DEVICE AND REFRESH METHOD THEREOF
#208Ternary Content Addressable Memory System
#209MEMORY IN PACKAGE DEVICES AND ASSOCIATED SYSTEMS AND METHODS
#210MEMORY SYSTEM WITH PROCESSOR IN MEMORY (PIM)
#211MEMORY COMPRESSION WITH IMPROVED LOOKUP TABLE SCHEME
#212Multiple Key Index List Maintenance
#213REPLICATING ENCRYPTED DATA USING MULTIPLE DATA REDUCTION TECHNIQUES
#214PERSISTENT KEY-VALUE STORE AND JOURNALING SYSTEM
#215STORAGE DEVICE FOR MIGRATING DATA STORED IN SUPER MEMORY BLOCK BASED ON PRIORITY AND OPERATING METHOD OF THE STORAGE DEVICE
#216MEMORY SYSTEM WITH MULTIPLE INPUT/OUTPUT INTERFACES
#217MANAGING INITIALIZATION IN MEMORY DEVICES
#218MEMORY PAGE TYPE INDICATIONS FOR DATA INTEGRITY EVALUATIONS
#219METHOD FOR MIGRATING MEMORY DATA, RELATED APPARATUS, AND COMPUTER DEVICE
#220OPTIMIZED OUT-OF-ORDER DATA FETCHING IN A MEMORY SUB-SYSTEM
#221CONFIGURABLE LOW VOLTAGE DETECTION THRESHOLD AT A MEMORY SYSTEM
#222CACHE TECHNIQUES FOR MEMORY SYSTEM READ COMMANDS
#223Data Storage Device and Method for Accommodating Data of a Third-Party System
#224ADDRESS TRANSLATION FOR ACCELERATOR-TRIGGERED MEMORY ACCESS REQUEST
#225ADDRESS TRANSLATION FOR ACCELERATOR-TRIGGERED MEMORY ACCESS REQUESTS
#226FEEDBACK SIGNALLING
#227DEVICE STORAGE OPTIMIZATION
#228COMPUTATIONAL STORAGE SYSTEM SUPPORTING MULTIPLE TOPOLOGIES AND METHOD OF OPERATION
#229COMPUTING DEVICE WITH A MEMORY OPTIMIZED FOR MATRIX CALCULATION
#230OBJECT COPY DRIVER MODULE FOR OBJECT MIGRATION
#231TRIPLE ACTIVATE COMMAND ROW ADDRESS LATCHING
#232CONTROL LOGIC IN A MEMORY DEVICE FOR GENERATING INTERNAL COMMANDS
#233FPGA-BASED MASK MATCHING METHOD AND SYSTEM
#234METHOD FOR CONFIGURING A MICROCONTROLLER AND CORRESPONDING MICROCONTROLLER
#235MEMORY SYSTEM
#236VECTOR PROCESSOR AND OPERATION METHOD THEREOF
#237MEMORY SYSTEM LOGICAL UNIT NUMBER PROCEDURES
#238CONFIGURABLE WRITE PROCESSING SPEEDS AT A MEMORY SYSTEM
#239MEMORY DEVICE AND MEMORY SYSTEM FOR PERFORMING PARTIAL WRITE OPERATION, AND OPERATING METHOD THEREOF
#240Power Gating for Memory Physical Layers
#241LOW LATENCY PARTITION FOR MEMORY SWAP OPERATIONS
#242MEMORY DEVICE AND OPERATING METHOD THEREOF
#243REDUNDANT ARRAY PARITY INFORMATION STORAGE
#244CONTROL DEVICE AND MEMORY SYSTEM
#245MULTI-TILE GRAPHICS PROCESSING UNIT
#246PARALLEL MEMORY ACCESS AND COMPUTATION IN MEMORY DEVICES
#247IN-PLACE SORTING
#248DEMULTIPLEXING STORAGE VOLUME BOUNDARIES WITHIN VIRTUAL STORAGE BLOCK DEVICE
#249METHOD AND SYSTEM FOR DATA SEGREGATION IN STORAGE DEVICES USING LONGEVITY-HINT BASED STORAGE PROTOCOLS
#250SECURE READBACK FROM CONFIGURATION MEMORY
#251ADDRESS OFFSET IN MEMORY
#252SINGLE-LEVEL CELL CACHING NOTIFICATION
#253TECHNIQUE FOR IMPROVING OPLOG FLUSHING
#254MEMORY BANK BUFFERING OF COMMANDS
#255METHODS, DEVICES AND SYSTEMS FOR SERIAL BUS OPERATIONS
#256INTELLIGENT DATA DUPLICATION/BACKUP BASED ON ARTIFICIAL INTELLIGENCE FOR DATA STORAGE DEVICES
#257PROCESSING IN MEMORY
#258DATA PRIORITIZATION FOR BOOT-UP PROCEDURES
#259Stacked Memory Device with Paired Channels
#260GARBAGE COLLECTION BASED ON DATA CHARACTERISTICS
#261MEMORY DEVICES WITH MULTIPLE SETS OF LATENCIES AND METHODS FOR OPERATING THE SAME
#262PERSISTENT MEMORY ACROSS UPDATES
#263SHARED COMMAND BUS ARCHITECTURE FOR MEMORY SYSTEMS
#264APPARATUSES AND METHODS FOR AUTO POWER-DOWN IN SEMICONDUCTOR MEMORY DEVICES
#265TEMPERATURE BASED POWER INDICATION
#266SECURE WRITE PROTECTIONS FOR MEMORY SYSTEMS
#267MEMORY SYSTEM PURGE OPERATIONS WITH INTERLEAVED ACCESS COMMANDS
#268METHOD AND DEVICE FOR SECURING USER DATA ON A DATA STORAGE DEVICE
#269REDUCING READ DISTURBANCE OVERESTIMATION
#270DIGITAL CIRCUIT AND METHOD OF OPERATION IN A DIGITAL CIRCUIT
#271BUFFER MANAGEMENT TECHNIQUES FOR A MEMORY SYSTEM
#272HARDWARE REVOCATION ENGINE FOR TEMPORAL MEMORY SAFETY
#273FAST PROGRAMMING FOR MEMORY SYSTEMS
#274MANAGING MAPPINGS DURING ZONIFICATION
#275MEMORY MODULE AND ELECTRONIC DEVICE
#276RESISTIVE RANDOM ACCESS MEMORY (RRAM) ARCHITECTURE AND METHOD
#277HOST-CONTROLLED BLOCK MAINTENANCE OPERATIONS
#278SYSTEMS AND METHODS FOR STORING A DATAFILE
#279READ REFRESH TECHNIQUES FOR NONVOLATILE MEMORY DEVICES
#280SEMICONDUCTOR MEMORY DEVICE AND MEMORY SYSTEM INCLUDING THE SAME
#281EFFICIENCY AND POWER CONTROL OF TASKS HAVING COMPUTATION BOUND AND MEMORY BOUND PHASES
#282METHOD FOR PROLONGING SERVICE LIFE OF STORAGE DRIVE AND RELATED APPARATUS
#283MEMBRANE: ACCELERATING DATABASE ANALYTICS WITH DRAM-PIM FILTERING
#284CLONING MODE
#285DATA FLUSH FOR FORCE UNIT ACCESS COMMANDS
#286MEMORY SYSTEM, COMPUTER SYSTEM AND DATA INTERACTION METHOD
#287OPTIMIZING MEMORY USAGE IN PHYSICAL MEMORY
#288MEMORY MODULES WITH RANDOM ACCESS MEMORY (RAM) MEMORY CHIPS SUPPORTING DISTINCT, MULTIPLE SINGLE-WORD MEMORY ACCESSES, AND RELATED MEMORY SYSTEMS AND METHODS
#289Connection Modification based on Traffic Pattern
#290MANAGING OPERATIONS PERFORMED USING AN ACCELERATOR IN A COMPUTE EXPRESS LINK (CXL) MEMORY DEVICE
#291LOGICAL-TO-PHYSICAL MAPPING FOR ENHANCED GRANULARITY DATA STORAGE
#292DEFERRED ADAPTIVE COMPRESSION USING COMPUTATIONAL STORAGE FOR ENERGY SAVINGS
#293TECHNOLOGIES FOR MANAGING A FLEXIBLE HOST INTERFACE OF A NETWORK INTERFACE CONTROLLER
#294PROCESSOR ARCHITECTURE
#295Electronic device and method of operating same
#296STORAGE DEVICE FOR ADAPTIVELY DETERMINING SCHEME OF WRITING DATA UNITS, AND OPERATING METHOD THEREOF
#297ADAPTIVE MEMORY STATUS REPORTING
#298STORAGE SYSTEM, ASYNCHRONOUS COPY METHOD, AND ASYNCHRONOUS COPY PROGRAM
#299SEAMLESS DATA TRANSFER BETWEEN STORAGE ENTITIES
#300GENERATING DATA MOVEMENT NETWORKS FOR MACHINE LEARNING MODELS