189469 ⎘
Methods or arrangements for processing data by operating upon the order or content of the data handled; Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices using signed-digit representation
Floating Point to Fixed Point Conversion
#2SIGNAL PROCESSING APPARATUS AND METHOD
#3MEMORY SYSTEM AND OPERATING METHOD OF MEMORY SYSTEM
#4MEMORY SYSTEM AND OPERATING METHOD OF MEMORY SYSTEM
#5OBLIVIOUS CARRY RUNWAY REGISTERS FOR PERFORMING PIECEWISE ADDITIONS
#6Method to compare between a first number and a second number
#7MULTIPLICATION HARDWARE BLOCK WITH ADAPTIVE FIDELITY CONTROL SYSTEM
#8OBLIVIOUS CARRY RUNWAY REGISTERS FOR PERFORMING PIECEWISE ADDITIONS
#9Method and device for quantum division operation with precision
#10Memory system and operating method of memory system
#11QUANTUM CIRCUIT OPTIMIZATION USING WINDOWED QUANTUM ARITHMETIC
#12Measurement based uncomputation for quantum circuit optimization
#13FLOATING POINT FUSED MULTIPLY ADD WITH REDUCED 1'S COMPLEMENT DELAY
#14Surface code computations using Auto-CCZ quantum states
#15FLOATING POINT TO FIXED POINT CONVERSION
#16Oblivious carry runway registers for performing piecewise additions
#17TECHNOLOGY TO REALIZE SIGNED MULTIPLY-ACCUMULATE OPERATION IN THE ANALOG DOMAIN WITH A DIFFERENTIAL SIGNAL PATH AND INTRINSIC PROCESS, VOLTAGE AND TEMPERATURE VARIATION TOLERANCE
#18Methods and Apparatus for Quotient Digit Recoding in a High-Performance Arithmetic Unit
#19APPARATUS AND METHOD WITH MULTI-FORMAT DATA SUPPORT
#20ON-THE-FLY CONVERSION
#21INFORMATION PROCESSING SYSTEM, INFORMATION PROCESSING METHOD, AND STORAGE MEDIUM
#22METHOD FOR IMPLEMENTING DOT PRODUCT OPERATION, ELECTRONIC DEVICE AND STORAGE MEDIUM
#23SIGNED MULTIWORD MULTIPLIER
#24Hierarchical and shared exponent floating point data types
#25Measurement based uncomputation for quantum circuit optimization
#26Data Processing Device Having A Logic Circuit for Calculating a Modified Cross Sum
#27COMPUTING APPARATUS AND METHOD, BOARD CARD, AND COMPUTER READABLE STORAGE MEDIUM
#28Repurposed hexadecimal floating point data path
#29Computing array based on 1T1R device, operation circuits and operating methods thereof
#30CODING OF LASER ANGLES FOR ANGULAR AND AZIMUTHAL MODES IN GEOMETRY-BASED POINT CLOUD COMPRESSION
#31CHIP INCLUDING MULTIPLY-ACCUMULATE MODULE, CONTROL METHOD, ELECTRONIC DEVICE, AND STORAGE MEDIUM
#32Measurement based uncomputation for quantum circuit optimization
#33Iterative binary division with carry prediction
#34PROCESSING RADAR SIGNALS
#35Floating point to fixed point conversion
#36Circuit and method for binary flag determination
#37Repurposed hexadecimal floating point data path
#38Neural processing element with single instruction multiple data (SIMD) compute lanes
#39Measurement based uncomputation for quantum circuit optimization
#40Surface code computations using auto-CCZ quantum states
#41Quantum circuit optimization using windowed quantum arithmetic
#42Oblivious carry runway registers for performing piecewise additions
#43Apparatus and method for rounding
#44Conversion circuitry
#45Floating point to fixed point conversion
#46Systems and methods for operating secure elliptic curve cryptosystems
#47Negative zero control in instruction execution
#48In-memory full adder
#49Floating point to fixed point conversion
#50Dynamic variable precision computation
#51System and method for generating random numbers
#52Secure computation system, secure computation method, secure computation apparatus, distribution information generation apparatus, and methods and programs therefor
#53Method for calculating a neuron layer of a multi-layer perceptron model with simplified activation function
#54Computer architecture for emulating digital delay nodes in a correlithm object processing system
#55Systems, apparatuses, and methods for multiplication, negation, and accumulation of vector packed signed values
#56Unified multifunction circuitry
#57High radix subset code multiplier architecture
#58Floating point to fixed point conversion
#59Four steps associative full adder
#60Bit-serial multiplier for FPGA applications
#61High radix 16 square root estimate
#62Radix 16 PD table implemented with a radix 4 PD table
#63Dynamic variable precision computation
#64Systems and methods for operating secure elliptic curve cryptosystems
#65Constant fraction integer multiplication
#66Data compression device and method using floating point format
#67Methods and apparatuses for performing multiplication
#68HIGH RADIX DIGITAL MULTIPLIER
#69Encryption processing apparatus, encryption processing method, and computer program
#70Computer technical solution of mixed q-nary and carry line digital engineering method
#71Logical calculation circuit, logical calculation device, and logical calculation method
#72Division and square root arithmetic unit
#73Method and system for digital signal processing, program product therefor
#74Semiconductor circuit for arithmetic processing and arithmetic processing method
#75Method and circuits for early detection of a full queue
#76Decimal multiplication using digit recoding
#77SAT solver based on interpretation and truth table analysis