APPROXIMATE ADDITION FOR ARTIFICIAL INTELLIGENCE/MACHINE LEARNING

TENSOR PROCESSING CIRCUITRY

ON-CHIP NON-ZERO VALUE UNPACKING AND DISTRIBUTION

QUANTIZING LOW-PRECISION NEURAL NETWORKS FOR LOSSLESS ACCUMULATION

MODULO ARITHMETIC DEVICE, MEMORY SYSTEM, AND METHOD

FLOATING POINT OPERATIONS FOR A NEURAL NETWORK

Pipelined Floating-Point Adder with Support for Forwarding Un-Normalized Mantissa Results for Dependent Instructions

SYSTEM, METHOD, AND PROGRAM PRODUCT FOR HIGH DIMENSIONAL COMPUTING

Design Method for Fixed-Point and Floating-Point Adder

MANTISSA ALIGNMENT WITH ROUNDING

IMPROVED FLOATING-POINT ADDER WITH IN-PATH SUBNORMAL HANDLING

EXPONENTIAL FUNCTION CALCULATOR FOR CALCULATING EXPONENTIAL FUNCTIONS INVOLVING DECIMALS AND METHOD OF OPERATING THE SAME

PERFORMING FLOATING-POINT OPERATIONS USING AN EXPANDED-RANGE FLOATING-POINT FORMAT IN PROCESSOR DEVICES

Floating Point Adder

SYSTEM, CIRCUIT AND METHOD FOR DATA PROCESSING

FLOATING-POINT LOGARITHMIC NUMBER SYSTEM SCALING SYSTEM FOR MACHINE LEARNING

FLOATING-POINT LOGARITHMIC NUMBER SYSTEM SCALING SYSTEM FOR MACHINE LEARNING

FLOATING-POINT LOGARITHMIC NUMBER SYSTEM SCALING SYSTEM FOR MACHINE LEARNING

FLOATING-POINT LOGARITHMIC NUMBER SYSTEM SCALING SYSTEM FOR MACHINE LEARNING

Apparatus and Method for Processing Floating-Point Numbers

FLOATING-POINT COMPUTING-IN-MEMORY DEVICE, EXPONENT COMPUTING MEMORY MODULE AND MANTISSA COMPUTING MEMORY MODULE

HARDWARE ACCELERATION CIRCUIT, DATA PROCESSING ACCELERATION METHOD, CHIP, AND ACCELERATOR

BINARY FLOATING-POINT IN-MEMORY MULTIPLICATION DEVICE

MULTIPLE OPERAND FLOATING POINT ADDER WITH CORRECT ROUNDING

FLOATING-POINT DECOMPOSITION CIRCUITRY WITH DYNAMIC PRECISION

SYSTEMS, METHODS, AND APPARATUSES FOR TILE MATRIX MULTIPLICATION AND ACCUMULATION

SYSTEMS, METHODS, AND APPARATUSES FOR TILE TRANSPOSE

ACCELERATOR CONFIGURED TO PERFORM ACCUMULATION ON DATA HAVING FLOATING POINT TYPE AND OPERATION METHOD THEREOF

DIRECT FIXED POINT TO FIXED POINT DATA CONVERSION APPROXIMATING FLOATING POINT PRECISION IN HARDWARE ACCELERATOR

SYSTEM EMULATION OF A FLOATING-POINT DOT PRODUCT OPERATION

METHOD AND APPARATUS FOR FLOATING POINT ARITHMETIC

DUAL/QUAD-FRACTURABLE DIGITAL SIGNAL PROCESSING BLOCK FOR PROGRAMMABLE GATE ARCHITECTURES

SUMMATION AND FLOATING POINT CONVERSION OF TENSOR RESULTS

VECTOR PACKED MATRIX MULTIPLICATION AND ACCUMULATION PROCESSORS, METHODS, SYSTEMS, AND INSTRUCTIONS

SYSTEMS, METHODS, AND APPARATUSES FOR TILE LOAD

Dot Product Pipeline for Floating Point and Shared Exponent Floating Point Data Types

ADDER CIRCUITS FOR FLOATING-POINT OPERATION

MICROPROCESSOR WITH FLOATING-POINT CORDIC INSTRUCTIONS

SYSTEMS, METHODS, AND APPPARATUS FOR MATRIX MOVE

SYSTEMS, METHODS, AND APPARATUSES FOR TILE STORE

SYSTEM AND METHOD TO ACCELERATE MICROPROCESSOR OPERATIONS

Neural network accelerator

Multi-Modal Systolic Array For Matrix Multiplication

COMPUTER PROCESSOR FOR HIGHER PRECISION COMPUTATIONS USING A MIXED-PRECISION DECOMPOSITION OF OPERATIONS

SYSTEMS, METHODS, AND APPARATUSES FOR MATRIX OPERATIONS

OPERATION UNIT, PROCESSING DEVICE, AND OPERATION METHOD OF PROCESSING DEVICE

COMPUTER SYSTEM FOR SIMULATING PHYSICAL PROCESSES USING SURFACE ALGORITHM

COMPUTATION OF EXACT FLOATING POINT ADDITION

ARTIFICIAL INTELLIGENCE ACCELERATORS

ARTIFICIAL INTELLIGENCE ACCELERATORS

SYSTEMS, METHODS, AND APPARATUSES FOR MATRIX ADD, SUBTRACT, AND MULTIPLY

SYSTEM AND METHOD TO ACCELERATE MICROPROCESSOR OPERATIONS

FUSED MULTIPLY-ADD LOGIC TO PROCESS INPUT OPERANDS INCLUDING FLOATING-POINT VALUES AND INTEGER VALUES

Apparatus and method for processing floating-point numbers

FLOATING-POINT DECOMPOSITION CIRCUITRY WITH DYNAMIC PRECISION

MULTIPLIER BLOCK FOR BLOCK FLOATING POINT AND FLOATING POINT VALUES

Systems, methods, and apparatus for tile configuration

Multiply-Accumulate with Configurable Conversion Between Normalized and Non-Normalized Floating-Point Formats

Floating point adder

SYSTEMS AND METHODS FOR IDENTIFYING SCALING FACTORS FOR DEEP NEURAL NETWORKS

APPARATUS AND METHOD FOR PERFORMING ACCUMULATION OPERATIONS

FLOATING-POINT MULTIPLY-ACCUMULATE UNIT FACILITATING VARIABLE DATA PRECISIONS

CHAINED MULTIPLY ACCUMULATE USING AN UNROUNDED PRODUCT

FLOATING-POINT ADDER WITH IN-PATH SUBNORMAL HANDLING

Floating Point Number Calculation Circuit and Floating Point Number Calculation Method

DSP IMPLEMENTATION OF NONLINEAR DIFFERENTIATORS

ELECTRONIC DEVICE AND CONTROL METHOD THEREFOR

Systems, methods, and apparatuses for tile load, multiplication and accumulation

ACCUMULATION DEVICE AND METHOD, AND READABLE STORAGE MEDIUM

Apparatus and Method for Processing Floating-Point Numbers

Computer processor for higher precision computations using a mixed-precision decomposition of operations

FLOATING-POINT COMPUTATION APPARATUS AND METHOD USING COMPUTING-IN-MEMORY

ARITHMETIC PROCESSING APPARATUS AND ARITHMETIC PROCESSING METHOD

METHOD AND APPARATUS WITH DATA COMPRESSION

Floating point adder

Neural network accelerator

PERFORMING A FLOATING-POINT MULTIPLY-ADD OPERATION IN A COMPUTER IMPLEMENTED ENVIRONMENT

FLOATING-POINT LOGARITHMIC NUMBER SYSTEM SCALING SYSTEM FOR MACHINE LEARNING

ELECTRONIC CONTROL DEVICE AND STEERING SYSTEM

SINGLE-CYCLE KULISCH ACCUMULATOR

EMULATION OF FLOATING POINT CALCULATION

METHOD AND APPARATUS WITH CALCULATION

Method of determining the center of loading of a rolling element

NEURAL NETWORK FACILITATING FIXED-POINT EMULATION OF FLOATING-POINT COMPUTATION

OPERATING METHOD OF FLOATING POINT OPERATION CIRCUIT AND INTEGRATED CIRCUIT INCLUDING FLOATING POINT OPERATION CIRCUIT

Power saving floating point Multiplier-Accumulator with a high precision accumulation detection mode

Acceleration of elliptic curve-based isogeny cryptosystems

DATATYPE CONVERSION TECHNIQUE

Numeric Operations on Logarithmically Encoded Data Values

COMPUTING APPARATUS AND METHOD FOR NEURAL NETWORK OPERATION, INTEGRATED CIRCUIT, AND DEVICE

FLOATING-POINT NUMBER MULTIPLICATION COMPUTATION METHOD AND APPARATUS, AND ARITHMETIC LOGIC UNIT

Peripheral tooldual/quad-fracturable digital signal processing block for programmable gate architectures

SYSTEMS, METHODS, AND APPARATUSES FOR ZEROING A MATRIX

Systems, methods, and apparatuses for tile store

Systems, methods, and apparatuses for tile store

DATA PROCESSING METHOD FOR PROCESSING UNIT, ELECTRONIC DEVICE AND COMPUTER READABLE STORAGE MEDIUM

Systems, methods, and apparatus for matrix move

Efficient dual-path floating-point arithmetic operators

SYSTEM AND METHOD FOR HANDLING FLOATING POINT HARDWARE EXCEPTION

SYSTEM AND METHOD FOR HANDLING FLOATING POINT HARDWARE EXCEPTION

SYSTEM AND METHOD FOR HANDLING FLOATING POINT HARDWARE EXCEPTION

SYSTEM AND METHOD FOR HANDLING FLOATING POINT HARDWARE EXCEPTION

AI CALCULATION CIRCUIT

DATA-TYPE-AWARE CLOCK-GATING

Systems, methods, and apparatuses for matrix add, subtract, and multiply

Apparatus and method for processing floating-point numbers

Processor for fine-grain sparse integer and floating-point operations

Processor for fine-grain sparse integer and floating-point operations

METHOD AND DEVICE FOR GENERATING A PSEUDO-RANDOM NUMBER SEQUENCE

METHOD FOR MULTIPLY-ADD OPERATIONS FOR NEURAL NETWORK

FLOATING POINT MULTIPLY HARDWARE USING DECOMPOSED COMPONENT NUMBERS

ARITHMETIC CIRCUIT

Systems, methods, and apparatuses for dot production operations

Multiple-input floating-point processing with mantissa bit extension

Systems, methods, and apparatus for tile configuration

Acceleration circuitry

Programmable Device Implementing Fixed and Floating Point Functionality in a Mixed Architecture

Integrated circuits with machine learning extensions

Circular accumulator for floating point addition

Computer system for simulating physical processes using surface algorithm

NEURAL NETWORK APPARATUS PERFORMING FLOATING-POINT OPERATION AND OPERATING METHOD OF THE SAME

Physical unclonable function based true random number generator, method for generating true random numbers, and associated electronic device

Modular operation circuit adopting iterative calculations

LOGARITHM CALCULATION METHOD AND LOGARITHM CALCULATION CIRCUIT

Systems, methods, and apparatuses for tile matrix multiplication and accumulation

Apparatus and method for double-precision ray traversal in a ray tracing pipeline

Information processing apparatus, control methods thereof, and recording medium for neural network learning models utilizing data minimization

Methods to compress range doppler map (RDM) values from floating point to decibels (dB)

Hardware for floating-point arithmetic in multiple formats

Information processing apparatus, program, and information processing method configured to handle a high-precision computer number

NEURAL ELECTRONIC CIRCUIT

Optimization apparatus and optimization method for annealing circuits

System and method for handling floating point hardware exception

Computational units for element approximation

Arithmetic apparatus, operating method thereof, and neural network processor

Logarithmic addition-accumulator circuitry, processing pipeline including same, and methods of operation

Systems, methods, and apparatuses for dot production operations

Floating point multiply hardware using decomposed component numbers

Analog arithmetic unit

Arithmetic circuit

PARTIAL PRODUCT FLOATING-POINT MULTIPLICATION CIRCUITRY OPERAND SUMMATION

Apparatus and method for processing floating-point numbers

Neural network learning apparatus for deep learning and method thereof

Apparatus and method for processing floating-point numbers

Low-power adder circuit

Data processing circuit for neural network

Neural network accelerator

DATA CONVERSION METHOD AND APPARATUS

MULTI-INPUT FLOATING-POINT ADDER

Alignment shifting and incrementing to determine a rounded result of adding first and second floating-point operands

Apparatus and method of fast floating-point adder tree for neural networks

Acceleration circuitry

Systems, methods, and apparatuses for tile load

Systems, methods, and apparatuses for tile broadcast

Systems, methods, and apparatus for tile configuration

Systems, methods, and apparatuses for zeroing a matrix

Systems, methods, and apparatuses for tile matrix multiplication and accumulation

Systems, methods, and apparatuses for tile store

Systems, methods, and apparatus for matrix move

Method and system for efficient floating-point compression

Floating-point decomposition circuitry with dynamic precision

NEURAL NETWORK PROCESSING USING MIXED-PRECISION DATA REPRESENTATION

ARITHMETIC PROCESSING DEVICE AND METHOD OF CONTROLLING ARITHMETIC PROCESSING DEVICE

Variable precision floating-point multiplier

Low-power adder circuit

Systems, methods, and apparatuses for matrix operations

Programmable device implementing fixed and floating point functionality in a mixed architecture

ARITHMETIC PROCESSING APPARATUS, CONTROL METHOD, AND RECORDING MEDIUM

Voltage subtracter and operation method for subtracting voltages

Systems, methods, and apparatuses for matrix add, subtract, and multiply

Systems, methods, and apparatuses for tile transpose

Systems, methods, and apparatuses for tile diagonal

Variable precision floating-point multiplier

Floating-point dot-product hardware with wide multiply-adder tree for machine learning accelerators

Fixed-point and floating-point arithmetic operator circuits in specialized processing blocks

Processor, information processing apparatus and operation method for processor

Scatter reduction instruction

Apparatus and method for adding packed data elements with rotation and halving

System and method of floating point multiply operation processing

Quantum circuit libraries for floating-point arithmetic

Integrated circuits with machine learning extensions

Floating-point number operation circuit and method

Apparatus and method for subtracting significand values of floating-point operands

Floating-point adder circuitry with subnormal support

Reduced floating-point precision arithmetic circuitry

Fixed-point training method for deep neural networks based on static fixed-point conversion scheme

Reduction operation mapping systems and methods

HIGH-SPEED, LOW-LATENCY, AND HIGH ACCURACY ACCUMULATION CIRCUITS OF FLOATING-POINT NUMBERS

Methods and apparatuses for calculating FP (full precision) and PP (partial precision) values

Fixed-point and floating-point arithmetic operator circuits in specialized processing blocks

Distributed double-precision floating-point addition

Handling floating point operations

Variable precision floating-point multiplier

Apparatus and method for estimating a shift amount when performing floating-point subtraction

Secret calculation system, secret calculation apparatus, and secret calculation method

Memory load and arithmetic load unit (ALU) fusing

Accuracy-conserving floating-point value aggregation

Arithmetic operation input-output equality detection

Apparatus and method for processing floating point values

Closepath fast incremented sum in a three-path fused multiply-add design

FAST STICKY GENERATION IN A FAR PATH OF A FLOATING POINT ADDER

Fused Multiply-Add that Accepts Sources at a First Precision and Generates Results at a Second Precision

Decimal and binary floating point rounding

Processing denormal numbers in FMA hardware

High performance floating-point adder with full in-line denormal/subnormal support

Apparatus for calculating and retaining a bound on error during floating point operations and methods thereof

Floating point addition with early shifting

Variable precision floating-point multiplier

THREE SOURCE OPERAND FLOATING-POINT ADDITION INSTRUCTION WITH OPERAND NEGATION BITS AND INTERMEDIATE AND FINAL RESULT ROUNDING

Arithmetic operation input-output equality detection

Fixed-point and floating-point arithmetic operator circuits in specialized processing blocks

SEMICONDUCTOR DEVICE

Binary fused multiply-add floating-point calculations

Binary fused multiply-add floating-point calculations

Data compression device and method using floating point format

Scatter reduction instruction

Fused multiply-add (FMA) low functional unit

Floating point (FP) add low instructions functional unit

Instruction and logic for detecting the floating point cancellation effect

Decimal and binary floating point rounding

Double rounded combined floating-point multiply and add

Handling instructions that require adding results of a plurality of multiplications

Floating point computation apparatus and method

Reducing power consumption in a fused multiply-add (FMA) unit of a processor

Accumulation of floating-point values

Floating-point adder circuitry

Floating-point adder, semiconductor device, and control method for floating-point adder

Associative summing for high performance computing

Accuracy-conserving floating-point value aggregation

Accuracy-conserving floating-point value aggregation

NON-RECURSIVE CASCADING REDUCTION

Apparatus and method for performing reciprocal estimation operation

Decimal and binary floating point arithmetic calculations

Decimal and binary floating point rounding

Standalone floating-point conversion unit

Apparatus and method for converting floating-point operand into a value having a different format

Double rounded combined floating-point multiply and add

Calculation control indicator cache

Calculation control indicator cache

Subdivision of a fused compound arithmetic operation

Split-path heuristic for performing a fused FMA operation

Standard format intermediate result

Temporally split fused multiply-accumulate operation

Non-atomic split-path fused multiply-accumulate

Underflow/overflow detection prior to normalization

Underflow/overflow detection prior to normalization

Floating-point calculation apparatus, program, and calculation apparatus

Floating point multiply accumulator multi-precision mantissa aligner

Binary array with LSB dithering in a closed loop system

Three source operand floating-point addition instruction with operand negation bits and intermediate and final result rounding

Multi-input and binary reproducible, high bandwidth floating point adder in a collective network

High performance floating-point adder with full in-line denormal/subnormal support

Floating-point adder circuitry

Modal interval processor

Fused multiply add operations using bit masks

Fused multiply add pipeline

Adder

Leading change anticipator logic

Floating-point multiply-add unit using cascade design

Floating-point error detection and correction

Dual-path fused floating-point add-subtract

ARITHMETIC CIRCUIT FOR CALCULATING CORRECTION VALUE

MULTIPLYING DEVICE AND MULTIPLYING METHOD

DIVIDING DEVICE AND DIVIDING METHOD

Double rounded combined floating-point multiply and add

FPGA-based high-speed low-latency floating point accumulator and implementation method therefor

Method and apparatus to perform floating point operations

FLOATING-POINT ADDER WITH OPERAND SHIFTING BASED ON A PREDICTED EXPONENT DIFFERENCE

Operand-optimized asynchronous floating-point units and method of use thereof

Circular floating-point number generator and a circular floating-point number adder

Floating point multiply accumulator multi-precision mantissa aligner

Floating-point adder

Adder including transistor having oxide semiconductor layer

Floating-Point Addition Acceleration

Apparatus and method for performing floating point addition

Method and apparatus for calculating the number of leading zero bits of a binary operation

METHOD AND SYSTEM FOR FLOATING POINT ACCELERATION ON FIXED POINT DIGITAL SIGNAL PROCESSORS

Leading sign digit predictor for floating point near subtractor

Modal interval processor

Computing half instructions of floating point numbers without early adjustment of the source operands

Multi-input and binary reproducible, high bandwidth floating point adder in a collective network

Floating point collect and operate

Decimal floating-point adder with leading zero anticipation

Mechanism for fast detection of overshift in a floating point unit of a processing device

Trigonometric summation vector execution unit

Floating-point fused add-subtract unit

Subnormal number handling in floating point adder without detection of subnormal numbers before exponent subtraction

Floating-point addition acceleration

Identifying decimal floating point addition operations that do not require alignment, normalization or rounding

Three-term input floating-point adder-subtractor

Floating Point Addition

Method and apparatus for accumulating floating point values

Multi-stage floating-point accumulator

Modal interval processor

Method and a circuit using an associative calculator for calculating a sequence of non-associative operations

Processing method and computer system for summation of floating point data

Method and system for high-speed floating-point operations and related computer program product

Apparatus and method for implementing floating point additive and shift operations

Data processing apparatus and method for performing floating point addition

Data processing apparatus and method for performing floating point addition