G06F9/26 - CPC Classification Index

ClassID:

189676 ⎘

G06F9/26 - CPC Classification

Classification description:

Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs; Microcontrol or microprogram arrangements Address formation of the next micro-instruction ; Microprogram storage or retrieval arrangements

Sub-classes:

G06F9/261 » {Micro-instruction address formation} 12
G06F9/262 » {Arrangements for next micro-instruction selection} 10

Recent Application in this class:

20200334086

2020-10-22

Processing system and heterogeneous processor acceleration method

20190163471

2019-05-30

System and method for processing a load micro-operation by allocating an address generation scheduler queue entry without allocating a load queue entry

20190065205

2019-02-28

VARIABLE LENGTH INSTRUCTION PROCESSOR SYSTEM AND METHOD

20170177388

2017-06-22

Processor management

20160202985

2016-07-14

Variable length instruction processor system and method

20160026498

2016-01-28

Power management system, system-on-chip including the same and mobile device including the same

20140297993

2014-10-02

Uncore microcode ROM

20140207989

2014-07-24

Access control to a jointly exclusively usable transmission medium

20120229482

2012-09-13

GRAPHICS VERTEX PROCESSING DEVICE, IMAGE PROCESSING DEVICE, GRAPHICS VERTEX PROCESSING METHOD AND RECORDING MEDIUM

#10

20120166766

2012-06-28

Enhanced microcode address stack pointer manipulation

#11

20120079248

2012-03-29

Aliased Parameter Passing Between Microcode Callers and Microcode Subroutines

#12

20120079237

2012-03-29

Saving Values Corresponding to Parameters Passed Between Microcode Callers and Microcode Subroutines from Microcode Alias Locations to a Destination Storage Location

#13

20110289299

2011-11-24

System and method to evaluate a data value as an instruction

#14

20110161575

2011-06-30

Microcode refactoring and caching

#15

20110040953

2011-02-17

Microprocessor with microtranslator and tail microcode instruction for fast execution of complex macroinstructions having both memory and register forms

#16