189876 ⎘
Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs; Multiprogramming arrangements; Saving or restoring of program or task context Program control block organisation
ARTIFICIAL INTELLIGENCE-POWERED PERSONAL COMPUTER MANAGEMENT SYSTEM AND METHODS
#2PROCESSING PIPELINE WITH ZERO LOOP OVERHEAD
#3DERIVING COMPONENT STATISTICS FOR A STREAM ENABLED APPLICATION
#4INFORMATION PROCESSING METHOD, INFORMATION PROCESSING APPARATUS, AND PROGRAM FOR DETERMINING FUNCTION/OPERATION OF APPLIANCE
#5TASK SCHEDULING METHOD AND SEMICONDUCTOR PROCESS DEVICE
#6DECENTRALIZED PROCESS MANAGEMENT USING DISTRIBUTED LEDGERS
#7METHOD AND APPARATUS TO MIGRATE MORE SENSITIVE WORKLOADS TO FASTER CHIPLETS
#8TRANSACTION PERFORMANCE BY PARALLEL WAL IO AND PARALLEL WAKING UP TRANSACTION COMMIT WAITERS
#9PROCESSING PIPELINE WITH ZERO LOOP OVERHEAD
#10High-speed synchronization apparatus and method based on blockchain unit file
#11ATOMIC DETERMINISTIC NEXT ACTION
#12Deriving component statistics for a stream enabled application
#13DYNAMIC HETEROGENEOUS TASK PROCESSING
#14System on Chip Isolation Control Architecture
#15GENERALIZED MACHINE LEARNING PIPELINE
#16Initialization of parameters for machine-learned transformer neural network architectures
#17Pipeline manager
#18Cooperative input/output of address modes for interoperating programs
#19Visual conformance checking of processes
#20ELECTRONIC SYSTEM FOR AUTHORIZATION AND USE OF CROSS-LINKED RESOURCE INSTRUMENTS
#21Processing pipeline with zero loop overhead
#22Shared data fabric processing client reset system and method
#23Deriving component statistics for a stream enabled application
#24Method and apparatus of providing a function as a service (faas) deployment of an application
#25Devices and methods for parallelized recursive block decoding
#26Controller area network apparatus
#27Block processing method, node, and system
#28Initialization of parameters for machine-learned transformer neural network architectures
#29Characterizing operation of software applications having large number of components
#30Extended asynchronous data mover functions compatibility indication
#31Rule engine optimization via parallel execution
#32Iterative learning processes for executing code of self-optimizing computation graphs based on execution policies
#33VISUAL CONFORMANCE CHECKING OF PROCESSES
#34Automated concurrency and repetition with minimal syntax
#35Pre-instruction scheduling rematerialization for register pressure reduction
#36Method and process of creating qualifiable parameter data item (PDI) to define the function of a power system controller
#37Apparatus for automated loop checking
#38APPARATUS AND SYSTEM FOR EXECUTION OF NEURAL NETWORK
#39Method and apparatus for execution of neural network
#40Blockchain read/write data processing method, apparatus, and server
#41Autonomous job queueing system for hardware accelerators
#42COMPUTE TASK STATE ENCAPSULATION
#43Adaptive program task scheduling to blocking and non-blocking queues
#44Flow convergence during hardware-software design for heterogeneous and programmable devices
#45INFORMATION PROCESSING APPARATUS EQUIPPED WITH STORAGE DEVICE, CONTROL METHOD THEREFOR, AND STORAGE MEDIUM
#46Extended asynchronous data mover functions compatibility indication
#47Decentralized process management using distributed ledgers
#48INFORMATION PROCESSING APPARATUS, INFORMATION PROCESSING METHOD, AND STORAGE MEDIUM
#49Architecture for simulation clock-based simulation of distributed systems
#50Task execution with non-blocking calls
#51Deriving component statistics for a stream enabled application
#52Partial order procedure planning device, partial order procedure planning method and partial order procedure planning program
#53Artificial intelligence chip and instruction execution method for artificial intelligence chip
#54Method and apparatus for executing instructions including a blocking instruction generated in response to determining that there is data dependence between instructions
#55Context switches with processor performance states
#56Information processing device and system capable of preventing loss of user data
#57Test-assisted application programming interface (API) learning
#58Information processing device and system capable of preventing loss of user data
#59Method for reducing interrupt latency in embedded systems
#60Data defined infrastructure
#61Data defined infrastructure
#62Analyzing device management system
#63Deriving component statistics for a stream enabled application
#64Maintenance of local and global lists of task control blocks in a processor-specific manner for allocation to tasks
#65Thread context preservation in a multithreading computer system
#66Thread context preservation in a multithreading computer system
#67Selectable graphics controllers to display output
#68Adjustment of the number of task control blocks allocated for discard scans
#69Deriving component statistics for a stream enabled application
#70Dual host embedded shared device controller
#71Adjustment of the number of task control blocks allocated for discard scans
#72Adjustment of the number of task control blocks allocated for discard scans
#73Method, apparatus, and computer program product for fast context switching of application specific processors
#74Virtual machine control method and virtual machine system using prefetch information
#75Compute task state encapsulation
#76Methods and apparatus for handling switching among threads within a multithread processor
#77System and method for annotation-driven function inlining
#78Hardware multithreading systems and methods
#79Virtual machine switching control by prefetching information out of and updating a set of processor control information based on a bitmap having update status
#80Context switching and synchronization
#81Multi-threaded parallel processor methods and apparatus
#82State as a first-class citizen of an imperative language
#83Deterministic serialization in a transactional memory system based on thread creation order
#84Context switch data prefetching in multithreaded computer
#85Deriving component statistics for a stream enabled application
#86Context switching and synchronization
#87CONTEXT SWITCH DATA PREFETCHING IN MULTITHREADED COMPUTER
#88Multi-threaded parallel processor methods and apparatus
#89Context switch data prefetching in multithreaded computer
#90Methods and apparatus for handling switching among threads within a multithread processor
#91Providing a backing store in user-level memory
#92Processor with register dirty bit tracking for efficient context switch
#93Hardware multithreading systems with state registers having thread profiling data
#94System and method for managing states and user context over stateless protocols
#95Intelligent memory device with variable size task architecture
#96Context switch data prefetching in multithreaded computer
#97Method and system for minimizing thread switching overheads and memory usage in multithreaded processing using floating threads
#98State as a first-class citizen of an imperative language
#99Scale-out distributed erasure coding
#100Data defined infrastructure