199529 ⎘
Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using ferroelectric storage elements
CIRCUIT DESIGN AND LAYOUT WITH HIGH EMBEDDED MEMORY DENSITY
#2FERROELECTRIC FIELD-EFFECT TRANSISTOR (FeFET) MEMORY
#3MEMORY DEVICE
#4MANUFACTURING METHOD OF CONDUCTIVE PROBE
#5FERROELECTRIC MEMORY AND DATA READING METHOD AND DATA WRITING METHOD THEREFOR, AND ELECTRONIC APPARATUS
#6DRIVE STRENGTH CALIBRATION FOR MULTI-LEVEL SIGNALING
#7OPERATION METHOD FOR THREE-DIMENSIONAL FLASH MEMORY INCLUDING FERROELECTRIC-BASED DATA STORAGE PATTERN AND BACK GATE
#8THREE-DIMENSIONAL MEMORY DEVICES
#9Ferroelectric storage apparatus and manufacturing method of conductive probe
#10DYNAMIC ALLOCATION OF A CAPACITIVE COMPONENT IN A MEMORY DEVICE
#11CIRCUIT DESIGN AND LAYOUT WITH HIGH EMBEDDED MEMORY DENSITY
#12FERROELECTRIC NANOPARTICLE CAPACITOR FOR NON-BINARY LOGICS AND METHOD OF OPERATION
#13FERROELECTRIC FIELD-EFFECT TRANSISTOR (FeFET) MEMORY
#14Drive strength calibration for multi-level signaling
#15Ferroelectric recording medium and ferroelectric storage apparatus
#16Multiferroic memory with piezoelectric layers and related methods
#17SEMICONDUCTOR MEMORY DEVICE
#18RESISTANCE NETWORK HAVING FOUR CONTACTS PER MEMORY CELL
#19Circuit design and layout with high embedded memory density
#20Content addressable memory device and operating method thereof
#21Non-volatile memory cell with multiple ferroelectric memory elements (FMEs)
#22Memory device based on ferroelectric capacitor
#23Drive strength calibration for multi-level signaling
#24Three-dimensional memory device
#25Ferroelectric field-effect transistor (FeFET) memory
#26Circuit design and layout with high embedded memory density
#27Electronic device and method for fabricating the same
#28Ferroelectric recording medium and ferroelectric storage apparatus
#29Time-based access of a memory cell
#30Multi-level ferroelectric field-effect transistor devices
#31Systems and methods for 1.5 bits per cell charge distribution
#32Ferroelectric material-based three-dimensional flash memory, and manufacture thereof
#33Dynamic allocation of a capacitive component in a memory device
#34Ferroelectric field-effect transistor (FeFET) memory
#35Time-based access of a memory cell
#36Method for manufacturing a three-dimensional memory
#37Multi-level storage in ferroelectric memory
#38Detecting location within a network
#39Memory device including mixed non-volatile memory cell types
#40Current separation for memory sensing
#41Memory cells and arrays of memory cells
#42Techniques and devices for canceling memory cell variations
#43Non-volatile multi-level cell memory using a ferroelectric superlattice and related systems
#44Dynamic allocation of a capacitive component in a memory device
#45Semiconductor memory device and erase verify operation
#46Charge sharing between memory cell plates
#47Half density ferroelectric memory and operation
#48Time-based access of a memory cell
#49Method and system for writing to and reading from a memory device
#50Cell bottom node reset in a memory array
#51Memory cells and arrays of memory cells
#52Detecting location within a network
#53Dynamic allocation of a capacitive component in a memory device
#54Multi-level storage in ferroelectric memory
#55Memory device with a charge transfer device
#56Sensing techniques using a moving reference
#57Memory device including mixed non-volatile memory cell types
#58Time-based access of a memory cell
#59Semiconductor memory device and erase verify operation
#60Redundancy array column decoder for memory
#61BEOL cross-bar array ferroelectric synapse units for domain wall movement
#62Pulsed integrator and memory techniques for determining a state of a memory cell
#63Time-based access of a memory cell
#64Apparatuses and methods including ferroelectric memory and for accessing ferroelectric memory
#65Multi-level storage in ferroelectric memory
#66Charge sharing between memory cell plates
#67Circuitry for one-transistor synapse cell and operation method of the same
#68Virtual ground sensing circuitry and related devices, systems, and methods for crosspoint ferroelectric memory
#69Techniques and devices for canceling memory cell variations
#70Virtual ground sensing circuitry and related devices, systems, and methods for crosspoint ferroelectric memory
#71Half density ferroelectric memory and operation
#72Cell bottom node reset in memory array
#73Detecting location within a network
#74Current separation for memory sensing
#75Compensating for memory input capacitance
#76Semiconductor storage device
#77Current separation for memory sensing
#78Pulsed integrator and memory techniques
#79Writing to cross-point non-volatile memory
#80Charge sharing between memory cell plates using a conductive path
#81Devices and apparatuses including asymmetric ferroelectric materials, and related methods
#82Virtual ground sensing circuitry and related devices, systems, and methods for crosspoint ferroelectric memory
#83Virtual ground sensing circuitry and related devices, systems, and methods for crosspoint ferroelectric memory
#84Memory device including mixed non-volatile memory cell types
#85Time-based access of a memory cell
#86Memory cells and arrays of memory cells
#87Memory device
#88Cell bottom node reset in a memory array
#89Nonvolatile memory device including ferroelectric memory element and resistive memory element, and method of operating nonvolatile memory device
#90Apparatuses and methods including ferroelectric memory and for accessing ferroelectric memory
#91Ferroelectric memory devices
#92Time-based access of a memory cell
#93Multiple plate line architecture for multideck memory array
#94Memory device including mixed non-volatile memory cell types
#95Writing to cross-point non-volatile memory
#96Memory cells and semiconductor devices including ferroelectric materials
#97Multi-level storage in ferroelectric memory
#98Nonvolatile memory device having ferroelectric memory element and resistive memory element and method of writing signal in nonvolatile memory device having the same
#99Data holding device, nonvolatile data holding device, and data reading method
#100Apparatuses and methods including ferroelectric memory and for accessing ferroelectric memory
#101Writing to cross-point non-volatile memory
#102Multi-level storage in ferroelectric memory
#103Virtual ground sensing circuitry and related devices, systems, and methods for crosspoint ferroelectric memory
#104Virtual ground sensing circuitry and related devices, systems, and methods for crosspoint ferroelectric memory
#105Charge sharing between memory cell plates using a conductive path
#106Charge sharing between memory cell plates using a conductive path
#107Application of antiferroelectric like materials in non-volatile memory devices
#108Non-volatile ferroelectric memory cells with multilevel operation
#109Multi-bit ferroelectric memory device and methods of forming the same
#110Circuitry for ferroelectric FET-based dynamic random access memory and non-volatile memory
#111Methods of operating ferroelectric memory cells, and related ferroelectric memory cells and capacitors
#112CMOS analog memories utilizing ferroelectric capacitors
#113Virtual ground sensing circuitry and related devices, systems, and methods for crosspoint ferroelectric memory
#114Multi-level versatile memory
#115Resistive memory device, resistive memory system, and method of operating the resistive memory system
#116Multi-bit ferroelectric memory device and methods of forming the same
#117Methods of producing and controlling tunneling electroresistance and tunneling magnetoresistance in a multiferroic tunnel junction
#118FRAM cell with cross point access
#119DEVICE COMPRISING A PLURALITY OF THIN LAYERS
#120Varistor
#121Electronic device
#122Memory cell
#123Multiple-bits-per-cell voltage-controlled magnetic memory
#124Multi-bit ferroelectric memory device and methods of forming the same
#125Ferroelectric memory device
#126CMOS analog memories utilizing ferroelectric capacitors
#127Multi-bit memory device
#128Resistive memory device with word lines coupled to multiple sink transistors
#129Method of driving nonvolatile semiconductor device
#130Memory device with adaptive capacity
#131Non-volatile memory device and sensing method thereof
#132METHODS AND SYSTEMS FOR MEMS CMOS PROGRAMMABLE MEMORIES AND RELATED DEVICES
#133Analog memories utilizing ferroelectric capacitors
#134Method for operating a nonvolatile switching device
#135Semiconductor memory device
#136Graphene Memory Cell and Fabrication Methods Thereof
#137Memory system
#138Memory Device with adaptive capacity
#139Nonvolatile semiconductor storage device
#140Semiconductor memory device including FET memory elements
#141Storage device including a memory cell having multiple memory layers
#142Multilevel nonvolatile memory device using variable resistance
#143Nanoscale wire-based data storage
#144FERROELECTRIC SEMICONDUCTOR STORAGE DEVICE
#145Semiconductor memory device
#146Ferroelectric recording medium and writing method for the same
#147Devices and methods for writing and reading information
#148Memory
#149Multi-bit nonvolatile ferroelectric memory device having fail cell repair circuit and repair method thereof
#150Ferroelectric recording medium and writing method for the same
#151Multi bits flash memory device and method of operating the same
#152Electronic memory with binary storage elements
#153Nonvolatile ferroelectric memory device having a multi-bit control function
#154Ferroelectric memory, multivalent data recording method and multivalent data reading method
#155Method of multi-level cell FeRAM
#156Nonvolatile ferroelectric memory device and method for storing multiple bit using the same
#157Electronic memory with tri-level cell pair
#158Ferroelectric storage device
#159Data control device using a nonvolatile ferroelectric memory
#160Semiconductor memory device and various systems mounting them
#161Nonvolatile ferroelectric memory device having multi-bit control function
#162Nonvolatile ferroelectric memory device having a multi-bit control function
#163Amplitude modulation for writing to a multi-level bit-cell
#164Memory cell sensing stress mitigation
#165Method and system for writing to and reading from a memory device
#166Tuning voltages in a read circuit
#167Multi-state memory device and method for adjusting memory state characteristics of the same
#168BEOL cross-bar array ferroelectric synapse units for domain wall movement
#169Canceling memory cell variations by isolating digit lines
#170Cell bottom node reset in a memory array
#171Analog ferroelectric memory with improved temperature range
#172Writing to cross-point non-volatile memory
#173Methods of operating ferroelectric memory cells, and related ferroelectric memory cells